arch/sh/kernel/cpu/sh2a/clock-sh7201.c

   1 /*
   2  * arch/sh/kernel/cpu/sh2a/clock-sh7201.c
   3  *
   4  * SH7201 support for the clock framework
   5  *
   6  *  Copyright (C) 2008 Peter Griffin  <pgriffin@mpc-data.co.uk>
   7  *
   8  * Based on clock-sh4.c
   9  *  Copyright (C) 2005  Paul Mundt
  10  *
  11  * This file is subject to the terms and conditions of the GNU General Public
  12  * License.  See the file "COPYING" in the main directory of this archive
  13  * for more details.
  14  */
  15 #include <linux/init.h>
  16 #include <linux/kernel.h>
  17 #include <asm/clock.h>
  18 #include <asm/freq.h>
  19 #include <asm/io.h>
  20
  21 static const int pll1rate[]={1,2,3,4,6,8};
  22 static const int pfc_divisors[]={1,2,3,4,6,8,12};
  23 #define ifc_divisors pfc_divisors
  24
  25 static unsigned int pll2_mult;
  26
  27 static void master_clk_init(struct clk *clk)
  28 {
  29         clk->rate = 10000000 * pll2_mult *
  30                pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
  31 }
  32
  33 static struct sh_clk_ops sh7201_master_clk_ops = {
  34         .init           = master_clk_init,
  35 };
  36
  37 static unsigned long module_clk_recalc(struct clk *clk)
  38 {
  39         int idx = (__raw_readw(FREQCR) & 0x0007);
  40         return clk->parent->rate / pfc_divisors[idx];
  41 }
  42
  43 static struct sh_clk_ops sh7201_module_clk_ops = {
  44         .recalc         = module_clk_recalc,
  45 };
  46
  47 static unsigned long bus_clk_recalc(struct clk *clk)
  48 {
  49         int idx = (__raw_readw(FREQCR) & 0x0007);
  50         return clk->parent->rate / pfc_divisors[idx];
  51 }
  52
  53 static struct sh_clk_ops sh7201_bus_clk_ops = {
  54         .recalc         = bus_clk_recalc,
  55 };
  56
  57 static unsigned long cpu_clk_recalc(struct clk *clk)
  58 {
  59         int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
  60         return clk->parent->rate / ifc_divisors[idx];
  61 }
  62
  63 static struct sh_clk_ops sh7201_cpu_clk_ops = {
  64         .recalc         = cpu_clk_recalc,
  65 };
  66
  67 static struct sh_clk_ops *sh7201_clk_ops[] = {
  68         &sh7201_master_clk_ops,
  69         &sh7201_module_clk_ops,
  70         &sh7201_bus_clk_ops,
  71         &sh7201_cpu_clk_ops,
  72 };
  73
  74 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
  75 {
  76         if (test_mode_pin(MODE_PIN1 | MODE_PIN0))
  77                 pll2_mult = 1;
  78         else if (test_mode_pin(MODE_PIN1))
  79                 pll2_mult = 2;
  80         else
  81                 pll2_mult = 4;
  82
  83         if (idx < ARRAY_SIZE(sh7201_clk_ops))
  84                 *ops = sh7201_clk_ops[idx];
  85 }