arch/cris/include/arch-v32/mach-a3/mach/dma.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_ARCH_CRIS_DMA_H
   3 #define _ASM_ARCH_CRIS_DMA_H
   4
   5 /* Defines for using and allocating dma channels. */
   6
   7 #define MAX_DMA_CHANNELS        12 /* 8 and 10 not used. */
   8
   9 #define NETWORK_ETH_TX_DMA_NBR 0        /* Ethernet 0 out. */
  10 #define NETWORK_ETH_RX_DMA_NBR 1        /* Ethernet 0 in. */
  11
  12 #define IO_PROC_DMA_TX_DMA_NBR 4        /* IO processor DMA0 out. */
  13 #define IO_PROC_DMA_RX_DMA_NBR 5        /* IO processor DMA0 in. */
  14
  15 #define ASYNC_SER3_TX_DMA_NBR 2         /* Asynchronous serial port 3 out. */
  16 #define ASYNC_SER3_RX_DMA_NBR 3         /* Asynchronous serial port 3 in. */
  17
  18 #define ASYNC_SER2_TX_DMA_NBR 6         /* Asynchronous serial port 2 out. */
  19 #define ASYNC_SER2_RX_DMA_NBR 7         /* Asynchronous serial port 2 in. */
  20
  21 #define ASYNC_SER1_TX_DMA_NBR 4         /* Asynchronous serial port 1 out. */
  22 #define ASYNC_SER1_RX_DMA_NBR 5         /* Asynchronous serial port 1 in. */
  23
  24 #define SYNC_SER_TX_DMA_NBR 6           /* Synchronous serial port 0 out. */
  25 #define SYNC_SER_RX_DMA_NBR 7           /* Synchronous serial port 0 in. */
  26
  27 #define ASYNC_SER0_TX_DMA_NBR 0         /* Asynchronous serial port 0 out. */
  28 #define ASYNC_SER0_RX_DMA_NBR 1         /* Asynchronous serial port 0 in. */
  29
  30 #define STRCOP_TX_DMA_NBR 2             /* Stream co-processor out. */
  31 #define STRCOP_RX_DMA_NBR 3             /* Stream co-processor in. */
  32
  33 #define dma_eth0 dma_eth
  34 #define dma_eth1 dma_eth
  35
  36 enum dma_owner {
  37         dma_eth,
  38         dma_ser0,
  39         dma_ser1,
  40         dma_ser2,
  41         dma_ser3,
  42         dma_ser4,
  43         dma_iop,
  44         dma_sser,
  45         dma_strp,
  46         dma_h264,
  47         dma_jpeg
  48 };
  49
  50 int crisv32_request_dma(unsigned int dmanr, const char *device_id,
  51         unsigned options, unsigned bandwidth, enum dma_owner owner);
  52 void crisv32_free_dma(unsigned int dmanr);
  53
  54 /* Masks used by crisv32_request_dma options: */
  55 #define DMA_VERBOSE_ON_ERROR 1
  56 #define DMA_PANIC_ON_ERROR (2|DMA_VERBOSE_ON_ERROR)
  57 #define DMA_INT_MEM 4
  58
  59 #endif /* _ASM_ARCH_CRIS_DMA_H */