arch/cris/include/arch-v32/mach-a3/mach/hwregs/marb_foo_defs.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __marb_foo_defs_h
   3 #define __marb_foo_defs_h
   4
   5 /*
   6  * This file is autogenerated from
   7  *   file:           marb_foo.r
   8  *
   9  *   by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r
  10  * Any changes here will be lost.
  11  *
  12  * -*- buffer-read-only: t -*-
  13  */
  14 /* Main access macros */
  15 #ifndef REG_RD
  16 #define REG_RD( scope, inst, reg ) \
  17   REG_READ( reg_##scope##_##reg, \
  18             (inst) + REG_RD_ADDR_##scope##_##reg )
  19 #endif
  20
  21 #ifndef REG_WR
  22 #define REG_WR( scope, inst, reg, val ) \
  23   REG_WRITE( reg_##scope##_##reg, \
  24              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  25 #endif
  26
  27 #ifndef REG_RD_VECT
  28 #define REG_RD_VECT( scope, inst, reg, index ) \
  29   REG_READ( reg_##scope##_##reg, \
  30             (inst) + REG_RD_ADDR_##scope##_##reg + \
  31             (index) * STRIDE_##scope##_##reg )
  32 #endif
  33
  34 #ifndef REG_WR_VECT
  35 #define REG_WR_VECT( scope, inst, reg, index, val ) \
  36   REG_WRITE( reg_##scope##_##reg, \
  37              (inst) + REG_WR_ADDR_##scope##_##reg + \
  38              (index) * STRIDE_##scope##_##reg, (val) )
  39 #endif
  40
  41 #ifndef REG_RD_INT
  42 #define REG_RD_INT( scope, inst, reg ) \
  43   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  44 #endif
  45
  46 #ifndef REG_WR_INT
  47 #define REG_WR_INT( scope, inst, reg, val ) \
  48   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  49 #endif
  50
  51 #ifndef REG_RD_INT_VECT
  52 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  53   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  54             (index) * STRIDE_##scope##_##reg )
  55 #endif
  56
  57 #ifndef REG_WR_INT_VECT
  58 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  59   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  60              (index) * STRIDE_##scope##_##reg, (val) )
  61 #endif
  62
  63 #ifndef REG_TYPE_CONV
  64 #define REG_TYPE_CONV( type, orgtype, val ) \
  65   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  66 #endif
  67
  68 #ifndef reg_page_size
  69 #define reg_page_size 8192
  70 #endif
  71
  72 #ifndef REG_ADDR
  73 #define REG_ADDR( scope, inst, reg ) \
  74   ( (inst) + REG_RD_ADDR_##scope##_##reg )
  75 #endif
  76
  77 #ifndef REG_ADDR_VECT
  78 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  79   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  80     (index) * STRIDE_##scope##_##reg )
  81 #endif
  82
  83 /* C-code for register scope marb_foo */
  84
  85 #define STRIDE_marb_foo_rw_intm_slots 4
  86 /* Register rw_intm_slots, scope marb_foo, type rw */
  87 typedef struct {
  88   unsigned int owner : 4;
  89   unsigned int dummy1 : 28;
  90 } reg_marb_foo_rw_intm_slots;
  91 #define REG_RD_ADDR_marb_foo_rw_intm_slots 0
  92 #define REG_WR_ADDR_marb_foo_rw_intm_slots 0
  93
  94 #define STRIDE_marb_foo_rw_l2_slots 4
  95 /* Register rw_l2_slots, scope marb_foo, type rw */
  96 typedef struct {
  97   unsigned int owner : 4;
  98   unsigned int dummy1 : 28;
  99 } reg_marb_foo_rw_l2_slots;
 100 #define REG_RD_ADDR_marb_foo_rw_l2_slots 256
 101 #define REG_WR_ADDR_marb_foo_rw_l2_slots 256
 102
 103 #define STRIDE_marb_foo_rw_regs_slots 4
 104 /* Register rw_regs_slots, scope marb_foo, type rw */
 105 typedef struct {
 106   unsigned int owner : 4;
 107   unsigned int dummy1 : 28;
 108 } reg_marb_foo_rw_regs_slots;
 109 #define REG_RD_ADDR_marb_foo_rw_regs_slots 512
 110 #define REG_WR_ADDR_marb_foo_rw_regs_slots 512
 111
 112 /* Register rw_sclr_burst, scope marb_foo, type rw */
 113 typedef struct {
 114   unsigned int intm_bsize : 2;
 115   unsigned int l2_bsize   : 2;
 116   unsigned int dummy1     : 28;
 117 } reg_marb_foo_rw_sclr_burst;
 118 #define REG_RD_ADDR_marb_foo_rw_sclr_burst 528
 119 #define REG_WR_ADDR_marb_foo_rw_sclr_burst 528
 120
 121 /* Register rw_dma0_burst, scope marb_foo, type rw */
 122 typedef struct {
 123   unsigned int intm_bsize : 2;
 124   unsigned int l2_bsize   : 2;
 125   unsigned int dummy1     : 28;
 126 } reg_marb_foo_rw_dma0_burst;
 127 #define REG_RD_ADDR_marb_foo_rw_dma0_burst 532
 128 #define REG_WR_ADDR_marb_foo_rw_dma0_burst 532
 129
 130 /* Register rw_dma1_burst, scope marb_foo, type rw */
 131 typedef struct {
 132   unsigned int intm_bsize : 2;
 133   unsigned int l2_bsize   : 2;
 134   unsigned int dummy1     : 28;
 135 } reg_marb_foo_rw_dma1_burst;
 136 #define REG_RD_ADDR_marb_foo_rw_dma1_burst 536
 137 #define REG_WR_ADDR_marb_foo_rw_dma1_burst 536
 138
 139 /* Register rw_dma2_burst, scope marb_foo, type rw */
 140 typedef struct {
 141   unsigned int intm_bsize : 2;
 142   unsigned int l2_bsize   : 2;
 143   unsigned int dummy1     : 28;
 144 } reg_marb_foo_rw_dma2_burst;
 145 #define REG_RD_ADDR_marb_foo_rw_dma2_burst 540
 146 #define REG_WR_ADDR_marb_foo_rw_dma2_burst 540
 147
 148 /* Register rw_dma3_burst, scope marb_foo, type rw */
 149 typedef struct {
 150   unsigned int intm_bsize : 2;
 151   unsigned int l2_bsize   : 2;
 152   unsigned int dummy1     : 28;
 153 } reg_marb_foo_rw_dma3_burst;
 154 #define REG_RD_ADDR_marb_foo_rw_dma3_burst 544
 155 #define REG_WR_ADDR_marb_foo_rw_dma3_burst 544
 156
 157 /* Register rw_dma4_burst, scope marb_foo, type rw */
 158 typedef struct {
 159   unsigned int intm_bsize : 2;
 160   unsigned int l2_bsize   : 2;
 161   unsigned int dummy1     : 28;
 162 } reg_marb_foo_rw_dma4_burst;
 163 #define REG_RD_ADDR_marb_foo_rw_dma4_burst 548
 164 #define REG_WR_ADDR_marb_foo_rw_dma4_burst 548
 165
 166 /* Register rw_dma5_burst, scope marb_foo, type rw */
 167 typedef struct {
 168   unsigned int intm_bsize : 2;
 169   unsigned int l2_bsize   : 2;
 170   unsigned int dummy1     : 28;
 171 } reg_marb_foo_rw_dma5_burst;
 172 #define REG_RD_ADDR_marb_foo_rw_dma5_burst 552
 173 #define REG_WR_ADDR_marb_foo_rw_dma5_burst 552
 174
 175 /* Register rw_dma6_burst, scope marb_foo, type rw */
 176 typedef struct {
 177   unsigned int intm_bsize : 2;
 178   unsigned int l2_bsize   : 2;
 179   unsigned int dummy1     : 28;
 180 } reg_marb_foo_rw_dma6_burst;
 181 #define REG_RD_ADDR_marb_foo_rw_dma6_burst 556
 182 #define REG_WR_ADDR_marb_foo_rw_dma6_burst 556
 183
 184 /* Register rw_dma7_burst, scope marb_foo, type rw */
 185 typedef struct {
 186   unsigned int intm_bsize : 2;
 187   unsigned int l2_bsize   : 2;
 188   unsigned int dummy1     : 28;
 189 } reg_marb_foo_rw_dma7_burst;
 190 #define REG_RD_ADDR_marb_foo_rw_dma7_burst 560
 191 #define REG_WR_ADDR_marb_foo_rw_dma7_burst 560
 192
 193 /* Register rw_dma9_burst, scope marb_foo, type rw */
 194 typedef struct {
 195   unsigned int intm_bsize : 2;
 196   unsigned int l2_bsize   : 2;
 197   unsigned int dummy1     : 28;
 198 } reg_marb_foo_rw_dma9_burst;
 199 #define REG_RD_ADDR_marb_foo_rw_dma9_burst 564
 200 #define REG_WR_ADDR_marb_foo_rw_dma9_burst 564
 201
 202 /* Register rw_dma11_burst, scope marb_foo, type rw */
 203 typedef struct {
 204   unsigned int intm_bsize : 2;
 205   unsigned int l2_bsize   : 2;
 206   unsigned int dummy1     : 28;
 207 } reg_marb_foo_rw_dma11_burst;
 208 #define REG_RD_ADDR_marb_foo_rw_dma11_burst 568
 209 #define REG_WR_ADDR_marb_foo_rw_dma11_burst 568
 210
 211 /* Register rw_cpui_burst, scope marb_foo, type rw */
 212 typedef struct {
 213   unsigned int intm_bsize : 2;
 214   unsigned int l2_bsize   : 2;
 215   unsigned int dummy1     : 28;
 216 } reg_marb_foo_rw_cpui_burst;
 217 #define REG_RD_ADDR_marb_foo_rw_cpui_burst 572
 218 #define REG_WR_ADDR_marb_foo_rw_cpui_burst 572
 219
 220 /* Register rw_cpud_burst, scope marb_foo, type rw */
 221 typedef struct {
 222   unsigned int intm_bsize : 2;
 223   unsigned int l2_bsize   : 2;
 224   unsigned int dummy1     : 28;
 225 } reg_marb_foo_rw_cpud_burst;
 226 #define REG_RD_ADDR_marb_foo_rw_cpud_burst 576
 227 #define REG_WR_ADDR_marb_foo_rw_cpud_burst 576
 228
 229 /* Register rw_iop_burst, scope marb_foo, type rw */
 230 typedef struct {
 231   unsigned int intm_bsize : 2;
 232   unsigned int l2_bsize   : 2;
 233   unsigned int dummy1     : 28;
 234 } reg_marb_foo_rw_iop_burst;
 235 #define REG_RD_ADDR_marb_foo_rw_iop_burst 580
 236 #define REG_WR_ADDR_marb_foo_rw_iop_burst 580
 237
 238 /* Register rw_ccdstat_burst, scope marb_foo, type rw */
 239 typedef struct {
 240   unsigned int intm_bsize : 2;
 241   unsigned int l2_bsize   : 2;
 242   unsigned int dummy1     : 28;
 243 } reg_marb_foo_rw_ccdstat_burst;
 244 #define REG_RD_ADDR_marb_foo_rw_ccdstat_burst 584
 245 #define REG_WR_ADDR_marb_foo_rw_ccdstat_burst 584
 246
 247 /* Register rw_intr_mask, scope marb_foo, type rw */
 248 typedef struct {
 249   unsigned int bp0 : 1;
 250   unsigned int bp1 : 1;
 251   unsigned int bp2 : 1;
 252   unsigned int bp3 : 1;
 253   unsigned int dummy1 : 28;
 254 } reg_marb_foo_rw_intr_mask;
 255 #define REG_RD_ADDR_marb_foo_rw_intr_mask 588
 256 #define REG_WR_ADDR_marb_foo_rw_intr_mask 588
 257
 258 /* Register rw_ack_intr, scope marb_foo, type rw */
 259 typedef struct {
 260   unsigned int bp0 : 1;
 261   unsigned int bp1 : 1;
 262   unsigned int bp2 : 1;
 263   unsigned int bp3 : 1;
 264   unsigned int dummy1 : 28;
 265 } reg_marb_foo_rw_ack_intr;
 266 #define REG_RD_ADDR_marb_foo_rw_ack_intr 592
 267 #define REG_WR_ADDR_marb_foo_rw_ack_intr 592
 268
 269 /* Register r_intr, scope marb_foo, type r */
 270 typedef struct {
 271   unsigned int bp0 : 1;
 272   unsigned int bp1 : 1;
 273   unsigned int bp2 : 1;
 274   unsigned int bp3 : 1;
 275   unsigned int dummy1 : 28;
 276 } reg_marb_foo_r_intr;
 277 #define REG_RD_ADDR_marb_foo_r_intr 596
 278
 279 /* Register r_masked_intr, scope marb_foo, type r */
 280 typedef struct {
 281   unsigned int bp0 : 1;
 282   unsigned int bp1 : 1;
 283   unsigned int bp2 : 1;
 284   unsigned int bp3 : 1;
 285   unsigned int dummy1 : 28;
 286 } reg_marb_foo_r_masked_intr;
 287 #define REG_RD_ADDR_marb_foo_r_masked_intr 600
 288
 289 /* Register rw_stop_mask, scope marb_foo, type rw */
 290 typedef struct {
 291   unsigned int sclr    : 1;
 292   unsigned int dma0    : 1;
 293   unsigned int dma1    : 1;
 294   unsigned int dma2    : 1;
 295   unsigned int dma3    : 1;
 296   unsigned int dma4    : 1;
 297   unsigned int dma5    : 1;
 298   unsigned int dma6    : 1;
 299   unsigned int dma7    : 1;
 300   unsigned int dma9    : 1;
 301   unsigned int dma11   : 1;
 302   unsigned int cpui    : 1;
 303   unsigned int cpud    : 1;
 304   unsigned int iop     : 1;
 305   unsigned int ccdstat : 1;
 306   unsigned int dummy1  : 17;
 307 } reg_marb_foo_rw_stop_mask;
 308 #define REG_RD_ADDR_marb_foo_rw_stop_mask 604
 309 #define REG_WR_ADDR_marb_foo_rw_stop_mask 604
 310
 311 /* Register r_stopped, scope marb_foo, type r */
 312 typedef struct {
 313   unsigned int sclr    : 1;
 314   unsigned int dma0    : 1;
 315   unsigned int dma1    : 1;
 316   unsigned int dma2    : 1;
 317   unsigned int dma3    : 1;
 318   unsigned int dma4    : 1;
 319   unsigned int dma5    : 1;
 320   unsigned int dma6    : 1;
 321   unsigned int dma7    : 1;
 322   unsigned int dma9    : 1;
 323   unsigned int dma11   : 1;
 324   unsigned int cpui    : 1;
 325   unsigned int cpud    : 1;
 326   unsigned int iop     : 1;
 327   unsigned int ccdstat : 1;
 328   unsigned int dummy1  : 17;
 329 } reg_marb_foo_r_stopped;
 330 #define REG_RD_ADDR_marb_foo_r_stopped 608
 331
 332 /* Register rw_no_snoop, scope marb_foo, type rw */
 333 typedef struct {
 334   unsigned int sclr    : 1;
 335   unsigned int dma0    : 1;
 336   unsigned int dma1    : 1;
 337   unsigned int dma2    : 1;
 338   unsigned int dma3    : 1;
 339   unsigned int dma4    : 1;
 340   unsigned int dma5    : 1;
 341   unsigned int dma6    : 1;
 342   unsigned int dma7    : 1;
 343   unsigned int dma9    : 1;
 344   unsigned int dma11   : 1;
 345   unsigned int cpui    : 1;
 346   unsigned int cpud    : 1;
 347   unsigned int iop     : 1;
 348   unsigned int ccdstat : 1;
 349   unsigned int dummy1  : 17;
 350 } reg_marb_foo_rw_no_snoop;
 351 #define REG_RD_ADDR_marb_foo_rw_no_snoop 896
 352 #define REG_WR_ADDR_marb_foo_rw_no_snoop 896
 353
 354 /* Register rw_no_snoop_rq, scope marb_foo, type rw */
 355 typedef struct {
 356   unsigned int dummy1 : 11;
 357   unsigned int cpui : 1;
 358   unsigned int cpud : 1;
 359   unsigned int dummy2 : 19;
 360 } reg_marb_foo_rw_no_snoop_rq;
 361 #define REG_RD_ADDR_marb_foo_rw_no_snoop_rq 900
 362 #define REG_WR_ADDR_marb_foo_rw_no_snoop_rq 900
 363
 364
 365 /* Constants */
 366 enum {
 367   regk_marb_foo_ccdstat                    = 0x0000000e,
 368   regk_marb_foo_cpud                       = 0x0000000c,
 369   regk_marb_foo_cpui                       = 0x0000000b,
 370   regk_marb_foo_dma0                       = 0x00000001,
 371   regk_marb_foo_dma1                       = 0x00000002,
 372   regk_marb_foo_dma11                      = 0x0000000a,
 373   regk_marb_foo_dma2                       = 0x00000003,
 374   regk_marb_foo_dma3                       = 0x00000004,
 375   regk_marb_foo_dma4                       = 0x00000005,
 376   regk_marb_foo_dma5                       = 0x00000006,
 377   regk_marb_foo_dma6                       = 0x00000007,
 378   regk_marb_foo_dma7                       = 0x00000008,
 379   regk_marb_foo_dma9                       = 0x00000009,
 380   regk_marb_foo_iop                        = 0x0000000d,
 381   regk_marb_foo_no                         = 0x00000000,
 382   regk_marb_foo_r_stopped_default          = 0x00000000,
 383   regk_marb_foo_rw_ccdstat_burst_default   = 0x00000000,
 384   regk_marb_foo_rw_cpud_burst_default      = 0x00000000,
 385   regk_marb_foo_rw_cpui_burst_default      = 0x00000000,
 386   regk_marb_foo_rw_dma0_burst_default      = 0x00000000,
 387   regk_marb_foo_rw_dma11_burst_default     = 0x00000000,
 388   regk_marb_foo_rw_dma1_burst_default      = 0x00000000,
 389   regk_marb_foo_rw_dma2_burst_default      = 0x00000000,
 390   regk_marb_foo_rw_dma3_burst_default      = 0x00000000,
 391   regk_marb_foo_rw_dma4_burst_default      = 0x00000000,
 392   regk_marb_foo_rw_dma5_burst_default      = 0x00000000,
 393   regk_marb_foo_rw_dma6_burst_default      = 0x00000000,
 394   regk_marb_foo_rw_dma7_burst_default      = 0x00000000,
 395   regk_marb_foo_rw_dma9_burst_default      = 0x00000000,
 396   regk_marb_foo_rw_intm_slots_default      = 0x00000000,
 397   regk_marb_foo_rw_intm_slots_size         = 0x00000040,
 398   regk_marb_foo_rw_intr_mask_default       = 0x00000000,
 399   regk_marb_foo_rw_iop_burst_default       = 0x00000000,
 400   regk_marb_foo_rw_l2_slots_default        = 0x00000000,
 401   regk_marb_foo_rw_l2_slots_size           = 0x00000040,
 402   regk_marb_foo_rw_no_snoop_default        = 0x00000000,
 403   regk_marb_foo_rw_no_snoop_rq_default     = 0x00000000,
 404   regk_marb_foo_rw_regs_slots_default      = 0x00000000,
 405   regk_marb_foo_rw_regs_slots_size         = 0x00000004,
 406   regk_marb_foo_rw_sclr_burst_default      = 0x00000000,
 407   regk_marb_foo_rw_stop_mask_default       = 0x00000000,
 408   regk_marb_foo_sclr                       = 0x00000000,
 409   regk_marb_foo_yes                        = 0x00000001
 410 };
 411 #endif /* __marb_foo_defs_h */
 412 #ifndef __marb_foo_bp_defs_h
 413 #define __marb_foo_bp_defs_h
 414
 415 /*
 416  * This file is autogenerated from
 417  *   file:           marb_foo.r
 418  *
 419  *   by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r
 420  * Any changes here will be lost.
 421  *
 422  * -*- buffer-read-only: t -*-
 423  */
 424 /* Main access macros */
 425 #ifndef REG_RD
 426 #define REG_RD( scope, inst, reg ) \
 427   REG_READ( reg_##scope##_##reg, \
 428             (inst) + REG_RD_ADDR_##scope##_##reg )
 429 #endif
 430
 431 #ifndef REG_WR
 432 #define REG_WR( scope, inst, reg, val ) \
 433   REG_WRITE( reg_##scope##_##reg, \
 434              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
 435 #endif
 436
 437 #ifndef REG_RD_VECT
 438 #define REG_RD_VECT( scope, inst, reg, index ) \
 439   REG_READ( reg_##scope##_##reg, \
 440             (inst) + REG_RD_ADDR_##scope##_##reg + \
 441             (index) * STRIDE_##scope##_##reg )
 442 #endif
 443
 444 #ifndef REG_WR_VECT
 445 #define REG_WR_VECT( scope, inst, reg, index, val ) \
 446   REG_WRITE( reg_##scope##_##reg, \
 447              (inst) + REG_WR_ADDR_##scope##_##reg + \
 448              (index) * STRIDE_##scope##_##reg, (val) )
 449 #endif
 450
 451 #ifndef REG_RD_INT
 452 #define REG_RD_INT( scope, inst, reg ) \
 453   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
 454 #endif
 455
 456 #ifndef REG_WR_INT
 457 #define REG_WR_INT( scope, inst, reg, val ) \
 458   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
 459 #endif
 460
 461 #ifndef REG_RD_INT_VECT
 462 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
 463   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
 464             (index) * STRIDE_##scope##_##reg )
 465 #endif
 466
 467 #ifndef REG_WR_INT_VECT
 468 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
 469   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
 470              (index) * STRIDE_##scope##_##reg, (val) )
 471 #endif
 472
 473 #ifndef REG_TYPE_CONV
 474 #define REG_TYPE_CONV( type, orgtype, val ) \
 475   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
 476 #endif
 477
 478 #ifndef reg_page_size
 479 #define reg_page_size 8192
 480 #endif
 481
 482 #ifndef REG_ADDR
 483 #define REG_ADDR( scope, inst, reg ) \
 484   ( (inst) + REG_RD_ADDR_##scope##_##reg )
 485 #endif
 486
 487 #ifndef REG_ADDR_VECT
 488 #define REG_ADDR_VECT( scope, inst, reg, index ) \
 489   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
 490     (index) * STRIDE_##scope##_##reg )
 491 #endif
 492
 493 /* C-code for register scope marb_foo_bp */
 494
 495 /* Register rw_first_addr, scope marb_foo_bp, type rw */
 496 typedef unsigned int reg_marb_foo_bp_rw_first_addr;
 497 #define REG_RD_ADDR_marb_foo_bp_rw_first_addr 0
 498 #define REG_WR_ADDR_marb_foo_bp_rw_first_addr 0
 499
 500 /* Register rw_last_addr, scope marb_foo_bp, type rw */
 501 typedef unsigned int reg_marb_foo_bp_rw_last_addr;
 502 #define REG_RD_ADDR_marb_foo_bp_rw_last_addr 4
 503 #define REG_WR_ADDR_marb_foo_bp_rw_last_addr 4
 504
 505 /* Register rw_op, scope marb_foo_bp, type rw */
 506 typedef struct {
 507   unsigned int rd         : 1;
 508   unsigned int wr         : 1;
 509   unsigned int rd_excl    : 1;
 510   unsigned int pri_wr     : 1;
 511   unsigned int us_rd      : 1;
 512   unsigned int us_wr      : 1;
 513   unsigned int us_rd_excl : 1;
 514   unsigned int us_pri_wr  : 1;
 515   unsigned int dummy1     : 24;
 516 } reg_marb_foo_bp_rw_op;
 517 #define REG_RD_ADDR_marb_foo_bp_rw_op 8
 518 #define REG_WR_ADDR_marb_foo_bp_rw_op 8
 519
 520 /* Register rw_clients, scope marb_foo_bp, type rw */
 521 typedef struct {
 522   unsigned int sclr    : 1;
 523   unsigned int dma0    : 1;
 524   unsigned int dma1    : 1;
 525   unsigned int dma2    : 1;
 526   unsigned int dma3    : 1;
 527   unsigned int dma4    : 1;
 528   unsigned int dma5    : 1;
 529   unsigned int dma6    : 1;
 530   unsigned int dma7    : 1;
 531   unsigned int dma9    : 1;
 532   unsigned int dma11   : 1;
 533   unsigned int cpui    : 1;
 534   unsigned int cpud    : 1;
 535   unsigned int iop     : 1;
 536   unsigned int ccdstat : 1;
 537   unsigned int dummy1  : 17;
 538 } reg_marb_foo_bp_rw_clients;
 539 #define REG_RD_ADDR_marb_foo_bp_rw_clients 12
 540 #define REG_WR_ADDR_marb_foo_bp_rw_clients 12
 541
 542 /* Register rw_options, scope marb_foo_bp, type rw */
 543 typedef struct {
 544   unsigned int wrap : 1;
 545   unsigned int dummy1 : 31;
 546 } reg_marb_foo_bp_rw_options;
 547 #define REG_RD_ADDR_marb_foo_bp_rw_options 16
 548 #define REG_WR_ADDR_marb_foo_bp_rw_options 16
 549
 550 /* Register r_brk_addr, scope marb_foo_bp, type r */
 551 typedef unsigned int reg_marb_foo_bp_r_brk_addr;
 552 #define REG_RD_ADDR_marb_foo_bp_r_brk_addr 20
 553
 554 /* Register r_brk_op, scope marb_foo_bp, type r */
 555 typedef struct {
 556   unsigned int rd         : 1;
 557   unsigned int wr         : 1;
 558   unsigned int rd_excl    : 1;
 559   unsigned int pri_wr     : 1;
 560   unsigned int us_rd      : 1;
 561   unsigned int us_wr      : 1;
 562   unsigned int us_rd_excl : 1;
 563   unsigned int us_pri_wr  : 1;
 564   unsigned int dummy1     : 24;
 565 } reg_marb_foo_bp_r_brk_op;
 566 #define REG_RD_ADDR_marb_foo_bp_r_brk_op 24
 567
 568 /* Register r_brk_clients, scope marb_foo_bp, type r */
 569 typedef struct {
 570   unsigned int sclr    : 1;
 571   unsigned int dma0    : 1;
 572   unsigned int dma1    : 1;
 573   unsigned int dma2    : 1;
 574   unsigned int dma3    : 1;
 575   unsigned int dma4    : 1;
 576   unsigned int dma5    : 1;
 577   unsigned int dma6    : 1;
 578   unsigned int dma7    : 1;
 579   unsigned int dma9    : 1;
 580   unsigned int dma11   : 1;
 581   unsigned int cpui    : 1;
 582   unsigned int cpud    : 1;
 583   unsigned int iop     : 1;
 584   unsigned int ccdstat : 1;
 585   unsigned int dummy1  : 17;
 586 } reg_marb_foo_bp_r_brk_clients;
 587 #define REG_RD_ADDR_marb_foo_bp_r_brk_clients 28
 588
 589 /* Register r_brk_first_client, scope marb_foo_bp, type r */
 590 typedef struct {
 591   unsigned int sclr    : 1;
 592   unsigned int dma0    : 1;
 593   unsigned int dma1    : 1;
 594   unsigned int dma2    : 1;
 595   unsigned int dma3    : 1;
 596   unsigned int dma4    : 1;
 597   unsigned int dma5    : 1;
 598   unsigned int dma6    : 1;
 599   unsigned int dma7    : 1;
 600   unsigned int dma9    : 1;
 601   unsigned int dma11   : 1;
 602   unsigned int cpui    : 1;
 603   unsigned int cpud    : 1;
 604   unsigned int iop     : 1;
 605   unsigned int ccdstat : 1;
 606   unsigned int dummy1  : 17;
 607 } reg_marb_foo_bp_r_brk_first_client;
 608 #define REG_RD_ADDR_marb_foo_bp_r_brk_first_client 32
 609
 610 /* Register r_brk_size, scope marb_foo_bp, type r */
 611 typedef unsigned int reg_marb_foo_bp_r_brk_size;
 612 #define REG_RD_ADDR_marb_foo_bp_r_brk_size 36
 613
 614 /* Register rw_ack, scope marb_foo_bp, type rw */
 615 typedef unsigned int reg_marb_foo_bp_rw_ack;
 616 #define REG_RD_ADDR_marb_foo_bp_rw_ack 40
 617 #define REG_WR_ADDR_marb_foo_bp_rw_ack 40
 618
 619
 620 /* Constants */
 621 enum {
 622   regk_marb_foo_bp_no                      = 0x00000000,
 623   regk_marb_foo_bp_rw_op_default           = 0x00000000,
 624   regk_marb_foo_bp_rw_options_default      = 0x00000000,
 625   regk_marb_foo_bp_yes                     = 0x00000001
 626 };
 627 #endif /* __marb_foo_bp_defs_h */