arch/cris/include/arch-v32/mach-a3/mach/hwregs/pio_defs.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __pio_defs_h
   3 #define __pio_defs_h
   4
   5 /*
   6  * This file is autogenerated from
   7  *   file:           pio.r
   8  *
   9  *   by ../../../tools/rdesc/bin/rdes2c -outfile pio_defs.h pio.r
  10  * Any changes here will be lost.
  11  *
  12  * -*- buffer-read-only: t -*-
  13  */
  14 /* Main access macros */
  15 #ifndef REG_RD
  16 #define REG_RD( scope, inst, reg ) \
  17   REG_READ( reg_##scope##_##reg, \
  18             (inst) + REG_RD_ADDR_##scope##_##reg )
  19 #endif
  20
  21 #ifndef REG_WR
  22 #define REG_WR( scope, inst, reg, val ) \
  23   REG_WRITE( reg_##scope##_##reg, \
  24              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  25 #endif
  26
  27 #ifndef REG_RD_VECT
  28 #define REG_RD_VECT( scope, inst, reg, index ) \
  29   REG_READ( reg_##scope##_##reg, \
  30             (inst) + REG_RD_ADDR_##scope##_##reg + \
  31             (index) * STRIDE_##scope##_##reg )
  32 #endif
  33
  34 #ifndef REG_WR_VECT
  35 #define REG_WR_VECT( scope, inst, reg, index, val ) \
  36   REG_WRITE( reg_##scope##_##reg, \
  37              (inst) + REG_WR_ADDR_##scope##_##reg + \
  38              (index) * STRIDE_##scope##_##reg, (val) )
  39 #endif
  40
  41 #ifndef REG_RD_INT
  42 #define REG_RD_INT( scope, inst, reg ) \
  43   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  44 #endif
  45
  46 #ifndef REG_WR_INT
  47 #define REG_WR_INT( scope, inst, reg, val ) \
  48   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  49 #endif
  50
  51 #ifndef REG_RD_INT_VECT
  52 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  53   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  54             (index) * STRIDE_##scope##_##reg )
  55 #endif
  56
  57 #ifndef REG_WR_INT_VECT
  58 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  59   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  60              (index) * STRIDE_##scope##_##reg, (val) )
  61 #endif
  62
  63 #ifndef REG_TYPE_CONV
  64 #define REG_TYPE_CONV( type, orgtype, val ) \
  65   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  66 #endif
  67
  68 #ifndef reg_page_size
  69 #define reg_page_size 8192
  70 #endif
  71
  72 #ifndef REG_ADDR
  73 #define REG_ADDR( scope, inst, reg ) \
  74   ( (inst) + REG_RD_ADDR_##scope##_##reg )
  75 #endif
  76
  77 #ifndef REG_ADDR_VECT
  78 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  79   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  80     (index) * STRIDE_##scope##_##reg )
  81 #endif
  82
  83 /* C-code for register scope pio */
  84
  85 /* Register rw_data, scope pio, type rw */
  86 typedef unsigned int reg_pio_rw_data;
  87 #define REG_RD_ADDR_pio_rw_data 64
  88 #define REG_WR_ADDR_pio_rw_data 64
  89
  90 /* Register rw_io_access0, scope pio, type rw */
  91 typedef struct {
  92   unsigned int data : 8;
  93   unsigned int dummy1 : 24;
  94 } reg_pio_rw_io_access0;
  95 #define REG_RD_ADDR_pio_rw_io_access0 0
  96 #define REG_WR_ADDR_pio_rw_io_access0 0
  97
  98 /* Register rw_io_access1, scope pio, type rw */
  99 typedef struct {
 100   unsigned int data : 8;
 101   unsigned int dummy1 : 24;
 102 } reg_pio_rw_io_access1;
 103 #define REG_RD_ADDR_pio_rw_io_access1 4
 104 #define REG_WR_ADDR_pio_rw_io_access1 4
 105
 106 /* Register rw_io_access2, scope pio, type rw */
 107 typedef struct {
 108   unsigned int data : 8;
 109   unsigned int dummy1 : 24;
 110 } reg_pio_rw_io_access2;
 111 #define REG_RD_ADDR_pio_rw_io_access2 8
 112 #define REG_WR_ADDR_pio_rw_io_access2 8
 113
 114 /* Register rw_io_access3, scope pio, type rw */
 115 typedef struct {
 116   unsigned int data : 8;
 117   unsigned int dummy1 : 24;
 118 } reg_pio_rw_io_access3;
 119 #define REG_RD_ADDR_pio_rw_io_access3 12
 120 #define REG_WR_ADDR_pio_rw_io_access3 12
 121
 122 /* Register rw_io_access4, scope pio, type rw */
 123 typedef struct {
 124   unsigned int data : 8;
 125   unsigned int dummy1 : 24;
 126 } reg_pio_rw_io_access4;
 127 #define REG_RD_ADDR_pio_rw_io_access4 16
 128 #define REG_WR_ADDR_pio_rw_io_access4 16
 129
 130 /* Register rw_io_access5, scope pio, type rw */
 131 typedef struct {
 132   unsigned int data : 8;
 133   unsigned int dummy1 : 24;
 134 } reg_pio_rw_io_access5;
 135 #define REG_RD_ADDR_pio_rw_io_access5 20
 136 #define REG_WR_ADDR_pio_rw_io_access5 20
 137
 138 /* Register rw_io_access6, scope pio, type rw */
 139 typedef struct {
 140   unsigned int data : 8;
 141   unsigned int dummy1 : 24;
 142 } reg_pio_rw_io_access6;
 143 #define REG_RD_ADDR_pio_rw_io_access6 24
 144 #define REG_WR_ADDR_pio_rw_io_access6 24
 145
 146 /* Register rw_io_access7, scope pio, type rw */
 147 typedef struct {
 148   unsigned int data : 8;
 149   unsigned int dummy1 : 24;
 150 } reg_pio_rw_io_access7;
 151 #define REG_RD_ADDR_pio_rw_io_access7 28
 152 #define REG_WR_ADDR_pio_rw_io_access7 28
 153
 154 /* Register rw_io_access8, scope pio, type rw */
 155 typedef struct {
 156   unsigned int data : 8;
 157   unsigned int dummy1 : 24;
 158 } reg_pio_rw_io_access8;
 159 #define REG_RD_ADDR_pio_rw_io_access8 32
 160 #define REG_WR_ADDR_pio_rw_io_access8 32
 161
 162 /* Register rw_io_access9, scope pio, type rw */
 163 typedef struct {
 164   unsigned int data : 8;
 165   unsigned int dummy1 : 24;
 166 } reg_pio_rw_io_access9;
 167 #define REG_RD_ADDR_pio_rw_io_access9 36
 168 #define REG_WR_ADDR_pio_rw_io_access9 36
 169
 170 /* Register rw_io_access10, scope pio, type rw */
 171 typedef struct {
 172   unsigned int data : 8;
 173   unsigned int dummy1 : 24;
 174 } reg_pio_rw_io_access10;
 175 #define REG_RD_ADDR_pio_rw_io_access10 40
 176 #define REG_WR_ADDR_pio_rw_io_access10 40
 177
 178 /* Register rw_io_access11, scope pio, type rw */
 179 typedef struct {
 180   unsigned int data : 8;
 181   unsigned int dummy1 : 24;
 182 } reg_pio_rw_io_access11;
 183 #define REG_RD_ADDR_pio_rw_io_access11 44
 184 #define REG_WR_ADDR_pio_rw_io_access11 44
 185
 186 /* Register rw_io_access12, scope pio, type rw */
 187 typedef struct {
 188   unsigned int data : 8;
 189   unsigned int dummy1 : 24;
 190 } reg_pio_rw_io_access12;
 191 #define REG_RD_ADDR_pio_rw_io_access12 48
 192 #define REG_WR_ADDR_pio_rw_io_access12 48
 193
 194 /* Register rw_io_access13, scope pio, type rw */
 195 typedef struct {
 196   unsigned int data : 8;
 197   unsigned int dummy1 : 24;
 198 } reg_pio_rw_io_access13;
 199 #define REG_RD_ADDR_pio_rw_io_access13 52
 200 #define REG_WR_ADDR_pio_rw_io_access13 52
 201
 202 /* Register rw_io_access14, scope pio, type rw */
 203 typedef struct {
 204   unsigned int data : 8;
 205   unsigned int dummy1 : 24;
 206 } reg_pio_rw_io_access14;
 207 #define REG_RD_ADDR_pio_rw_io_access14 56
 208 #define REG_WR_ADDR_pio_rw_io_access14 56
 209
 210 /* Register rw_io_access15, scope pio, type rw */
 211 typedef struct {
 212   unsigned int data : 8;
 213   unsigned int dummy1 : 24;
 214 } reg_pio_rw_io_access15;
 215 #define REG_RD_ADDR_pio_rw_io_access15 60
 216 #define REG_WR_ADDR_pio_rw_io_access15 60
 217
 218 /* Register rw_ce0_cfg, scope pio, type rw */
 219 typedef struct {
 220   unsigned int lw   : 6;
 221   unsigned int ew   : 3;
 222   unsigned int zw   : 3;
 223   unsigned int aw   : 2;
 224   unsigned int mode : 2;
 225   unsigned int dummy1 : 16;
 226 } reg_pio_rw_ce0_cfg;
 227 #define REG_RD_ADDR_pio_rw_ce0_cfg 68
 228 #define REG_WR_ADDR_pio_rw_ce0_cfg 68
 229
 230 /* Register rw_ce1_cfg, scope pio, type rw */
 231 typedef struct {
 232   unsigned int lw   : 6;
 233   unsigned int ew   : 3;
 234   unsigned int zw   : 3;
 235   unsigned int aw   : 2;
 236   unsigned int mode : 2;
 237   unsigned int dummy1 : 16;
 238 } reg_pio_rw_ce1_cfg;
 239 #define REG_RD_ADDR_pio_rw_ce1_cfg 72
 240 #define REG_WR_ADDR_pio_rw_ce1_cfg 72
 241
 242 /* Register rw_ce2_cfg, scope pio, type rw */
 243 typedef struct {
 244   unsigned int lw   : 6;
 245   unsigned int ew   : 3;
 246   unsigned int zw   : 3;
 247   unsigned int aw   : 2;
 248   unsigned int mode : 2;
 249   unsigned int dummy1 : 16;
 250 } reg_pio_rw_ce2_cfg;
 251 #define REG_RD_ADDR_pio_rw_ce2_cfg 76
 252 #define REG_WR_ADDR_pio_rw_ce2_cfg 76
 253
 254 /* Register rw_dout, scope pio, type rw */
 255 typedef struct {
 256   unsigned int data  : 8;
 257   unsigned int rd_n  : 1;
 258   unsigned int wr_n  : 1;
 259   unsigned int a0    : 1;
 260   unsigned int a1    : 1;
 261   unsigned int ce0_n : 1;
 262   unsigned int ce1_n : 1;
 263   unsigned int ce2_n : 1;
 264   unsigned int rdy   : 1;
 265   unsigned int dummy1 : 16;
 266 } reg_pio_rw_dout;
 267 #define REG_RD_ADDR_pio_rw_dout 80
 268 #define REG_WR_ADDR_pio_rw_dout 80
 269
 270 /* Register rw_oe, scope pio, type rw */
 271 typedef struct {
 272   unsigned int data  : 8;
 273   unsigned int rd_n  : 1;
 274   unsigned int wr_n  : 1;
 275   unsigned int a0    : 1;
 276   unsigned int a1    : 1;
 277   unsigned int ce0_n : 1;
 278   unsigned int ce1_n : 1;
 279   unsigned int ce2_n : 1;
 280   unsigned int rdy   : 1;
 281   unsigned int dummy1 : 16;
 282 } reg_pio_rw_oe;
 283 #define REG_RD_ADDR_pio_rw_oe 84
 284 #define REG_WR_ADDR_pio_rw_oe 84
 285
 286 /* Register rw_man_ctrl, scope pio, type rw */
 287 typedef struct {
 288   unsigned int data  : 8;
 289   unsigned int rd_n  : 1;
 290   unsigned int wr_n  : 1;
 291   unsigned int a0    : 1;
 292   unsigned int a1    : 1;
 293   unsigned int ce0_n : 1;
 294   unsigned int ce1_n : 1;
 295   unsigned int ce2_n : 1;
 296   unsigned int rdy   : 1;
 297   unsigned int dummy1 : 16;
 298 } reg_pio_rw_man_ctrl;
 299 #define REG_RD_ADDR_pio_rw_man_ctrl 88
 300 #define REG_WR_ADDR_pio_rw_man_ctrl 88
 301
 302 /* Register r_din, scope pio, type r */
 303 typedef struct {
 304   unsigned int data  : 8;
 305   unsigned int rd_n  : 1;
 306   unsigned int wr_n  : 1;
 307   unsigned int a0    : 1;
 308   unsigned int a1    : 1;
 309   unsigned int ce0_n : 1;
 310   unsigned int ce1_n : 1;
 311   unsigned int ce2_n : 1;
 312   unsigned int rdy   : 1;
 313   unsigned int dummy1 : 16;
 314 } reg_pio_r_din;
 315 #define REG_RD_ADDR_pio_r_din 92
 316
 317 /* Register r_stat, scope pio, type r */
 318 typedef struct {
 319   unsigned int busy : 1;
 320   unsigned int dummy1 : 31;
 321 } reg_pio_r_stat;
 322 #define REG_RD_ADDR_pio_r_stat 96
 323
 324 /* Register rw_intr_mask, scope pio, type rw */
 325 typedef struct {
 326   unsigned int rdy : 1;
 327   unsigned int dummy1 : 31;
 328 } reg_pio_rw_intr_mask;
 329 #define REG_RD_ADDR_pio_rw_intr_mask 100
 330 #define REG_WR_ADDR_pio_rw_intr_mask 100
 331
 332 /* Register rw_ack_intr, scope pio, type rw */
 333 typedef struct {
 334   unsigned int rdy : 1;
 335   unsigned int dummy1 : 31;
 336 } reg_pio_rw_ack_intr;
 337 #define REG_RD_ADDR_pio_rw_ack_intr 104
 338 #define REG_WR_ADDR_pio_rw_ack_intr 104
 339
 340 /* Register r_intr, scope pio, type r */
 341 typedef struct {
 342   unsigned int rdy : 1;
 343   unsigned int dummy1 : 31;
 344 } reg_pio_r_intr;
 345 #define REG_RD_ADDR_pio_r_intr 108
 346
 347 /* Register r_masked_intr, scope pio, type r */
 348 typedef struct {
 349   unsigned int rdy : 1;
 350   unsigned int dummy1 : 31;
 351 } reg_pio_r_masked_intr;
 352 #define REG_RD_ADDR_pio_r_masked_intr 112
 353
 354
 355 /* Constants */
 356 enum {
 357   regk_pio_a2                              = 0x00000003,
 358   regk_pio_no                              = 0x00000000,
 359   regk_pio_normal                          = 0x00000000,
 360   regk_pio_rd                              = 0x00000001,
 361   regk_pio_rw_ce0_cfg_default              = 0x00000000,
 362   regk_pio_rw_ce1_cfg_default              = 0x00000000,
 363   regk_pio_rw_ce2_cfg_default              = 0x00000000,
 364   regk_pio_rw_intr_mask_default            = 0x00000000,
 365   regk_pio_rw_man_ctrl_default             = 0x00000000,
 366   regk_pio_rw_oe_default                   = 0x00000000,
 367   regk_pio_wr                              = 0x00000002,
 368   regk_pio_wr_ce2                          = 0x00000003,
 369   regk_pio_yes                             = 0x00000001,
 370   regk_pio_yes_all                         = 0x000000ff
 371 };
 372 #endif /* __pio_defs_h */