2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #ifndef __AMDGPU_PSP_H__
26 #define __AMDGPU_PSP_H__
29 #include "psp_gfx_if.h"
31 #define PSP_FENCE_BUFFER_SIZE 0x1000
32 #define PSP_CMD_BUFFER_SIZE 0x1000
33 #define PSP_ASD_SHARED_MEM_SIZE 0x4000
34 #define PSP_1_MEG 0x100000
38 PSP_RING_TYPE__INVALID
= 0,
40 * These values map to the way the PSP kernel identifies the
43 PSP_RING_TYPE__UM
= 1, /* User mode ring (formerly called RBI) */
44 PSP_RING_TYPE__KM
= 2 /* Kernel mode ring (formerly called GPCOM) */
49 enum psp_ring_type ring_type
;
50 struct psp_gfx_rb_frame
*ring_mem
;
51 uint64_t ring_mem_mc_addr
;
52 void *ring_mem_handle
;
58 struct amdgpu_device
*adev
;
59 struct psp_ring km_ring
;
60 struct psp_gfx_cmd_resp
*cmd
;
62 int (*init_microcode
)(struct psp_context
*psp
);
63 int (*bootloader_load_sysdrv
)(struct psp_context
*psp
);
64 int (*bootloader_load_sos
)(struct psp_context
*psp
);
65 int (*prep_cmd_buf
)(struct amdgpu_firmware_info
*ucode
,
66 struct psp_gfx_cmd_resp
*cmd
);
67 int (*ring_init
)(struct psp_context
*psp
, enum psp_ring_type ring_type
);
68 int (*ring_create
)(struct psp_context
*psp
, enum psp_ring_type ring_type
);
69 int (*ring_destroy
)(struct psp_context
*psp
,
70 enum psp_ring_type ring_type
);
71 int (*cmd_submit
)(struct psp_context
*psp
, struct amdgpu_firmware_info
*ucode
,
72 uint64_t cmd_buf_mc_addr
, uint64_t fence_mc_addr
, int index
);
73 bool (*compare_sram_data
)(struct psp_context
*psp
,
74 struct amdgpu_firmware_info
*ucode
,
75 enum AMDGPU_UCODE_ID ucode_type
);
76 bool (*smu_reload_quirk
)(struct psp_context
*psp
);
79 struct amdgpu_bo
*fw_pri_bo
;
80 uint64_t fw_pri_mc_addr
;
84 const struct firmware
*sos_fw
;
85 uint32_t sos_fw_version
;
86 uint32_t sos_feature_version
;
87 uint32_t sys_bin_size
;
88 uint32_t sos_bin_size
;
89 uint8_t *sys_start_addr
;
90 uint8_t *sos_start_addr
;
93 struct amdgpu_bo
*tmr_bo
;
97 /* asd firmware and buffer */
98 const struct firmware
*asd_fw
;
99 uint32_t asd_fw_version
;
100 uint32_t asd_feature_version
;
101 uint32_t asd_ucode_size
;
102 uint8_t *asd_start_addr
;
103 struct amdgpu_bo
*asd_shared_bo
;
104 uint64_t asd_shared_mc_addr
;
105 void *asd_shared_buf
;
108 struct amdgpu_bo
*fence_buf_bo
;
109 uint64_t fence_buf_mc_addr
;
113 struct amdgpu_psp_funcs
{
114 bool (*check_fw_loading_status
)(struct amdgpu_device
*adev
,
115 enum AMDGPU_UCODE_ID
);
118 #define psp_prep_cmd_buf(ucode, type) (psp)->prep_cmd_buf((ucode), (type))
119 #define psp_ring_init(psp, type) (psp)->ring_init((psp), (type))
120 #define psp_ring_create(psp, type) (psp)->ring_create((psp), (type))
121 #define psp_ring_destroy(psp, type) ((psp)->ring_destroy((psp), (type)))
122 #define psp_cmd_submit(psp, ucode, cmd_mc, fence_mc, index) \
123 (psp)->cmd_submit((psp), (ucode), (cmd_mc), (fence_mc), (index))
124 #define psp_compare_sram_data(psp, ucode, type) \
125 (psp)->compare_sram_data((psp), (ucode), (type))
126 #define psp_init_microcode(psp) \
127 ((psp)->init_microcode ? (psp)->init_microcode((psp)) : 0)
128 #define psp_bootloader_load_sysdrv(psp) \
129 ((psp)->bootloader_load_sysdrv ? (psp)->bootloader_load_sysdrv((psp)) : 0)
130 #define psp_bootloader_load_sos(psp) \
131 ((psp)->bootloader_load_sos ? (psp)->bootloader_load_sos((psp)) : 0)
132 #define psp_smu_reload_quirk(psp) \
133 ((psp)->smu_reload_quirk ? (psp)->smu_reload_quirk((psp)) : false)
135 extern const struct amd_ip_funcs psp_ip_funcs
;
137 extern const struct amdgpu_ip_block_version psp_v3_1_ip_block
;
138 extern int psp_wait_for(struct psp_context
*psp
, uint32_t reg_index
,
139 uint32_t field_val
, uint32_t mask
, bool check_changed
);