drivers/gpu/drm/rcar-du/rcar_du_kms.c

   1 /*
   2  * rcar_du_kms.c  --  R-Car Display Unit Mode Setting
   3  *
   4  * Copyright (C) 2013-2015 Renesas Electronics Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <drm/drmP.h>
  15 #include <drm/drm_atomic.h>
  16 #include <drm/drm_atomic_helper.h>
  17 #include <drm/drm_crtc.h>
  18 #include <drm/drm_crtc_helper.h>
  19 #include <drm/drm_fb_cma_helper.h>
  20 #include <drm/drm_gem_cma_helper.h>
  21
  22 #include <linux/of_graph.h>
  23 #include <linux/wait.h>
  24
  25 #include "rcar_du_crtc.h"
  26 #include "rcar_du_drv.h"
  27 #include "rcar_du_encoder.h"
  28 #include "rcar_du_kms.h"
  29 #include "rcar_du_lvdsenc.h"
  30 #include "rcar_du_regs.h"
  31 #include "rcar_du_vsp.h"
  32
  33 /* -----------------------------------------------------------------------------
  34  * Format helpers
  35  */
  36
  37 static const struct rcar_du_format_info rcar_du_format_infos[] = {
  38         {
  39                 .fourcc = DRM_FORMAT_RGB565,
  40                 .bpp = 16,
  41                 .planes = 1,
  42                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  43                 .edf = PnDDCR4_EDF_NONE,
  44         }, {
  45                 .fourcc = DRM_FORMAT_ARGB1555,
  46                 .bpp = 16,
  47                 .planes = 1,
  48                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  49                 .edf = PnDDCR4_EDF_NONE,
  50         }, {
  51                 .fourcc = DRM_FORMAT_XRGB1555,
  52                 .bpp = 16,
  53                 .planes = 1,
  54                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  55                 .edf = PnDDCR4_EDF_NONE,
  56         }, {
  57                 .fourcc = DRM_FORMAT_XRGB8888,
  58                 .bpp = 32,
  59                 .planes = 1,
  60                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  61                 .edf = PnDDCR4_EDF_RGB888,
  62         }, {
  63                 .fourcc = DRM_FORMAT_ARGB8888,
  64                 .bpp = 32,
  65                 .planes = 1,
  66                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
  67                 .edf = PnDDCR4_EDF_ARGB8888,
  68         }, {
  69                 .fourcc = DRM_FORMAT_UYVY,
  70                 .bpp = 16,
  71                 .planes = 1,
  72                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  73                 .edf = PnDDCR4_EDF_NONE,
  74         }, {
  75                 .fourcc = DRM_FORMAT_YUYV,
  76                 .bpp = 16,
  77                 .planes = 1,
  78                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  79                 .edf = PnDDCR4_EDF_NONE,
  80         }, {
  81                 .fourcc = DRM_FORMAT_NV12,
  82                 .bpp = 12,
  83                 .planes = 2,
  84                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  85                 .edf = PnDDCR4_EDF_NONE,
  86         }, {
  87                 .fourcc = DRM_FORMAT_NV21,
  88                 .bpp = 12,
  89                 .planes = 2,
  90                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  91                 .edf = PnDDCR4_EDF_NONE,
  92         }, {
  93                 .fourcc = DRM_FORMAT_NV16,
  94                 .bpp = 16,
  95                 .planes = 2,
  96                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  97                 .edf = PnDDCR4_EDF_NONE,
  98         },
  99         /* The following formats are not supported on Gen2 and thus have no
 100          * associated .pnmr or .edf settings.
 101          */
 102         {
 103                 .fourcc = DRM_FORMAT_NV61,
 104                 .bpp = 16,
 105                 .planes = 2,
 106         }, {
 107                 .fourcc = DRM_FORMAT_YUV420,
 108                 .bpp = 12,
 109                 .planes = 3,
 110         }, {
 111                 .fourcc = DRM_FORMAT_YVU420,
 112                 .bpp = 12,
 113                 .planes = 3,
 114         }, {
 115                 .fourcc = DRM_FORMAT_YUV422,
 116                 .bpp = 16,
 117                 .planes = 3,
 118         }, {
 119                 .fourcc = DRM_FORMAT_YVU422,
 120                 .bpp = 16,
 121                 .planes = 3,
 122         }, {
 123                 .fourcc = DRM_FORMAT_YUV444,
 124                 .bpp = 24,
 125                 .planes = 3,
 126         }, {
 127                 .fourcc = DRM_FORMAT_YVU444,
 128                 .bpp = 24,
 129                 .planes = 3,
 130         },
 131 };
 132
 133 const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
 134 {
 135         unsigned int i;
 136
 137         for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
 138                 if (rcar_du_format_infos[i].fourcc == fourcc)
 139                         return &rcar_du_format_infos[i];
 140         }
 141
 142         return NULL;
 143 }
 144
 145 /* -----------------------------------------------------------------------------
 146  * Frame buffer
 147  */
 148
 149 int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
 150                         struct drm_mode_create_dumb *args)
 151 {
 152         struct rcar_du_device *rcdu = dev->dev_private;
 153         unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
 154         unsigned int align;
 155
 156         /* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
 157          * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
 158          */
 159         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 160                 align = 128;
 161         else
 162                 align = 16 * args->bpp / 8;
 163
 164         args->pitch = roundup(min_pitch, align);
 165
 166         return drm_gem_cma_dumb_create_internal(file, dev, args);
 167 }
 168
 169 static struct drm_framebuffer *
 170 rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
 171                   const struct drm_mode_fb_cmd2 *mode_cmd)
 172 {
 173         struct rcar_du_device *rcdu = dev->dev_private;
 174         const struct rcar_du_format_info *format;
 175         unsigned int max_pitch;
 176         unsigned int align;
 177         unsigned int bpp;
 178         unsigned int i;
 179
 180         format = rcar_du_format_info(mode_cmd->pixel_format);
 181         if (format == NULL) {
 182                 dev_dbg(dev->dev, "unsupported pixel format %08x\n",
 183                         mode_cmd->pixel_format);
 184                 return ERR_PTR(-EINVAL);
 185         }
 186
 187         /*
 188          * The pitch and alignment constraints are expressed in pixels on the
 189          * hardware side and in bytes in the DRM API.
 190          */
 191         bpp = format->planes == 1 ? format->bpp / 8 : 1;
 192         max_pitch =  4096 * bpp;
 193
 194         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 195                 align = 128;
 196         else
 197                 align = 16 * bpp;
 198
 199         if (mode_cmd->pitches[0] & (align - 1) ||
 200             mode_cmd->pitches[0] >= max_pitch) {
 201                 dev_dbg(dev->dev, "invalid pitch value %u\n",
 202                         mode_cmd->pitches[0]);
 203                 return ERR_PTR(-EINVAL);
 204         }
 205
 206         for (i = 1; i < format->planes; ++i) {
 207                 if (mode_cmd->pitches[i] != mode_cmd->pitches[0]) {
 208                         dev_dbg(dev->dev,
 209                                 "luma and chroma pitches do not match\n");
 210                         return ERR_PTR(-EINVAL);
 211                 }
 212         }
 213
 214         return drm_fb_cma_create(dev, file_priv, mode_cmd);
 215 }
 216
 217 static void rcar_du_output_poll_changed(struct drm_device *dev)
 218 {
 219         struct rcar_du_device *rcdu = dev->dev_private;
 220
 221         drm_fbdev_cma_hotplug_event(rcdu->fbdev);
 222 }
 223
 224 /* -----------------------------------------------------------------------------
 225  * Atomic Check and Update
 226  */
 227
 228 static int rcar_du_atomic_check(struct drm_device *dev,
 229                                 struct drm_atomic_state *state)
 230 {
 231         struct rcar_du_device *rcdu = dev->dev_private;
 232         int ret;
 233
 234         ret = drm_atomic_helper_check_modeset(dev, state);
 235         if (ret)
 236                 return ret;
 237
 238         ret = drm_atomic_normalize_zpos(dev, state);
 239         if (ret)
 240                 return ret;
 241
 242         ret = drm_atomic_helper_check_planes(dev, state);
 243         if (ret)
 244                 return ret;
 245
 246         if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
 247                 return 0;
 248
 249         return rcar_du_atomic_check_planes(dev, state);
 250 }
 251
 252 static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state)
 253 {
 254         struct drm_device *dev = old_state->dev;
 255
 256         /* Apply the atomic update. */
 257         drm_atomic_helper_commit_modeset_disables(dev, old_state);
 258         drm_atomic_helper_commit_modeset_enables(dev, old_state);
 259         drm_atomic_helper_commit_planes(dev, old_state,
 260                                         DRM_PLANE_COMMIT_ACTIVE_ONLY);
 261
 262         drm_atomic_helper_commit_hw_done(old_state);
 263         drm_atomic_helper_wait_for_vblanks(dev, old_state);
 264
 265         drm_atomic_helper_cleanup_planes(dev, old_state);
 266 }
 267
 268 /* -----------------------------------------------------------------------------
 269  * Initialization
 270  */
 271
 272 static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = {
 273         .atomic_commit_tail = rcar_du_atomic_commit_tail,
 274 };
 275
 276 static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
 277         .fb_create = rcar_du_fb_create,
 278         .output_poll_changed = rcar_du_output_poll_changed,
 279         .atomic_check = rcar_du_atomic_check,
 280         .atomic_commit = drm_atomic_helper_commit,
 281 };
 282
 283 static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
 284                                      enum rcar_du_output output,
 285                                      struct of_endpoint *ep)
 286 {
 287         struct device_node *connector = NULL;
 288         struct device_node *encoder = NULL;
 289         struct device_node *ep_node = NULL;
 290         struct device_node *entity_ep_node;
 291         struct device_node *entity;
 292         int ret;
 293
 294         /*
 295          * Locate the connected entity and infer its type from the number of
 296          * endpoints.
 297          */
 298         entity = of_graph_get_remote_port_parent(ep->local_node);
 299         if (!entity) {
 300                 dev_dbg(rcdu->dev, "unconnected endpoint %s, skipping\n",
 301                         ep->local_node->full_name);
 302                 return -ENODEV;
 303         }
 304
 305         if (!of_device_is_available(entity)) {
 306                 dev_dbg(rcdu->dev,
 307                         "connected entity %s is disabled, skipping\n",
 308                         entity->full_name);
 309                 return -ENODEV;
 310         }
 311
 312         entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);
 313
 314         for_each_endpoint_of_node(entity, ep_node) {
 315                 if (ep_node == entity_ep_node)
 316                         continue;
 317
 318                 /*
 319                  * We've found one endpoint other than the input, this must
 320                  * be an encoder. Locate the connector.
 321                  */
 322                 encoder = entity;
 323                 connector = of_graph_get_remote_port_parent(ep_node);
 324                 of_node_put(ep_node);
 325
 326                 if (!connector) {
 327                         dev_warn(rcdu->dev,
 328                                  "no connector for encoder %s, skipping\n",
 329                                  encoder->full_name);
 330                         of_node_put(entity_ep_node);
 331                         of_node_put(encoder);
 332                         return -ENODEV;
 333                 }
 334
 335                 break;
 336         }
 337
 338         of_node_put(entity_ep_node);
 339
 340         if (!encoder) {
 341                 /*
 342                  * If no encoder has been found the entity must be the
 343                  * connector.
 344                  */
 345                 connector = entity;
 346         }
 347
 348         ret = rcar_du_encoder_init(rcdu, output, encoder, connector);
 349         if (ret && ret != -EPROBE_DEFER)
 350                 dev_warn(rcdu->dev,
 351                          "failed to initialize encoder %s on output %u (%d), skipping\n",
 352                          of_node_full_name(encoder), output, ret);
 353
 354         of_node_put(encoder);
 355         of_node_put(connector);
 356
 357         return ret;
 358 }
 359
 360 static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
 361 {
 362         struct device_node *np = rcdu->dev->of_node;
 363         struct device_node *ep_node;
 364         unsigned int num_encoders = 0;
 365
 366         /*
 367          * Iterate over the endpoints and create one encoder for each output
 368          * pipeline.
 369          */
 370         for_each_endpoint_of_node(np, ep_node) {
 371                 enum rcar_du_output output;
 372                 struct of_endpoint ep;
 373                 unsigned int i;
 374                 int ret;
 375
 376                 ret = of_graph_parse_endpoint(ep_node, &ep);
 377                 if (ret < 0) {
 378                         of_node_put(ep_node);
 379                         return ret;
 380                 }
 381
 382                 /* Find the output route corresponding to the port number. */
 383                 for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
 384                         if (rcdu->info->routes[i].possible_crtcs &&
 385                             rcdu->info->routes[i].port == ep.port) {
 386                                 output = i;
 387                                 break;
 388                         }
 389                 }
 390
 391                 if (i == RCAR_DU_OUTPUT_MAX) {
 392                         dev_warn(rcdu->dev,
 393                                  "port %u references unexisting output, skipping\n",
 394                                  ep.port);
 395                         continue;
 396                 }
 397
 398                 /* Process the output pipeline. */
 399                 ret = rcar_du_encoders_init_one(rcdu, output, &ep);
 400                 if (ret < 0) {
 401                         if (ret == -EPROBE_DEFER) {
 402                                 of_node_put(ep_node);
 403                                 return ret;
 404                         }
 405
 406                         continue;
 407                 }
 408
 409                 num_encoders++;
 410         }
 411
 412         return num_encoders;
 413 }
 414
 415 static int rcar_du_properties_init(struct rcar_du_device *rcdu)
 416 {
 417         rcdu->props.alpha =
 418                 drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
 419         if (rcdu->props.alpha == NULL)
 420                 return -ENOMEM;
 421
 422         /* The color key is expressed as an RGB888 triplet stored in a 32-bit
 423          * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
 424          * or enable source color keying (1).
 425          */
 426         rcdu->props.colorkey =
 427                 drm_property_create_range(rcdu->ddev, 0, "colorkey",
 428                                           0, 0x01ffffff);
 429         if (rcdu->props.colorkey == NULL)
 430                 return -ENOMEM;
 431
 432         return 0;
 433 }
 434
 435 int rcar_du_modeset_init(struct rcar_du_device *rcdu)
 436 {
 437         static const unsigned int mmio_offsets[] = {
 438                 DU0_REG_OFFSET, DU2_REG_OFFSET
 439         };
 440
 441         struct drm_device *dev = rcdu->ddev;
 442         struct drm_encoder *encoder;
 443         struct drm_fbdev_cma *fbdev;
 444         unsigned int num_encoders;
 445         unsigned int num_groups;
 446         unsigned int i;
 447         int ret;
 448
 449         drm_mode_config_init(dev);
 450
 451         dev->mode_config.min_width = 0;
 452         dev->mode_config.min_height = 0;
 453         dev->mode_config.max_width = 4095;
 454         dev->mode_config.max_height = 2047;
 455         dev->mode_config.funcs = &rcar_du_mode_config_funcs;
 456         dev->mode_config.helper_private = &rcar_du_mode_config_helper;
 457
 458         rcdu->num_crtcs = rcdu->info->num_crtcs;
 459
 460         ret = rcar_du_properties_init(rcdu);
 461         if (ret < 0)
 462                 return ret;
 463
 464         /* Initialize vertical blanking interrupts handling. Start with vblank
 465          * disabled for all CRTCs.
 466          */
 467         ret = drm_vblank_init(dev, (1 << rcdu->info->num_crtcs) - 1);
 468         if (ret < 0)
 469                 return ret;
 470
 471         /* Initialize the groups. */
 472         num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
 473
 474         for (i = 0; i < num_groups; ++i) {
 475                 struct rcar_du_group *rgrp = &rcdu->groups[i];
 476
 477                 mutex_init(&rgrp->lock);
 478
 479                 rgrp->dev = rcdu;
 480                 rgrp->mmio_offset = mmio_offsets[i];
 481                 rgrp->index = i;
 482                 rgrp->num_crtcs = min(rcdu->num_crtcs - 2 * i, 2U);
 483
 484                 /* If we have more than one CRTCs in this group pre-associate
 485                  * the low-order planes with CRTC 0 and the high-order planes
 486                  * with CRTC 1 to minimize flicker occurring when the
 487                  * association is changed.
 488                  */
 489                 rgrp->dptsr_planes = rgrp->num_crtcs > 1
 490                                    ? (rcdu->info->gen >= 3 ? 0x04 : 0xf0)
 491                                    : 0;
 492
 493                 if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
 494                         ret = rcar_du_planes_init(rgrp);
 495                         if (ret < 0)
 496                                 return ret;
 497                 }
 498         }
 499
 500         /* Initialize the compositors. */
 501         if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
 502                 for (i = 0; i < rcdu->num_crtcs; ++i) {
 503                         struct rcar_du_vsp *vsp = &rcdu->vsps[i];
 504
 505                         vsp->index = i;
 506                         vsp->dev = rcdu;
 507                         rcdu->crtcs[i].vsp = vsp;
 508
 509                         ret = rcar_du_vsp_init(vsp);
 510                         if (ret < 0)
 511                                 return ret;
 512                 }
 513         }
 514
 515         /* Create the CRTCs. */
 516         for (i = 0; i < rcdu->num_crtcs; ++i) {
 517                 struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
 518
 519                 ret = rcar_du_crtc_create(rgrp, i);
 520                 if (ret < 0)
 521                         return ret;
 522         }
 523
 524         /* Initialize the encoders. */
 525         ret = rcar_du_lvdsenc_init(rcdu);
 526         if (ret < 0)
 527                 return ret;
 528
 529         ret = rcar_du_encoders_init(rcdu);
 530         if (ret < 0)
 531                 return ret;
 532
 533         if (ret == 0) {
 534                 dev_err(rcdu->dev, "error: no encoder could be initialized\n");
 535                 return -EINVAL;
 536         }
 537
 538         num_encoders = ret;
 539
 540         /* Set the possible CRTCs and possible clones. There's always at least
 541          * one way for all encoders to clone each other, set all bits in the
 542          * possible clones field.
 543          */
 544         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 545                 struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
 546                 const struct rcar_du_output_routing *route =
 547                         &rcdu->info->routes[renc->output];
 548
 549                 encoder->possible_crtcs = route->possible_crtcs;
 550                 encoder->possible_clones = (1 << num_encoders) - 1;
 551         }
 552
 553         drm_mode_config_reset(dev);
 554
 555         drm_kms_helper_poll_init(dev);
 556
 557         if (dev->mode_config.num_connector) {
 558                 fbdev = drm_fbdev_cma_init(dev, 32,
 559                                            dev->mode_config.num_connector);
 560                 if (IS_ERR(fbdev))
 561                         return PTR_ERR(fbdev);
 562
 563                 rcdu->fbdev = fbdev;
 564         } else {
 565                 dev_info(rcdu->dev,
 566                          "no connector found, disabling fbdev emulation\n");
 567         }
 568
 569         return 0;
 570 }