drivers/gpu/drm/nouveau/nvc0_graph.h

   1 /*
   2  * Copyright 2010 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #ifndef __NVC0_GRAPH_H__
  26 #define __NVC0_GRAPH_H__
  27
  28 #define GPC_MAX 4
  29 #define TP_MAX 32
  30
  31 #define ROP_BCAST(r)   (0x408800 + (r))
  32 #define ROP_UNIT(u,r)  (0x410000 + (u) * 0x400 + (r))
  33 #define GPC_BCAST(r)   (0x418000 + (r))
  34 #define GPC_UNIT(t,r)  (0x500000 + (t) * 0x8000 + (r))
  35 #define TP_UNIT(t,m,r) (0x504000 + (t) * 0x8000 + (m) * 0x800 + (r))
  36
  37 struct nvc0_graph_priv {
  38         u8 gpc_nr;
  39         u8 rop_nr;
  40         u8 tp_nr[GPC_MAX];
  41         u8 tp_total;
  42
  43         u32  grctx_size;
  44         u32 *grctx_vals;
  45         struct nouveau_gpuobj *unk4188b4;
  46         struct nouveau_gpuobj *unk4188b8;
  47
  48         u8  magic_not_rop_nr;
  49         u32 magicgpc980[4];
  50         u32 magicgpc918;
  51 };
  52
  53 struct nvc0_graph_chan {
  54         struct nouveau_gpuobj *grctx;
  55         struct nouveau_gpuobj *unk408004; // 0x418810 too
  56         struct nouveau_gpuobj *unk40800c; // 0x419004 too
  57         struct nouveau_gpuobj *unk418810; // 0x419848 too
  58         struct nouveau_gpuobj *mmio;
  59         int mmio_nr;
  60 };
  61
  62 int nvc0_grctx_generate(struct nouveau_channel *);
  63
  64 #endif