FRV: Use generic show_interrupts()
[cris-mirror.git] / drivers / gpu / drm / radeon / cayman_blit_shaders.c
blobe148ab04b80b3adc88d0ac4a0329599f57ac2c00
1 /*
2 * Copyright 2010 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
23 * Authors:
24 * Alex Deucher <alexander.deucher@amd.com>
27 #include <linux/types.h>
28 #include <linux/kernel.h>
31 * evergreen cards need to use the 3D engine to blit data which requires
32 * quite a bit of hw state setup. Rather than pull the whole 3D driver
33 * (which normally generates the 3D state) into the DRM, we opt to use
34 * statically generated state tables. The regsiter state and shaders
35 * were hand generated to support blitting functionality. See the 3D
36 * driver or documentation for descriptions of the registers and
37 * shader instructions.
40 const u32 cayman_default_state[] =
42 /* XXX fill in additional blit state */
44 0xc0026900,
45 0x00000316,
46 0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */
47 0x00000010, /* */
49 0xc0026900,
50 0x000000d9,
51 0x00000000, /* CP_RINGID */
52 0x00000000, /* CP_VMID */
55 const u32 cayman_default_size = ARRAY_SIZE(cayman_default_state);