FRV: Use generic show_interrupts()
[cris-mirror.git] / drivers / media / dvb / frontends / tda10021.c
blob6ca533ea0f0ec047258a568335b7fa17e3762b96
1 /*
2 TDA10021 - Single Chip Cable Channel Receiver driver module
3 used on the Siemens DVB-C cards
5 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
6 Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
7 Support for TDA10021
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/delay.h>
25 #include <linux/errno.h>
26 #include <linux/init.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/string.h>
30 #include <linux/slab.h>
32 #include "dvb_frontend.h"
33 #include "tda1002x.h"
36 struct tda10021_state {
37 struct i2c_adapter* i2c;
38 /* configuration settings */
39 const struct tda1002x_config* config;
40 struct dvb_frontend frontend;
42 u8 pwm;
43 u8 reg0;
47 #if 0
48 #define dprintk(x...) printk(x)
49 #else
50 #define dprintk(x...)
51 #endif
53 static int verbose;
55 #define XIN 57840000UL
57 #define FIN (XIN >> 4)
59 static int tda10021_inittab_size = 0x40;
60 static u8 tda10021_inittab[0x40]=
62 0x73, 0x6a, 0x23, 0x0a, 0x02, 0x37, 0x77, 0x1a,
63 0x37, 0x6a, 0x17, 0x8a, 0x1e, 0x86, 0x43, 0x40,
64 0xb8, 0x3f, 0xa1, 0x00, 0xcd, 0x01, 0x00, 0xff,
65 0x11, 0x00, 0x7c, 0x31, 0x30, 0x20, 0x00, 0x00,
66 0x02, 0x00, 0x00, 0x7d, 0x00, 0x00, 0x00, 0x00,
67 0x07, 0x00, 0x33, 0x11, 0x0d, 0x95, 0x08, 0x58,
68 0x00, 0x00, 0x80, 0x00, 0x80, 0xff, 0x00, 0x00,
69 0x04, 0x2d, 0x2f, 0xff, 0x00, 0x00, 0x00, 0x00,
72 static int _tda10021_writereg (struct tda10021_state* state, u8 reg, u8 data)
74 u8 buf[] = { reg, data };
75 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
76 int ret;
78 ret = i2c_transfer (state->i2c, &msg, 1);
79 if (ret != 1)
80 printk("DVB: TDA10021(%d): %s, writereg error "
81 "(reg == 0x%02x, val == 0x%02x, ret == %i)\n",
82 state->frontend.dvb->num, __func__, reg, data, ret);
84 msleep(10);
85 return (ret != 1) ? -EREMOTEIO : 0;
88 static u8 tda10021_readreg (struct tda10021_state* state, u8 reg)
90 u8 b0 [] = { reg };
91 u8 b1 [] = { 0 };
92 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
93 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
94 int ret;
96 ret = i2c_transfer (state->i2c, msg, 2);
97 // Don't print an error message if the id is read.
98 if (ret != 2 && reg != 0x1a)
99 printk("DVB: TDA10021: %s: readreg error (ret == %i)\n",
100 __func__, ret);
101 return b1[0];
104 //get access to tuner
105 static int lock_tuner(struct tda10021_state* state)
107 u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] | 0x80 };
108 struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
110 if(i2c_transfer(state->i2c, &msg, 1) != 1)
112 printk("tda10021: lock tuner fails\n");
113 return -EREMOTEIO;
115 return 0;
118 //release access from tuner
119 static int unlock_tuner(struct tda10021_state* state)
121 u8 buf[2] = { 0x0f, tda10021_inittab[0x0f] & 0x7f };
122 struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
124 if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
126 printk("tda10021: unlock tuner fails\n");
127 return -EREMOTEIO;
129 return 0;
132 static int tda10021_setup_reg0 (struct tda10021_state* state, u8 reg0,
133 fe_spectral_inversion_t inversion)
135 reg0 |= state->reg0 & 0x63;
137 if ((INVERSION_ON == inversion) ^ (state->config->invert == 0))
138 reg0 &= ~0x20;
139 else
140 reg0 |= 0x20;
142 _tda10021_writereg (state, 0x00, reg0 & 0xfe);
143 _tda10021_writereg (state, 0x00, reg0 | 0x01);
145 state->reg0 = reg0;
146 return 0;
149 static int tda10021_set_symbolrate (struct tda10021_state* state, u32 symbolrate)
151 s32 BDR;
152 s32 BDRI;
153 s16 SFIL=0;
154 u16 NDEC = 0;
155 u32 tmp, ratio;
157 if (symbolrate > XIN/2)
158 symbolrate = XIN/2;
159 if (symbolrate < 500000)
160 symbolrate = 500000;
162 if (symbolrate < XIN/16) NDEC = 1;
163 if (symbolrate < XIN/32) NDEC = 2;
164 if (symbolrate < XIN/64) NDEC = 3;
166 if (symbolrate < (u32)(XIN/12.3)) SFIL = 1;
167 if (symbolrate < (u32)(XIN/16)) SFIL = 0;
168 if (symbolrate < (u32)(XIN/24.6)) SFIL = 1;
169 if (symbolrate < (u32)(XIN/32)) SFIL = 0;
170 if (symbolrate < (u32)(XIN/49.2)) SFIL = 1;
171 if (symbolrate < (u32)(XIN/64)) SFIL = 0;
172 if (symbolrate < (u32)(XIN/98.4)) SFIL = 1;
174 symbolrate <<= NDEC;
175 ratio = (symbolrate << 4) / FIN;
176 tmp = ((symbolrate << 4) % FIN) << 8;
177 ratio = (ratio << 8) + tmp / FIN;
178 tmp = (tmp % FIN) << 8;
179 ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, FIN);
181 BDR = ratio;
182 BDRI = (((XIN << 5) / symbolrate) + 1) / 2;
184 if (BDRI > 0xFF)
185 BDRI = 0xFF;
187 SFIL = (SFIL << 4) | tda10021_inittab[0x0E];
189 NDEC = (NDEC << 6) | tda10021_inittab[0x03];
191 _tda10021_writereg (state, 0x03, NDEC);
192 _tda10021_writereg (state, 0x0a, BDR&0xff);
193 _tda10021_writereg (state, 0x0b, (BDR>> 8)&0xff);
194 _tda10021_writereg (state, 0x0c, (BDR>>16)&0x3f);
196 _tda10021_writereg (state, 0x0d, BDRI);
197 _tda10021_writereg (state, 0x0e, SFIL);
199 return 0;
202 static int tda10021_init (struct dvb_frontend *fe)
204 struct tda10021_state* state = fe->demodulator_priv;
205 int i;
207 dprintk("DVB: TDA10021(%d): init chip\n", fe->adapter->num);
209 //_tda10021_writereg (fe, 0, 0);
211 for (i=0; i<tda10021_inittab_size; i++)
212 _tda10021_writereg (state, i, tda10021_inittab[i]);
214 _tda10021_writereg (state, 0x34, state->pwm);
216 //Comment by markus
217 //0x2A[3-0] == PDIV -> P multiplaying factor (P=PDIV+1)(default 0)
218 //0x2A[4] == BYPPLL -> Power down mode (default 1)
219 //0x2A[5] == LCK -> PLL Lock Flag
220 //0x2A[6] == POLAXIN -> Polarity of the input reference clock (default 0)
222 //Activate PLL
223 _tda10021_writereg(state, 0x2a, tda10021_inittab[0x2a] & 0xef);
224 return 0;
227 static int tda10021_set_parameters (struct dvb_frontend *fe,
228 struct dvb_frontend_parameters *p)
230 struct tda10021_state* state = fe->demodulator_priv;
232 //table for QAM4-QAM256 ready QAM4 QAM16 QAM32 QAM64 QAM128 QAM256
233 //CONF
234 static const u8 reg0x00 [] = { 0x14, 0x00, 0x04, 0x08, 0x0c, 0x10 };
235 //AGCREF value
236 static const u8 reg0x01 [] = { 0x78, 0x8c, 0x8c, 0x6a, 0x78, 0x5c };
237 //LTHR value
238 static const u8 reg0x05 [] = { 0x78, 0x87, 0x64, 0x46, 0x36, 0x26 };
239 //MSETH
240 static const u8 reg0x08 [] = { 0x8c, 0xa2, 0x74, 0x43, 0x34, 0x23 };
241 //AREF
242 static const u8 reg0x09 [] = { 0x96, 0x91, 0x96, 0x6a, 0x7e, 0x6b };
244 int qam = p->u.qam.modulation;
246 if (qam < 0 || qam > 5)
247 return -EINVAL;
249 if (p->inversion != INVERSION_ON && p->inversion != INVERSION_OFF)
250 return -EINVAL;
252 //printk("tda10021: set frequency to %d qam=%d symrate=%d\n", p->frequency,qam,p->u.qam.symbol_rate);
254 if (fe->ops.tuner_ops.set_params) {
255 fe->ops.tuner_ops.set_params(fe, p);
256 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
259 tda10021_set_symbolrate (state, p->u.qam.symbol_rate);
260 _tda10021_writereg (state, 0x34, state->pwm);
262 _tda10021_writereg (state, 0x01, reg0x01[qam]);
263 _tda10021_writereg (state, 0x05, reg0x05[qam]);
264 _tda10021_writereg (state, 0x08, reg0x08[qam]);
265 _tda10021_writereg (state, 0x09, reg0x09[qam]);
267 tda10021_setup_reg0 (state, reg0x00[qam], p->inversion);
269 return 0;
272 static int tda10021_read_status(struct dvb_frontend* fe, fe_status_t* status)
274 struct tda10021_state* state = fe->demodulator_priv;
275 int sync;
277 *status = 0;
278 //0x11[0] == EQALGO -> Equalizer algorithms state
279 //0x11[1] == CARLOCK -> Carrier locked
280 //0x11[2] == FSYNC -> Frame synchronisation
281 //0x11[3] == FEL -> Front End locked
282 //0x11[6] == NODVB -> DVB Mode Information
283 sync = tda10021_readreg (state, 0x11);
285 if (sync & 2)
286 *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
288 if (sync & 4)
289 *status |= FE_HAS_SYNC|FE_HAS_VITERBI;
291 if (sync & 8)
292 *status |= FE_HAS_LOCK;
294 return 0;
297 static int tda10021_read_ber(struct dvb_frontend* fe, u32* ber)
299 struct tda10021_state* state = fe->demodulator_priv;
301 u32 _ber = tda10021_readreg(state, 0x14) |
302 (tda10021_readreg(state, 0x15) << 8) |
303 ((tda10021_readreg(state, 0x16) & 0x0f) << 16);
304 _tda10021_writereg(state, 0x10, (tda10021_readreg(state, 0x10) & ~0xc0)
305 | (tda10021_inittab[0x10] & 0xc0));
306 *ber = 10 * _ber;
308 return 0;
311 static int tda10021_read_signal_strength(struct dvb_frontend* fe, u16* strength)
313 struct tda10021_state* state = fe->demodulator_priv;
315 u8 config = tda10021_readreg(state, 0x02);
316 u8 gain = tda10021_readreg(state, 0x17);
317 if (config & 0x02)
318 /* the agc value is inverted */
319 gain = ~gain;
320 *strength = (gain << 8) | gain;
322 return 0;
325 static int tda10021_read_snr(struct dvb_frontend* fe, u16* snr)
327 struct tda10021_state* state = fe->demodulator_priv;
329 u8 quality = ~tda10021_readreg(state, 0x18);
330 *snr = (quality << 8) | quality;
332 return 0;
335 static int tda10021_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
337 struct tda10021_state* state = fe->demodulator_priv;
339 *ucblocks = tda10021_readreg (state, 0x13) & 0x7f;
340 if (*ucblocks == 0x7f)
341 *ucblocks = 0xffffffff;
343 /* reset uncorrected block counter */
344 _tda10021_writereg (state, 0x10, tda10021_inittab[0x10] & 0xdf);
345 _tda10021_writereg (state, 0x10, tda10021_inittab[0x10]);
347 return 0;
350 static int tda10021_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
352 struct tda10021_state* state = fe->demodulator_priv;
353 int sync;
354 s8 afc = 0;
356 sync = tda10021_readreg(state, 0x11);
357 afc = tda10021_readreg(state, 0x19);
358 if (verbose) {
359 /* AFC only valid when carrier has been recovered */
360 printk(sync & 2 ? "DVB: TDA10021(%d): AFC (%d) %dHz\n" :
361 "DVB: TDA10021(%d): [AFC (%d) %dHz]\n",
362 state->frontend.dvb->num, afc,
363 -((s32)p->u.qam.symbol_rate * afc) >> 10);
366 p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVERSION_OFF;
367 p->u.qam.modulation = ((state->reg0 >> 2) & 7) + QAM_16;
369 p->u.qam.fec_inner = FEC_NONE;
370 p->frequency = ((p->frequency + 31250) / 62500) * 62500;
372 if (sync & 2)
373 p->frequency -= ((s32)p->u.qam.symbol_rate * afc) >> 10;
375 return 0;
378 static int tda10021_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
380 struct tda10021_state* state = fe->demodulator_priv;
382 if (enable) {
383 lock_tuner(state);
384 } else {
385 unlock_tuner(state);
387 return 0;
390 static int tda10021_sleep(struct dvb_frontend* fe)
392 struct tda10021_state* state = fe->demodulator_priv;
394 _tda10021_writereg (state, 0x1b, 0x02); /* pdown ADC */
395 _tda10021_writereg (state, 0x00, 0x80); /* standby */
397 return 0;
400 static void tda10021_release(struct dvb_frontend* fe)
402 struct tda10021_state* state = fe->demodulator_priv;
403 kfree(state);
406 static struct dvb_frontend_ops tda10021_ops;
408 struct dvb_frontend* tda10021_attach(const struct tda1002x_config* config,
409 struct i2c_adapter* i2c,
410 u8 pwm)
412 struct tda10021_state* state = NULL;
413 u8 id;
415 /* allocate memory for the internal state */
416 state = kzalloc(sizeof(struct tda10021_state), GFP_KERNEL);
417 if (state == NULL) goto error;
419 /* setup the state */
420 state->config = config;
421 state->i2c = i2c;
422 state->pwm = pwm;
423 state->reg0 = tda10021_inittab[0];
425 /* check if the demod is there */
426 id = tda10021_readreg(state, 0x1a);
427 if ((id & 0xf0) != 0x70) goto error;
429 /* Don't claim TDA10023 */
430 if (id == 0x7d)
431 goto error;
433 printk("TDA10021: i2c-addr = 0x%02x, id = 0x%02x\n",
434 state->config->demod_address, id);
436 /* create dvb_frontend */
437 memcpy(&state->frontend.ops, &tda10021_ops, sizeof(struct dvb_frontend_ops));
438 state->frontend.demodulator_priv = state;
439 return &state->frontend;
441 error:
442 kfree(state);
443 return NULL;
446 static struct dvb_frontend_ops tda10021_ops = {
448 .info = {
449 .name = "Philips TDA10021 DVB-C",
450 .type = FE_QAM,
451 .frequency_stepsize = 62500,
452 .frequency_min = 47000000,
453 .frequency_max = 862000000,
454 .symbol_rate_min = (XIN/2)/64, /* SACLK/64 == (XIN/2)/64 */
455 .symbol_rate_max = (XIN/2)/4, /* SACLK/4 */
456 #if 0
457 .frequency_tolerance = ???,
458 .symbol_rate_tolerance = ???, /* ppm */ /* == 8% (spec p. 5) */
459 #endif
460 .caps = 0x400 | //FE_CAN_QAM_4
461 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
462 FE_CAN_QAM_128 | FE_CAN_QAM_256 |
463 FE_CAN_FEC_AUTO
466 .release = tda10021_release,
468 .init = tda10021_init,
469 .sleep = tda10021_sleep,
470 .i2c_gate_ctrl = tda10021_i2c_gate_ctrl,
472 .set_frontend = tda10021_set_parameters,
473 .get_frontend = tda10021_get_frontend,
475 .read_status = tda10021_read_status,
476 .read_ber = tda10021_read_ber,
477 .read_signal_strength = tda10021_read_signal_strength,
478 .read_snr = tda10021_read_snr,
479 .read_ucblocks = tda10021_read_ucblocks,
482 module_param(verbose, int, 0644);
483 MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
485 MODULE_DESCRIPTION("Philips TDA10021 DVB-C demodulator driver");
486 MODULE_AUTHOR("Ralph Metzler, Holger Waechtler, Markus Schulz");
487 MODULE_LICENSE("GPL");
489 EXPORT_SYMBOL(tda10021_attach);