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FRV: Use generic show_interrupts()
[cris-mirror.git] / drivers / net / e1000e / netdev.c
bloba39d4a4d871c2aac2c3fd2a662924b44ed9eb011
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2011 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/vmalloc.h>
36 #include <linux/pagemap.h>
37 #include <linux/delay.h>
38 #include <linux/netdevice.h>
39 #include <linux/tcp.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/mii.h>
45 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/cpu.h>
48 #include <linux/smp.h>
49 #include <linux/pm_qos_params.h>
50 #include <linux/pm_runtime.h>
51 #include <linux/aer.h>
52
53 #include "e1000.h"
54
55 #define DRV_EXTRAVERSION "-k2"
56
57 #define DRV_VERSION "1.3.10" DRV_EXTRAVERSION
58 char e1000e_driver_name[] = "e1000e";
59 const char e1000e_driver_version[] = DRV_VERSION;
60
61 static const struct e1000_info *e1000_info_tbl[] = {
62 [board_82571] = &e1000_82571_info,
63 [board_82572] = &e1000_82572_info,
64 [board_82573] = &e1000_82573_info,
65 [board_82574] = &e1000_82574_info,
66 [board_82583] = &e1000_82583_info,
67 [board_80003es2lan] = &e1000_es2_info,
68 [board_ich8lan] = &e1000_ich8_info,
69 [board_ich9lan] = &e1000_ich9_info,
70 [board_ich10lan] = &e1000_ich10_info,
71 [board_pchlan] = &e1000_pch_info,
72 [board_pch2lan] = &e1000_pch2_info,
73 };
74
75 struct e1000_reg_info {
76 u32 ofs;
77 char *name;
78 };
79
80 #define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
81 #define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
82 #define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
83 #define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
84 #define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
85
86 #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
87 #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
88 #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
89 #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
90 #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
91
92 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
93
94 /* General Registers */
95 {E1000_CTRL, "CTRL"},
96 {E1000_STATUS, "STATUS"},
97 {E1000_CTRL_EXT, "CTRL_EXT"},
98
99 /* Interrupt Registers */
100 {E1000_ICR, "ICR"},
101
102 /* Rx Registers */
103 {E1000_RCTL, "RCTL"},
104 {E1000_RDLEN, "RDLEN"},
105 {E1000_RDH, "RDH"},
106 {E1000_RDT, "RDT"},
107 {E1000_RDTR, "RDTR"},
108 {E1000_RXDCTL(0), "RXDCTL"},
109 {E1000_ERT, "ERT"},
110 {E1000_RDBAL, "RDBAL"},
111 {E1000_RDBAH, "RDBAH"},
112 {E1000_RDFH, "RDFH"},
113 {E1000_RDFT, "RDFT"},
114 {E1000_RDFHS, "RDFHS"},
115 {E1000_RDFTS, "RDFTS"},
116 {E1000_RDFPC, "RDFPC"},
117
118 /* Tx Registers */
119 {E1000_TCTL, "TCTL"},
120 {E1000_TDBAL, "TDBAL"},
121 {E1000_TDBAH, "TDBAH"},
122 {E1000_TDLEN, "TDLEN"},
123 {E1000_TDH, "TDH"},
124 {E1000_TDT, "TDT"},
125 {E1000_TIDV, "TIDV"},
126 {E1000_TXDCTL(0), "TXDCTL"},
127 {E1000_TADV, "TADV"},
128 {E1000_TARC(0), "TARC"},
129 {E1000_TDFH, "TDFH"},
130 {E1000_TDFT, "TDFT"},
131 {E1000_TDFHS, "TDFHS"},
132 {E1000_TDFTS, "TDFTS"},
133 {E1000_TDFPC, "TDFPC"},
134
135 /* List Terminator */
136 {}
137 };
138
139 /*
140 * e1000_regdump - register printout routine
141 */
142 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
143 {
144 int n = 0;
145 char rname[16];
146 u32 regs[8];
147
148 switch (reginfo->ofs) {
149 case E1000_RXDCTL(0):
150 for (n = 0; n < 2; n++)
151 regs[n] = __er32(hw, E1000_RXDCTL(n));
152 break;
153 case E1000_TXDCTL(0):
154 for (n = 0; n < 2; n++)
155 regs[n] = __er32(hw, E1000_TXDCTL(n));
156 break;
157 case E1000_TARC(0):
158 for (n = 0; n < 2; n++)
159 regs[n] = __er32(hw, E1000_TARC(n));
160 break;
161 default:
162 printk(KERN_INFO "%-15s %08x\n",
163 reginfo->name, __er32(hw, reginfo->ofs));
164 return;
165 }
166
167 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
168 printk(KERN_INFO "%-15s ", rname);
169 for (n = 0; n < 2; n++)
170 printk(KERN_CONT "%08x ", regs[n]);
171 printk(KERN_CONT "\n");
172 }
173
174 /*
175 * e1000e_dump - Print registers, Tx-ring and Rx-ring
176 */
177 static void e1000e_dump(struct e1000_adapter *adapter)
178 {
179 struct net_device *netdev = adapter->netdev;
180 struct e1000_hw *hw = &adapter->hw;
181 struct e1000_reg_info *reginfo;
182 struct e1000_ring *tx_ring = adapter->tx_ring;
183 struct e1000_tx_desc *tx_desc;
184 struct my_u0 {
185 u64 a;
186 u64 b;
187 } *u0;
188 struct e1000_buffer *buffer_info;
189 struct e1000_ring *rx_ring = adapter->rx_ring;
190 union e1000_rx_desc_packet_split *rx_desc_ps;
191 struct e1000_rx_desc *rx_desc;
192 struct my_u1 {
193 u64 a;
194 u64 b;
195 u64 c;
196 u64 d;
197 } *u1;
198 u32 staterr;
199 int i = 0;
200
201 if (!netif_msg_hw(adapter))
202 return;
203
204 /* Print netdevice Info */
205 if (netdev) {
206 dev_info(&adapter->pdev->dev, "Net device Info\n");
207 printk(KERN_INFO "Device Name state "
208 "trans_start last_rx\n");
209 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
210 netdev->name, netdev->state, netdev->trans_start,
211 netdev->last_rx);
212 }
213
214 /* Print Registers */
215 dev_info(&adapter->pdev->dev, "Register Dump\n");
216 printk(KERN_INFO " Register Name Value\n");
217 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
218 reginfo->name; reginfo++) {
219 e1000_regdump(hw, reginfo);
220 }
221
222 /* Print Tx Ring Summary */
223 if (!netdev || !netif_running(netdev))
224 goto exit;
225
226 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
227 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
228 " leng ntw timestamp\n");
229 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
230 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
231 0, tx_ring->next_to_use, tx_ring->next_to_clean,
232 (unsigned long long)buffer_info->dma,
233 buffer_info->length,
234 buffer_info->next_to_watch,
235 (unsigned long long)buffer_info->time_stamp);
236
237 /* Print Tx Ring */
238 if (!netif_msg_tx_done(adapter))
239 goto rx_ring_summary;
240
241 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
242
243 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
244 *
245 * Legacy Transmit Descriptor
246 * +--------------------------------------------------------------+
247 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
248 * +--------------------------------------------------------------+
249 * 8 | Special | CSS | Status | CMD | CSO | Length |
250 * +--------------------------------------------------------------+
251 * 63 48 47 36 35 32 31 24 23 16 15 0
252 *
253 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
254 * 63 48 47 40 39 32 31 16 15 8 7 0
255 * +----------------------------------------------------------------+
256 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
257 * +----------------------------------------------------------------+
258 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
259 * +----------------------------------------------------------------+
260 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
261 *
262 * Extended Data Descriptor (DTYP=0x1)
263 * +----------------------------------------------------------------+
264 * 0 | Buffer Address [63:0] |
265 * +----------------------------------------------------------------+
266 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
267 * +----------------------------------------------------------------+
268 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
269 */
270 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
271 " [bi->dma ] leng ntw timestamp bi->skb "
272 "<-- Legacy format\n");
273 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
274 " [bi->dma ] leng ntw timestamp bi->skb "
275 "<-- Ext Context format\n");
276 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
277 " [bi->dma ] leng ntw timestamp bi->skb "
278 "<-- Ext Data format\n");
279 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
280 tx_desc = E1000_TX_DESC(*tx_ring, i);
281 buffer_info = &tx_ring->buffer_info[i];
282 u0 = (struct my_u0 *)tx_desc;
283 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
284 "%04X %3X %016llX %p",
285 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
286 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i,
287 (unsigned long long)le64_to_cpu(u0->a),
288 (unsigned long long)le64_to_cpu(u0->b),
289 (unsigned long long)buffer_info->dma,
290 buffer_info->length, buffer_info->next_to_watch,
291 (unsigned long long)buffer_info->time_stamp,
292 buffer_info->skb);
293 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
294 printk(KERN_CONT " NTC/U\n");
295 else if (i == tx_ring->next_to_use)
296 printk(KERN_CONT " NTU\n");
297 else if (i == tx_ring->next_to_clean)
298 printk(KERN_CONT " NTC\n");
299 else
300 printk(KERN_CONT "\n");
301
302 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
304 16, 1, phys_to_virt(buffer_info->dma),
305 buffer_info->length, true);
306 }
307
308 /* Print Rx Ring Summary */
309 rx_ring_summary:
310 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
311 printk(KERN_INFO "Queue [NTU] [NTC]\n");
312 printk(KERN_INFO " %5d %5X %5X\n", 0,
313 rx_ring->next_to_use, rx_ring->next_to_clean);
314
315 /* Print Rx Ring */
316 if (!netif_msg_rx_status(adapter))
317 goto exit;
318
319 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
320 switch (adapter->rx_ps_pages) {
321 case 1:
322 case 2:
323 case 3:
324 /* [Extended] Packet Split Receive Descriptor Format
325 *
326 * +-----------------------------------------------------+
327 * 0 | Buffer Address 0 [63:0] |
328 * +-----------------------------------------------------+
329 * 8 | Buffer Address 1 [63:0] |
330 * +-----------------------------------------------------+
331 * 16 | Buffer Address 2 [63:0] |
332 * +-----------------------------------------------------+
333 * 24 | Buffer Address 3 [63:0] |
334 * +-----------------------------------------------------+
335 */
336 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
337 "[buffer 1 63:0 ] "
338 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
339 "[bi->skb] <-- Ext Pkt Split format\n");
340 /* [Extended] Receive Descriptor (Write-Back) Format
341 *
342 * 63 48 47 32 31 13 12 8 7 4 3 0
343 * +------------------------------------------------------+
344 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
345 * | Checksum | Ident | | Queue | | Type |
346 * +------------------------------------------------------+
347 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
348 * +------------------------------------------------------+
349 * 63 48 47 32 31 20 19 0
350 */
351 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
352 "[vl l0 ee es] "
353 "[ l3 l2 l1 hs] [reserved ] ---------------- "
354 "[bi->skb] <-- Ext Rx Write-Back format\n");
355 for (i = 0; i < rx_ring->count; i++) {
356 buffer_info = &rx_ring->buffer_info[i];
357 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
358 u1 = (struct my_u1 *)rx_desc_ps;
359 staterr =
360 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
361 if (staterr & E1000_RXD_STAT_DD) {
362 /* Descriptor Done */
363 printk(KERN_INFO "RWB[0x%03X] %016llX "
364 "%016llX %016llX %016llX "
365 "---------------- %p", i,
366 (unsigned long long)le64_to_cpu(u1->a),
367 (unsigned long long)le64_to_cpu(u1->b),
368 (unsigned long long)le64_to_cpu(u1->c),
369 (unsigned long long)le64_to_cpu(u1->d),
370 buffer_info->skb);
371 } else {
372 printk(KERN_INFO "R [0x%03X] %016llX "
373 "%016llX %016llX %016llX %016llX %p", i,
374 (unsigned long long)le64_to_cpu(u1->a),
375 (unsigned long long)le64_to_cpu(u1->b),
376 (unsigned long long)le64_to_cpu(u1->c),
377 (unsigned long long)le64_to_cpu(u1->d),
378 (unsigned long long)buffer_info->dma,
379 buffer_info->skb);
380
381 if (netif_msg_pktdata(adapter))
382 print_hex_dump(KERN_INFO, "",
383 DUMP_PREFIX_ADDRESS, 16, 1,
384 phys_to_virt(buffer_info->dma),
385 adapter->rx_ps_bsize0, true);
386 }
387
388 if (i == rx_ring->next_to_use)
389 printk(KERN_CONT " NTU\n");
390 else if (i == rx_ring->next_to_clean)
391 printk(KERN_CONT " NTC\n");
392 else
393 printk(KERN_CONT "\n");
394 }
395 break;
396 default:
397 case 0:
398 /* Legacy Receive Descriptor Format
399 *
400 * +-----------------------------------------------------+
401 * | Buffer Address [63:0] |
402 * +-----------------------------------------------------+
403 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
404 * +-----------------------------------------------------+
405 * 63 48 47 40 39 32 31 16 15 0
406 */
407 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
408 "[vl er S cks ln] [bi->dma ] [bi->skb] "
409 "<-- Legacy format\n");
410 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
411 rx_desc = E1000_RX_DESC(*rx_ring, i);
412 buffer_info = &rx_ring->buffer_info[i];
413 u0 = (struct my_u0 *)rx_desc;
414 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
415 "%016llX %p", i,
416 (unsigned long long)le64_to_cpu(u0->a),
417 (unsigned long long)le64_to_cpu(u0->b),
418 (unsigned long long)buffer_info->dma,
419 buffer_info->skb);
420 if (i == rx_ring->next_to_use)
421 printk(KERN_CONT " NTU\n");
422 else if (i == rx_ring->next_to_clean)
423 printk(KERN_CONT " NTC\n");
424 else
425 printk(KERN_CONT "\n");
426
427 if (netif_msg_pktdata(adapter))
428 print_hex_dump(KERN_INFO, "",
429 DUMP_PREFIX_ADDRESS,
430 16, 1,
431 phys_to_virt(buffer_info->dma),
432 adapter->rx_buffer_len, true);
433 }
434 }
435
436 exit:
437 return;
438 }
439
440 /**
441 * e1000_desc_unused - calculate if we have unused descriptors
442 **/
443 static int e1000_desc_unused(struct e1000_ring *ring)
444 {
445 if (ring->next_to_clean > ring->next_to_use)
446 return ring->next_to_clean - ring->next_to_use - 1;
447
448 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
449 }
450
451 /**
452 * e1000_receive_skb - helper function to handle Rx indications
453 * @adapter: board private structure
454 * @status: descriptor status field as written by hardware
455 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
456 * @skb: pointer to sk_buff to be indicated to stack
457 **/
458 static void e1000_receive_skb(struct e1000_adapter *adapter,
459 struct net_device *netdev, struct sk_buff *skb,
460 u8 status, __le16 vlan)
461 {
462 skb->protocol = eth_type_trans(skb, netdev);
463
464 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
465 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
466 le16_to_cpu(vlan), skb);
467 else
468 napi_gro_receive(&adapter->napi, skb);
469 }
470
471 /**
472 * e1000_rx_checksum - Receive Checksum Offload
473 * @adapter: board private structure
474 * @status_err: receive descriptor status and error fields
475 * @csum: receive descriptor csum field
476 * @sk_buff: socket buffer with received data
477 **/
478 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
479 u32 csum, struct sk_buff *skb)
480 {
481 u16 status = (u16)status_err;
482 u8 errors = (u8)(status_err >> 24);
483
484 skb_checksum_none_assert(skb);
485
486 /* Ignore Checksum bit is set */
487 if (status & E1000_RXD_STAT_IXSM)
488 return;
489 /* TCP/UDP checksum error bit is set */
490 if (errors & E1000_RXD_ERR_TCPE) {
491 /* let the stack verify checksum errors */
492 adapter->hw_csum_err++;
493 return;
494 }
495
496 /* TCP/UDP Checksum has not been calculated */
497 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
498 return;
499
500 /* It must be a TCP or UDP packet with a valid checksum */
501 if (status & E1000_RXD_STAT_TCPCS) {
502 /* TCP checksum is good */
503 skb->ip_summed = CHECKSUM_UNNECESSARY;
504 } else {
505 /*
506 * IP fragment with UDP payload
507 * Hardware complements the payload checksum, so we undo it
508 * and then put the value in host order for further stack use.
509 */
510 __sum16 sum = (__force __sum16)htons(csum);
511 skb->csum = csum_unfold(~sum);
512 skb->ip_summed = CHECKSUM_COMPLETE;
513 }
514 adapter->hw_csum_good++;
515 }
516
517 /**
518 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
519 * @adapter: address of board private structure
520 **/
521 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
522 int cleaned_count)
523 {
524 struct net_device *netdev = adapter->netdev;
525 struct pci_dev *pdev = adapter->pdev;
526 struct e1000_ring *rx_ring = adapter->rx_ring;
527 struct e1000_rx_desc *rx_desc;
528 struct e1000_buffer *buffer_info;
529 struct sk_buff *skb;
530 unsigned int i;
531 unsigned int bufsz = adapter->rx_buffer_len;
532
533 i = rx_ring->next_to_use;
534 buffer_info = &rx_ring->buffer_info[i];
535
536 while (cleaned_count--) {
537 skb = buffer_info->skb;
538 if (skb) {
539 skb_trim(skb, 0);
540 goto map_skb;
541 }
542
543 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
544 if (!skb) {
545 /* Better luck next round */
546 adapter->alloc_rx_buff_failed++;
547 break;
548 }
549
550 buffer_info->skb = skb;
551 map_skb:
552 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
553 adapter->rx_buffer_len,
554 DMA_FROM_DEVICE);
555 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
556 dev_err(&pdev->dev, "Rx DMA map failed\n");
557 adapter->rx_dma_failed++;
558 break;
559 }
560
561 rx_desc = E1000_RX_DESC(*rx_ring, i);
562 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
563
564 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
565 /*
566 * Force memory writes to complete before letting h/w
567 * know there are new descriptors to fetch. (Only
568 * applicable for weak-ordered memory model archs,
569 * such as IA-64).
570 */
571 wmb();
572 writel(i, adapter->hw.hw_addr + rx_ring->tail);
573 }
574 i++;
575 if (i == rx_ring->count)
576 i = 0;
577 buffer_info = &rx_ring->buffer_info[i];
578 }
579
580 rx_ring->next_to_use = i;
581 }
582
583 /**
584 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
585 * @adapter: address of board private structure
586 **/
587 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
588 int cleaned_count)
589 {
590 struct net_device *netdev = adapter->netdev;
591 struct pci_dev *pdev = adapter->pdev;
592 union e1000_rx_desc_packet_split *rx_desc;
593 struct e1000_ring *rx_ring = adapter->rx_ring;
594 struct e1000_buffer *buffer_info;
595 struct e1000_ps_page *ps_page;
596 struct sk_buff *skb;
597 unsigned int i, j;
598
599 i = rx_ring->next_to_use;
600 buffer_info = &rx_ring->buffer_info[i];
601
602 while (cleaned_count--) {
603 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
604
605 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
606 ps_page = &buffer_info->ps_pages[j];
607 if (j >= adapter->rx_ps_pages) {
608 /* all unused desc entries get hw null ptr */
609 rx_desc->read.buffer_addr[j + 1] =
610 ~cpu_to_le64(0);
611 continue;
612 }
613 if (!ps_page->page) {
614 ps_page->page = alloc_page(GFP_ATOMIC);
615 if (!ps_page->page) {
616 adapter->alloc_rx_buff_failed++;
617 goto no_buffers;
618 }
619 ps_page->dma = dma_map_page(&pdev->dev,
620 ps_page->page,
621 0, PAGE_SIZE,
622 DMA_FROM_DEVICE);
623 if (dma_mapping_error(&pdev->dev,
624 ps_page->dma)) {
625 dev_err(&adapter->pdev->dev,
626 "Rx DMA page map failed\n");
627 adapter->rx_dma_failed++;
628 goto no_buffers;
629 }
630 }
631 /*
632 * Refresh the desc even if buffer_addrs
633 * didn't change because each write-back
634 * erases this info.
635 */
636 rx_desc->read.buffer_addr[j + 1] =
637 cpu_to_le64(ps_page->dma);
638 }
639
640 skb = netdev_alloc_skb_ip_align(netdev,
641 adapter->rx_ps_bsize0);
642
643 if (!skb) {
644 adapter->alloc_rx_buff_failed++;
645 break;
646 }
647
648 buffer_info->skb = skb;
649 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
650 adapter->rx_ps_bsize0,
651 DMA_FROM_DEVICE);
652 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
653 dev_err(&pdev->dev, "Rx DMA map failed\n");
654 adapter->rx_dma_failed++;
655 /* cleanup skb */
656 dev_kfree_skb_any(skb);
657 buffer_info->skb = NULL;
658 break;
659 }
660
661 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
662
663 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
664 /*
665 * Force memory writes to complete before letting h/w
666 * know there are new descriptors to fetch. (Only
667 * applicable for weak-ordered memory model archs,
668 * such as IA-64).
669 */
670 wmb();
671 writel(i << 1, adapter->hw.hw_addr + rx_ring->tail);
672 }
673
674 i++;
675 if (i == rx_ring->count)
676 i = 0;
677 buffer_info = &rx_ring->buffer_info[i];
678 }
679
680 no_buffers:
681 rx_ring->next_to_use = i;
682 }
683
684 /**
685 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
686 * @adapter: address of board private structure
687 * @cleaned_count: number of buffers to allocate this pass
688 **/
689
690 static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
691 int cleaned_count)
692 {
693 struct net_device *netdev = adapter->netdev;
694 struct pci_dev *pdev = adapter->pdev;
695 struct e1000_rx_desc *rx_desc;
696 struct e1000_ring *rx_ring = adapter->rx_ring;
697 struct e1000_buffer *buffer_info;
698 struct sk_buff *skb;
699 unsigned int i;
700 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
701
702 i = rx_ring->next_to_use;
703 buffer_info = &rx_ring->buffer_info[i];
704
705 while (cleaned_count--) {
706 skb = buffer_info->skb;
707 if (skb) {
708 skb_trim(skb, 0);
709 goto check_page;
710 }
711
712 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
713 if (unlikely(!skb)) {
714 /* Better luck next round */
715 adapter->alloc_rx_buff_failed++;
716 break;
717 }
718
719 buffer_info->skb = skb;
720 check_page:
721 /* allocate a new page if necessary */
722 if (!buffer_info->page) {
723 buffer_info->page = alloc_page(GFP_ATOMIC);
724 if (unlikely(!buffer_info->page)) {
725 adapter->alloc_rx_buff_failed++;
726 break;
727 }
728 }
729
730 if (!buffer_info->dma)
731 buffer_info->dma = dma_map_page(&pdev->dev,
732 buffer_info->page, 0,
733 PAGE_SIZE,
734 DMA_FROM_DEVICE);
735
736 rx_desc = E1000_RX_DESC(*rx_ring, i);
737 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
738
739 if (unlikely(++i == rx_ring->count))
740 i = 0;
741 buffer_info = &rx_ring->buffer_info[i];
742 }
743
744 if (likely(rx_ring->next_to_use != i)) {
745 rx_ring->next_to_use = i;
746 if (unlikely(i-- == 0))
747 i = (rx_ring->count - 1);
748
749 /* Force memory writes to complete before letting h/w
750 * know there are new descriptors to fetch. (Only
751 * applicable for weak-ordered memory model archs,
752 * such as IA-64). */
753 wmb();
754 writel(i, adapter->hw.hw_addr + rx_ring->tail);
755 }
756 }
757
758 /**
759 * e1000_clean_rx_irq - Send received data up the network stack; legacy
760 * @adapter: board private structure
761 *
762 * the return value indicates whether actual cleaning was done, there
763 * is no guarantee that everything was cleaned
764 **/
765 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
766 int *work_done, int work_to_do)
767 {
768 struct net_device *netdev = adapter->netdev;
769 struct pci_dev *pdev = adapter->pdev;
770 struct e1000_hw *hw = &adapter->hw;
771 struct e1000_ring *rx_ring = adapter->rx_ring;
772 struct e1000_rx_desc *rx_desc, *next_rxd;
773 struct e1000_buffer *buffer_info, *next_buffer;
774 u32 length;
775 unsigned int i;
776 int cleaned_count = 0;
777 bool cleaned = 0;
778 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
779
780 i = rx_ring->next_to_clean;
781 rx_desc = E1000_RX_DESC(*rx_ring, i);
782 buffer_info = &rx_ring->buffer_info[i];
783
784 while (rx_desc->status & E1000_RXD_STAT_DD) {
785 struct sk_buff *skb;
786 u8 status;
787
788 if (*work_done >= work_to_do)
789 break;
790 (*work_done)++;
791 rmb(); /* read descriptor and rx_buffer_info after status DD */
792
793 status = rx_desc->status;
794 skb = buffer_info->skb;
795 buffer_info->skb = NULL;
796
797 prefetch(skb->data - NET_IP_ALIGN);
798
799 i++;
800 if (i == rx_ring->count)
801 i = 0;
802 next_rxd = E1000_RX_DESC(*rx_ring, i);
803 prefetch(next_rxd);
804
805 next_buffer = &rx_ring->buffer_info[i];
806
807 cleaned = 1;
808 cleaned_count++;
809 dma_unmap_single(&pdev->dev,
810 buffer_info->dma,
811 adapter->rx_buffer_len,
812 DMA_FROM_DEVICE);
813 buffer_info->dma = 0;
814
815 length = le16_to_cpu(rx_desc->length);
816
817 /*
818 * !EOP means multiple descriptors were used to store a single
819 * packet, if that's the case we need to toss it. In fact, we
820 * need to toss every packet with the EOP bit clear and the
821 * next frame that _does_ have the EOP bit set, as it is by
822 * definition only a frame fragment
823 */
824 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
825 adapter->flags2 |= FLAG2_IS_DISCARDING;
826
827 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
828 /* All receives must fit into a single buffer */
829 e_dbg("Receive packet consumed multiple buffers\n");
830 /* recycle */
831 buffer_info->skb = skb;
832 if (status & E1000_RXD_STAT_EOP)
833 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
834 goto next_desc;
835 }
836
837 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
838 /* recycle */
839 buffer_info->skb = skb;
840 goto next_desc;
841 }
842
843 /* adjust length to remove Ethernet CRC */
844 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
845 length -= 4;
846
847 total_rx_bytes += length;
848 total_rx_packets++;
849
850 /*
851 * code added for copybreak, this should improve
852 * performance for small packets with large amounts
853 * of reassembly being done in the stack
854 */
855 if (length < copybreak) {
856 struct sk_buff *new_skb =
857 netdev_alloc_skb_ip_align(netdev, length);
858 if (new_skb) {
859 skb_copy_to_linear_data_offset(new_skb,
860 -NET_IP_ALIGN,
861 (skb->data -
862 NET_IP_ALIGN),
863 (length +
864 NET_IP_ALIGN));
865 /* save the skb in buffer_info as good */
866 buffer_info->skb = skb;
867 skb = new_skb;
868 }
869 /* else just continue with the old one */
870 }
871 /* end copybreak code */
872 skb_put(skb, length);
873
874 /* Receive Checksum Offload */
875 e1000_rx_checksum(adapter,
876 (u32)(status) |
877 ((u32)(rx_desc->errors) << 24),
878 le16_to_cpu(rx_desc->csum), skb);
879
880 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
881
882 next_desc:
883 rx_desc->status = 0;
884
885 /* return some buffers to hardware, one at a time is too slow */
886 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
887 adapter->alloc_rx_buf(adapter, cleaned_count);
888 cleaned_count = 0;
889 }
890
891 /* use prefetched values */
892 rx_desc = next_rxd;
893 buffer_info = next_buffer;
894 }
895 rx_ring->next_to_clean = i;
896
897 cleaned_count = e1000_desc_unused(rx_ring);
898 if (cleaned_count)
899 adapter->alloc_rx_buf(adapter, cleaned_count);
900
901 adapter->total_rx_bytes += total_rx_bytes;
902 adapter->total_rx_packets += total_rx_packets;
903 return cleaned;
904 }
905
906 static void e1000_put_txbuf(struct e1000_adapter *adapter,
907 struct e1000_buffer *buffer_info)
908 {
909 if (buffer_info->dma) {
910 if (buffer_info->mapped_as_page)
911 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
912 buffer_info->length, DMA_TO_DEVICE);
913 else
914 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
915 buffer_info->length, DMA_TO_DEVICE);
916 buffer_info->dma = 0;
917 }
918 if (buffer_info->skb) {
919 dev_kfree_skb_any(buffer_info->skb);
920 buffer_info->skb = NULL;
921 }
922 buffer_info->time_stamp = 0;
923 }
924
925 static void e1000_print_hw_hang(struct work_struct *work)
926 {
927 struct e1000_adapter *adapter = container_of(work,
928 struct e1000_adapter,
929 print_hang_task);
930 struct e1000_ring *tx_ring = adapter->tx_ring;
931 unsigned int i = tx_ring->next_to_clean;
932 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
933 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
934 struct e1000_hw *hw = &adapter->hw;
935 u16 phy_status, phy_1000t_status, phy_ext_status;
936 u16 pci_status;
937
938 if (test_bit(__E1000_DOWN, &adapter->state))
939 return;
940
941 e1e_rphy(hw, PHY_STATUS, &phy_status);
942 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
943 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
944
945 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
946
947 /* detected Hardware unit hang */
948 e_err("Detected Hardware Unit Hang:\n"
949 " TDH <%x>\n"
950 " TDT <%x>\n"
951 " next_to_use <%x>\n"
952 " next_to_clean <%x>\n"
953 "buffer_info[next_to_clean]:\n"
954 " time_stamp <%lx>\n"
955 " next_to_watch <%x>\n"
956 " jiffies <%lx>\n"
957 " next_to_watch.status <%x>\n"
958 "MAC Status <%x>\n"
959 "PHY Status <%x>\n"
960 "PHY 1000BASE-T Status <%x>\n"
961 "PHY Extended Status <%x>\n"
962 "PCI Status <%x>\n",
963 readl(adapter->hw.hw_addr + tx_ring->head),
964 readl(adapter->hw.hw_addr + tx_ring->tail),
965 tx_ring->next_to_use,
966 tx_ring->next_to_clean,
967 tx_ring->buffer_info[eop].time_stamp,
968 eop,
969 jiffies,
970 eop_desc->upper.fields.status,
971 er32(STATUS),
972 phy_status,
973 phy_1000t_status,
974 phy_ext_status,
975 pci_status);
976 }
977
978 /**
979 * e1000_clean_tx_irq - Reclaim resources after transmit completes
980 * @adapter: board private structure
981 *
982 * the return value indicates whether actual cleaning was done, there
983 * is no guarantee that everything was cleaned
984 **/
985 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
986 {
987 struct net_device *netdev = adapter->netdev;
988 struct e1000_hw *hw = &adapter->hw;
989 struct e1000_ring *tx_ring = adapter->tx_ring;
990 struct e1000_tx_desc *tx_desc, *eop_desc;
991 struct e1000_buffer *buffer_info;
992 unsigned int i, eop;
993 unsigned int count = 0;
994 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
995
996 i = tx_ring->next_to_clean;
997 eop = tx_ring->buffer_info[i].next_to_watch;
998 eop_desc = E1000_TX_DESC(*tx_ring, eop);
999
1000 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1001 (count < tx_ring->count)) {
1002 bool cleaned = false;
1003 rmb(); /* read buffer_info after eop_desc */
1004 for (; !cleaned; count++) {
1005 tx_desc = E1000_TX_DESC(*tx_ring, i);
1006 buffer_info = &tx_ring->buffer_info[i];
1007 cleaned = (i == eop);
1008
1009 if (cleaned) {
1010 total_tx_packets += buffer_info->segs;
1011 total_tx_bytes += buffer_info->bytecount;
1012 }
1013
1014 e1000_put_txbuf(adapter, buffer_info);
1015 tx_desc->upper.data = 0;
1016
1017 i++;
1018 if (i == tx_ring->count)
1019 i = 0;
1020 }
1021
1022 if (i == tx_ring->next_to_use)
1023 break;
1024 eop = tx_ring->buffer_info[i].next_to_watch;
1025 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1026 }
1027
1028 tx_ring->next_to_clean = i;
1029
1030 #define TX_WAKE_THRESHOLD 32
1031 if (count && netif_carrier_ok(netdev) &&
1032 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1033 /* Make sure that anybody stopping the queue after this
1034 * sees the new next_to_clean.
1035 */
1036 smp_mb();
1037
1038 if (netif_queue_stopped(netdev) &&
1039 !(test_bit(__E1000_DOWN, &adapter->state))) {
1040 netif_wake_queue(netdev);
1041 ++adapter->restart_queue;
1042 }
1043 }
1044
1045 if (adapter->detect_tx_hung) {
1046 /*
1047 * Detect a transmit hang in hardware, this serializes the
1048 * check with the clearing of time_stamp and movement of i
1049 */
1050 adapter->detect_tx_hung = 0;
1051 if (tx_ring->buffer_info[i].time_stamp &&
1052 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1053 + (adapter->tx_timeout_factor * HZ)) &&
1054 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
1055 schedule_work(&adapter->print_hang_task);
1056 netif_stop_queue(netdev);
1057 }
1058 }
1059 adapter->total_tx_bytes += total_tx_bytes;
1060 adapter->total_tx_packets += total_tx_packets;
1061 return count < tx_ring->count;
1062 }
1063
1064 /**
1065 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1066 * @adapter: board private structure
1067 *
1068 * the return value indicates whether actual cleaning was done, there
1069 * is no guarantee that everything was cleaned
1070 **/
1071 static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1072 int *work_done, int work_to_do)
1073 {
1074 struct e1000_hw *hw = &adapter->hw;
1075 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1076 struct net_device *netdev = adapter->netdev;
1077 struct pci_dev *pdev = adapter->pdev;
1078 struct e1000_ring *rx_ring = adapter->rx_ring;
1079 struct e1000_buffer *buffer_info, *next_buffer;
1080 struct e1000_ps_page *ps_page;
1081 struct sk_buff *skb;
1082 unsigned int i, j;
1083 u32 length, staterr;
1084 int cleaned_count = 0;
1085 bool cleaned = 0;
1086 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1087
1088 i = rx_ring->next_to_clean;
1089 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1090 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1091 buffer_info = &rx_ring->buffer_info[i];
1092
1093 while (staterr & E1000_RXD_STAT_DD) {
1094 if (*work_done >= work_to_do)
1095 break;
1096 (*work_done)++;
1097 skb = buffer_info->skb;
1098 rmb(); /* read descriptor and rx_buffer_info after status DD */
1099
1100 /* in the packet split case this is header only */
1101 prefetch(skb->data - NET_IP_ALIGN);
1102
1103 i++;
1104 if (i == rx_ring->count)
1105 i = 0;
1106 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1107 prefetch(next_rxd);
1108
1109 next_buffer = &rx_ring->buffer_info[i];
1110
1111 cleaned = 1;
1112 cleaned_count++;
1113 dma_unmap_single(&pdev->dev, buffer_info->dma,
1114 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1115 buffer_info->dma = 0;
1116
1117 /* see !EOP comment in other Rx routine */
1118 if (!(staterr & E1000_RXD_STAT_EOP))
1119 adapter->flags2 |= FLAG2_IS_DISCARDING;
1120
1121 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1122 e_dbg("Packet Split buffers didn't pick up the full "
1123 "packet\n");
1124 dev_kfree_skb_irq(skb);
1125 if (staterr & E1000_RXD_STAT_EOP)
1126 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1127 goto next_desc;
1128 }
1129
1130 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1131 dev_kfree_skb_irq(skb);
1132 goto next_desc;
1133 }
1134
1135 length = le16_to_cpu(rx_desc->wb.middle.length0);
1136
1137 if (!length) {
1138 e_dbg("Last part of the packet spanning multiple "
1139 "descriptors\n");
1140 dev_kfree_skb_irq(skb);
1141 goto next_desc;
1142 }
1143
1144 /* Good Receive */
1145 skb_put(skb, length);
1146
1147 {
1148 /*
1149 * this looks ugly, but it seems compiler issues make it
1150 * more efficient than reusing j
1151 */
1152 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1153
1154 /*
1155 * page alloc/put takes too long and effects small packet
1156 * throughput, so unsplit small packets and save the alloc/put
1157 * only valid in softirq (napi) context to call kmap_*
1158 */
1159 if (l1 && (l1 <= copybreak) &&
1160 ((length + l1) <= adapter->rx_ps_bsize0)) {
1161 u8 *vaddr;
1162
1163 ps_page = &buffer_info->ps_pages[0];
1164
1165 /*
1166 * there is no documentation about how to call
1167 * kmap_atomic, so we can't hold the mapping
1168 * very long
1169 */
1170 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1171 PAGE_SIZE, DMA_FROM_DEVICE);
1172 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1173 memcpy(skb_tail_pointer(skb), vaddr, l1);
1174 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
1175 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1176 PAGE_SIZE, DMA_FROM_DEVICE);
1177
1178 /* remove the CRC */
1179 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1180 l1 -= 4;
1181
1182 skb_put(skb, l1);
1183 goto copydone;
1184 } /* if */
1185 }
1186
1187 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1188 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1189 if (!length)
1190 break;
1191
1192 ps_page = &buffer_info->ps_pages[j];
1193 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1194 DMA_FROM_DEVICE);
1195 ps_page->dma = 0;
1196 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1197 ps_page->page = NULL;
1198 skb->len += length;
1199 skb->data_len += length;
1200 skb->truesize += length;
1201 }
1202
1203 /* strip the ethernet crc, problem is we're using pages now so
1204 * this whole operation can get a little cpu intensive
1205 */
1206 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1207 pskb_trim(skb, skb->len - 4);
1208
1209 copydone:
1210 total_rx_bytes += skb->len;
1211 total_rx_packets++;
1212
1213 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1214 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1215
1216 if (rx_desc->wb.upper.header_status &
1217 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1218 adapter->rx_hdr_split++;
1219
1220 e1000_receive_skb(adapter, netdev, skb,
1221 staterr, rx_desc->wb.middle.vlan);
1222
1223 next_desc:
1224 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1225 buffer_info->skb = NULL;
1226
1227 /* return some buffers to hardware, one at a time is too slow */
1228 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1229 adapter->alloc_rx_buf(adapter, cleaned_count);
1230 cleaned_count = 0;
1231 }
1232
1233 /* use prefetched values */
1234 rx_desc = next_rxd;
1235 buffer_info = next_buffer;
1236
1237 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1238 }
1239 rx_ring->next_to_clean = i;
1240
1241 cleaned_count = e1000_desc_unused(rx_ring);
1242 if (cleaned_count)
1243 adapter->alloc_rx_buf(adapter, cleaned_count);
1244
1245 adapter->total_rx_bytes += total_rx_bytes;
1246 adapter->total_rx_packets += total_rx_packets;
1247 return cleaned;
1248 }
1249
1250 /**
1251 * e1000_consume_page - helper function
1252 **/
1253 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1254 u16 length)
1255 {
1256 bi->page = NULL;
1257 skb->len += length;
1258 skb->data_len += length;
1259 skb->truesize += length;
1260 }
1261
1262 /**
1263 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1264 * @adapter: board private structure
1265 *
1266 * the return value indicates whether actual cleaning was done, there
1267 * is no guarantee that everything was cleaned
1268 **/
1269
1270 static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1271 int *work_done, int work_to_do)
1272 {
1273 struct net_device *netdev = adapter->netdev;
1274 struct pci_dev *pdev = adapter->pdev;
1275 struct e1000_ring *rx_ring = adapter->rx_ring;
1276 struct e1000_rx_desc *rx_desc, *next_rxd;
1277 struct e1000_buffer *buffer_info, *next_buffer;
1278 u32 length;
1279 unsigned int i;
1280 int cleaned_count = 0;
1281 bool cleaned = false;
1282 unsigned int total_rx_bytes=0, total_rx_packets=0;
1283
1284 i = rx_ring->next_to_clean;
1285 rx_desc = E1000_RX_DESC(*rx_ring, i);
1286 buffer_info = &rx_ring->buffer_info[i];
1287
1288 while (rx_desc->status & E1000_RXD_STAT_DD) {
1289 struct sk_buff *skb;
1290 u8 status;
1291
1292 if (*work_done >= work_to_do)
1293 break;
1294 (*work_done)++;
1295 rmb(); /* read descriptor and rx_buffer_info after status DD */
1296
1297 status = rx_desc->status;
1298 skb = buffer_info->skb;
1299 buffer_info->skb = NULL;
1300
1301 ++i;
1302 if (i == rx_ring->count)
1303 i = 0;
1304 next_rxd = E1000_RX_DESC(*rx_ring, i);
1305 prefetch(next_rxd);
1306
1307 next_buffer = &rx_ring->buffer_info[i];
1308
1309 cleaned = true;
1310 cleaned_count++;
1311 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1312 DMA_FROM_DEVICE);
1313 buffer_info->dma = 0;
1314
1315 length = le16_to_cpu(rx_desc->length);
1316
1317 /* errors is only valid for DD + EOP descriptors */
1318 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1319 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1320 /* recycle both page and skb */
1321 buffer_info->skb = skb;
1322 /* an error means any chain goes out the window
1323 * too */
1324 if (rx_ring->rx_skb_top)
1325 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1326 rx_ring->rx_skb_top = NULL;
1327 goto next_desc;
1328 }
1329
1330 #define rxtop (rx_ring->rx_skb_top)
1331 if (!(status & E1000_RXD_STAT_EOP)) {
1332 /* this descriptor is only the beginning (or middle) */
1333 if (!rxtop) {
1334 /* this is the beginning of a chain */
1335 rxtop = skb;
1336 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1337 0, length);
1338 } else {
1339 /* this is the middle of a chain */
1340 skb_fill_page_desc(rxtop,
1341 skb_shinfo(rxtop)->nr_frags,
1342 buffer_info->page, 0, length);
1343 /* re-use the skb, only consumed the page */
1344 buffer_info->skb = skb;
1345 }
1346 e1000_consume_page(buffer_info, rxtop, length);
1347 goto next_desc;
1348 } else {
1349 if (rxtop) {
1350 /* end of the chain */
1351 skb_fill_page_desc(rxtop,
1352 skb_shinfo(rxtop)->nr_frags,
1353 buffer_info->page, 0, length);
1354 /* re-use the current skb, we only consumed the
1355 * page */
1356 buffer_info->skb = skb;
1357 skb = rxtop;
1358 rxtop = NULL;
1359 e1000_consume_page(buffer_info, skb, length);
1360 } else {
1361 /* no chain, got EOP, this buf is the packet
1362 * copybreak to save the put_page/alloc_page */
1363 if (length <= copybreak &&
1364 skb_tailroom(skb) >= length) {
1365 u8 *vaddr;
1366 vaddr = kmap_atomic(buffer_info->page,
1367 KM_SKB_DATA_SOFTIRQ);
1368 memcpy(skb_tail_pointer(skb), vaddr,
1369 length);
1370 kunmap_atomic(vaddr,
1371 KM_SKB_DATA_SOFTIRQ);
1372 /* re-use the page, so don't erase
1373 * buffer_info->page */
1374 skb_put(skb, length);
1375 } else {
1376 skb_fill_page_desc(skb, 0,
1377 buffer_info->page, 0,
1378 length);
1379 e1000_consume_page(buffer_info, skb,
1380 length);
1381 }
1382 }
1383 }
1384
1385 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1386 e1000_rx_checksum(adapter,
1387 (u32)(status) |
1388 ((u32)(rx_desc->errors) << 24),
1389 le16_to_cpu(rx_desc->csum), skb);
1390
1391 /* probably a little skewed due to removing CRC */
1392 total_rx_bytes += skb->len;
1393 total_rx_packets++;
1394
1395 /* eth type trans needs skb->data to point to something */
1396 if (!pskb_may_pull(skb, ETH_HLEN)) {
1397 e_err("pskb_may_pull failed.\n");
1398 dev_kfree_skb_irq(skb);
1399 goto next_desc;
1400 }
1401
1402 e1000_receive_skb(adapter, netdev, skb, status,
1403 rx_desc->special);
1404
1405 next_desc:
1406 rx_desc->status = 0;
1407
1408 /* return some buffers to hardware, one at a time is too slow */
1409 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1410 adapter->alloc_rx_buf(adapter, cleaned_count);
1411 cleaned_count = 0;
1412 }
1413
1414 /* use prefetched values */
1415 rx_desc = next_rxd;
1416 buffer_info = next_buffer;
1417 }
1418 rx_ring->next_to_clean = i;
1419
1420 cleaned_count = e1000_desc_unused(rx_ring);
1421 if (cleaned_count)
1422 adapter->alloc_rx_buf(adapter, cleaned_count);
1423
1424 adapter->total_rx_bytes += total_rx_bytes;
1425 adapter->total_rx_packets += total_rx_packets;
1426 return cleaned;
1427 }
1428
1429 /**
1430 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1431 * @adapter: board private structure
1432 **/
1433 static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1434 {
1435 struct e1000_ring *rx_ring = adapter->rx_ring;
1436 struct e1000_buffer *buffer_info;
1437 struct e1000_ps_page *ps_page;
1438 struct pci_dev *pdev = adapter->pdev;
1439 unsigned int i, j;
1440
1441 /* Free all the Rx ring sk_buffs */
1442 for (i = 0; i < rx_ring->count; i++) {
1443 buffer_info = &rx_ring->buffer_info[i];
1444 if (buffer_info->dma) {
1445 if (adapter->clean_rx == e1000_clean_rx_irq)
1446 dma_unmap_single(&pdev->dev, buffer_info->dma,
1447 adapter->rx_buffer_len,
1448 DMA_FROM_DEVICE);
1449 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1450 dma_unmap_page(&pdev->dev, buffer_info->dma,
1451 PAGE_SIZE,
1452 DMA_FROM_DEVICE);
1453 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1454 dma_unmap_single(&pdev->dev, buffer_info->dma,
1455 adapter->rx_ps_bsize0,
1456 DMA_FROM_DEVICE);
1457 buffer_info->dma = 0;
1458 }
1459
1460 if (buffer_info->page) {
1461 put_page(buffer_info->page);
1462 buffer_info->page = NULL;
1463 }
1464
1465 if (buffer_info->skb) {
1466 dev_kfree_skb(buffer_info->skb);
1467 buffer_info->skb = NULL;
1468 }
1469
1470 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1471 ps_page = &buffer_info->ps_pages[j];
1472 if (!ps_page->page)
1473 break;
1474 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1475 DMA_FROM_DEVICE);
1476 ps_page->dma = 0;
1477 put_page(ps_page->page);
1478 ps_page->page = NULL;
1479 }
1480 }
1481
1482 /* there also may be some cached data from a chained receive */
1483 if (rx_ring->rx_skb_top) {
1484 dev_kfree_skb(rx_ring->rx_skb_top);
1485 rx_ring->rx_skb_top = NULL;
1486 }
1487
1488 /* Zero out the descriptor ring */
1489 memset(rx_ring->desc, 0, rx_ring->size);
1490
1491 rx_ring->next_to_clean = 0;
1492 rx_ring->next_to_use = 0;
1493 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1494
1495 writel(0, adapter->hw.hw_addr + rx_ring->head);
1496 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1497 }
1498
1499 static void e1000e_downshift_workaround(struct work_struct *work)
1500 {
1501 struct e1000_adapter *adapter = container_of(work,
1502 struct e1000_adapter, downshift_task);
1503
1504 if (test_bit(__E1000_DOWN, &adapter->state))
1505 return;
1506
1507 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1508 }
1509
1510 /**
1511 * e1000_intr_msi - Interrupt Handler
1512 * @irq: interrupt number
1513 * @data: pointer to a network interface device structure
1514 **/
1515 static irqreturn_t e1000_intr_msi(int irq, void *data)
1516 {
1517 struct net_device *netdev = data;
1518 struct e1000_adapter *adapter = netdev_priv(netdev);
1519 struct e1000_hw *hw = &adapter->hw;
1520 u32 icr = er32(ICR);
1521
1522 /*
1523 * read ICR disables interrupts using IAM
1524 */
1525
1526 if (icr & E1000_ICR_LSC) {
1527 hw->mac.get_link_status = 1;
1528 /*
1529 * ICH8 workaround-- Call gig speed drop workaround on cable
1530 * disconnect (LSC) before accessing any PHY registers
1531 */
1532 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1533 (!(er32(STATUS) & E1000_STATUS_LU)))
1534 schedule_work(&adapter->downshift_task);
1535
1536 /*
1537 * 80003ES2LAN workaround-- For packet buffer work-around on
1538 * link down event; disable receives here in the ISR and reset
1539 * adapter in watchdog
1540 */
1541 if (netif_carrier_ok(netdev) &&
1542 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1543 /* disable receives */
1544 u32 rctl = er32(RCTL);
1545 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1546 adapter->flags |= FLAG_RX_RESTART_NOW;
1547 }
1548 /* guard against interrupt when we're going down */
1549 if (!test_bit(__E1000_DOWN, &adapter->state))
1550 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1551 }
1552
1553 if (napi_schedule_prep(&adapter->napi)) {
1554 adapter->total_tx_bytes = 0;
1555 adapter->total_tx_packets = 0;
1556 adapter->total_rx_bytes = 0;
1557 adapter->total_rx_packets = 0;
1558 __napi_schedule(&adapter->napi);
1559 }
1560
1561 return IRQ_HANDLED;
1562 }
1563
1564 /**
1565 * e1000_intr - Interrupt Handler
1566 * @irq: interrupt number
1567 * @data: pointer to a network interface device structure
1568 **/
1569 static irqreturn_t e1000_intr(int irq, void *data)
1570 {
1571 struct net_device *netdev = data;
1572 struct e1000_adapter *adapter = netdev_priv(netdev);
1573 struct e1000_hw *hw = &adapter->hw;
1574 u32 rctl, icr = er32(ICR);
1575
1576 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1577 return IRQ_NONE; /* Not our interrupt */
1578
1579 /*
1580 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1581 * not set, then the adapter didn't send an interrupt
1582 */
1583 if (!(icr & E1000_ICR_INT_ASSERTED))
1584 return IRQ_NONE;
1585
1586 /*
1587 * Interrupt Auto-Mask...upon reading ICR,
1588 * interrupts are masked. No need for the
1589 * IMC write
1590 */
1591
1592 if (icr & E1000_ICR_LSC) {
1593 hw->mac.get_link_status = 1;
1594 /*
1595 * ICH8 workaround-- Call gig speed drop workaround on cable
1596 * disconnect (LSC) before accessing any PHY registers
1597 */
1598 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1599 (!(er32(STATUS) & E1000_STATUS_LU)))
1600 schedule_work(&adapter->downshift_task);
1601
1602 /*
1603 * 80003ES2LAN workaround--
1604 * For packet buffer work-around on link down event;
1605 * disable receives here in the ISR and
1606 * reset adapter in watchdog
1607 */
1608 if (netif_carrier_ok(netdev) &&
1609 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1610 /* disable receives */
1611 rctl = er32(RCTL);
1612 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1613 adapter->flags |= FLAG_RX_RESTART_NOW;
1614 }
1615 /* guard against interrupt when we're going down */
1616 if (!test_bit(__E1000_DOWN, &adapter->state))
1617 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1618 }
1619
1620 if (napi_schedule_prep(&adapter->napi)) {
1621 adapter->total_tx_bytes = 0;
1622 adapter->total_tx_packets = 0;
1623 adapter->total_rx_bytes = 0;
1624 adapter->total_rx_packets = 0;
1625 __napi_schedule(&adapter->napi);
1626 }
1627
1628 return IRQ_HANDLED;
1629 }
1630
1631 static irqreturn_t e1000_msix_other(int irq, void *data)
1632 {
1633 struct net_device *netdev = data;
1634 struct e1000_adapter *adapter = netdev_priv(netdev);
1635 struct e1000_hw *hw = &adapter->hw;
1636 u32 icr = er32(ICR);
1637
1638 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1639 if (!test_bit(__E1000_DOWN, &adapter->state))
1640 ew32(IMS, E1000_IMS_OTHER);
1641 return IRQ_NONE;
1642 }
1643
1644 if (icr & adapter->eiac_mask)
1645 ew32(ICS, (icr & adapter->eiac_mask));
1646
1647 if (icr & E1000_ICR_OTHER) {
1648 if (!(icr & E1000_ICR_LSC))
1649 goto no_link_interrupt;
1650 hw->mac.get_link_status = 1;
1651 /* guard against interrupt when we're going down */
1652 if (!test_bit(__E1000_DOWN, &adapter->state))
1653 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1654 }
1655
1656 no_link_interrupt:
1657 if (!test_bit(__E1000_DOWN, &adapter->state))
1658 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1659
1660 return IRQ_HANDLED;
1661 }
1662
1663
1664 static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1665 {
1666 struct net_device *netdev = data;
1667 struct e1000_adapter *adapter = netdev_priv(netdev);
1668 struct e1000_hw *hw = &adapter->hw;
1669 struct e1000_ring *tx_ring = adapter->tx_ring;
1670
1671
1672 adapter->total_tx_bytes = 0;
1673 adapter->total_tx_packets = 0;
1674
1675 if (!e1000_clean_tx_irq(adapter))
1676 /* Ring was not completely cleaned, so fire another interrupt */
1677 ew32(ICS, tx_ring->ims_val);
1678
1679 return IRQ_HANDLED;
1680 }
1681
1682 static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1683 {
1684 struct net_device *netdev = data;
1685 struct e1000_adapter *adapter = netdev_priv(netdev);
1686
1687 /* Write the ITR value calculated at the end of the
1688 * previous interrupt.
1689 */
1690 if (adapter->rx_ring->set_itr) {
1691 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1692 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1693 adapter->rx_ring->set_itr = 0;
1694 }
1695
1696 if (napi_schedule_prep(&adapter->napi)) {
1697 adapter->total_rx_bytes = 0;
1698 adapter->total_rx_packets = 0;
1699 __napi_schedule(&adapter->napi);
1700 }
1701 return IRQ_HANDLED;
1702 }
1703
1704 /**
1705 * e1000_configure_msix - Configure MSI-X hardware
1706 *
1707 * e1000_configure_msix sets up the hardware to properly
1708 * generate MSI-X interrupts.
1709 **/
1710 static void e1000_configure_msix(struct e1000_adapter *adapter)
1711 {
1712 struct e1000_hw *hw = &adapter->hw;
1713 struct e1000_ring *rx_ring = adapter->rx_ring;
1714 struct e1000_ring *tx_ring = adapter->tx_ring;
1715 int vector = 0;
1716 u32 ctrl_ext, ivar = 0;
1717
1718 adapter->eiac_mask = 0;
1719
1720 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1721 if (hw->mac.type == e1000_82574) {
1722 u32 rfctl = er32(RFCTL);
1723 rfctl |= E1000_RFCTL_ACK_DIS;
1724 ew32(RFCTL, rfctl);
1725 }
1726
1727 #define E1000_IVAR_INT_ALLOC_VALID 0x8
1728 /* Configure Rx vector */
1729 rx_ring->ims_val = E1000_IMS_RXQ0;
1730 adapter->eiac_mask |= rx_ring->ims_val;
1731 if (rx_ring->itr_val)
1732 writel(1000000000 / (rx_ring->itr_val * 256),
1733 hw->hw_addr + rx_ring->itr_register);
1734 else
1735 writel(1, hw->hw_addr + rx_ring->itr_register);
1736 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1737
1738 /* Configure Tx vector */
1739 tx_ring->ims_val = E1000_IMS_TXQ0;
1740 vector++;
1741 if (tx_ring->itr_val)
1742 writel(1000000000 / (tx_ring->itr_val * 256),
1743 hw->hw_addr + tx_ring->itr_register);
1744 else
1745 writel(1, hw->hw_addr + tx_ring->itr_register);
1746 adapter->eiac_mask |= tx_ring->ims_val;
1747 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1748
1749 /* set vector for Other Causes, e.g. link changes */
1750 vector++;
1751 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1752 if (rx_ring->itr_val)
1753 writel(1000000000 / (rx_ring->itr_val * 256),
1754 hw->hw_addr + E1000_EITR_82574(vector));
1755 else
1756 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1757
1758 /* Cause Tx interrupts on every write back */
1759 ivar |= (1 << 31);
1760
1761 ew32(IVAR, ivar);
1762
1763 /* enable MSI-X PBA support */
1764 ctrl_ext = er32(CTRL_EXT);
1765 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1766
1767 /* Auto-Mask Other interrupts upon ICR read */
1768 #define E1000_EIAC_MASK_82574 0x01F00000
1769 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1770 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1771 ew32(CTRL_EXT, ctrl_ext);
1772 e1e_flush();
1773 }
1774
1775 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1776 {
1777 if (adapter->msix_entries) {
1778 pci_disable_msix(adapter->pdev);
1779 kfree(adapter->msix_entries);
1780 adapter->msix_entries = NULL;
1781 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1782 pci_disable_msi(adapter->pdev);
1783 adapter->flags &= ~FLAG_MSI_ENABLED;
1784 }
1785 }
1786
1787 /**
1788 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1789 *
1790 * Attempt to configure interrupts using the best available
1791 * capabilities of the hardware and kernel.
1792 **/
1793 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1794 {
1795 int err;
1796 int i;
1797
1798 switch (adapter->int_mode) {
1799 case E1000E_INT_MODE_MSIX:
1800 if (adapter->flags & FLAG_HAS_MSIX) {
1801 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1802 adapter->msix_entries = kcalloc(adapter->num_vectors,
1803 sizeof(struct msix_entry),
1804 GFP_KERNEL);
1805 if (adapter->msix_entries) {
1806 for (i = 0; i < adapter->num_vectors; i++)
1807 adapter->msix_entries[i].entry = i;
1808
1809 err = pci_enable_msix(adapter->pdev,
1810 adapter->msix_entries,
1811 adapter->num_vectors);
1812 if (err == 0)
1813 return;
1814 }
1815 /* MSI-X failed, so fall through and try MSI */
1816 e_err("Failed to initialize MSI-X interrupts. "
1817 "Falling back to MSI interrupts.\n");
1818 e1000e_reset_interrupt_capability(adapter);
1819 }
1820 adapter->int_mode = E1000E_INT_MODE_MSI;
1821 /* Fall through */
1822 case E1000E_INT_MODE_MSI:
1823 if (!pci_enable_msi(adapter->pdev)) {
1824 adapter->flags |= FLAG_MSI_ENABLED;
1825 } else {
1826 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1827 e_err("Failed to initialize MSI interrupts. Falling "
1828 "back to legacy interrupts.\n");
1829 }
1830 /* Fall through */
1831 case E1000E_INT_MODE_LEGACY:
1832 /* Don't do anything; this is the system default */
1833 break;
1834 }
1835
1836 /* store the number of vectors being used */
1837 adapter->num_vectors = 1;
1838 }
1839
1840 /**
1841 * e1000_request_msix - Initialize MSI-X interrupts
1842 *
1843 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1844 * kernel.
1845 **/
1846 static int e1000_request_msix(struct e1000_adapter *adapter)
1847 {
1848 struct net_device *netdev = adapter->netdev;
1849 int err = 0, vector = 0;
1850
1851 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1852 snprintf(adapter->rx_ring->name,
1853 sizeof(adapter->rx_ring->name) - 1,
1854 "%s-rx-0", netdev->name);
1855 else
1856 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1857 err = request_irq(adapter->msix_entries[vector].vector,
1858 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1859 netdev);
1860 if (err)
1861 goto out;
1862 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1863 adapter->rx_ring->itr_val = adapter->itr;
1864 vector++;
1865
1866 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1867 snprintf(adapter->tx_ring->name,
1868 sizeof(adapter->tx_ring->name) - 1,
1869 "%s-tx-0", netdev->name);
1870 else
1871 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1872 err = request_irq(adapter->msix_entries[vector].vector,
1873 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1874 netdev);
1875 if (err)
1876 goto out;
1877 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1878 adapter->tx_ring->itr_val = adapter->itr;
1879 vector++;
1880
1881 err = request_irq(adapter->msix_entries[vector].vector,
1882 e1000_msix_other, 0, netdev->name, netdev);
1883 if (err)
1884 goto out;
1885
1886 e1000_configure_msix(adapter);
1887 return 0;
1888 out:
1889 return err;
1890 }
1891
1892 /**
1893 * e1000_request_irq - initialize interrupts
1894 *
1895 * Attempts to configure interrupts using the best available
1896 * capabilities of the hardware and kernel.
1897 **/
1898 static int e1000_request_irq(struct e1000_adapter *adapter)
1899 {
1900 struct net_device *netdev = adapter->netdev;
1901 int err;
1902
1903 if (adapter->msix_entries) {
1904 err = e1000_request_msix(adapter);
1905 if (!err)
1906 return err;
1907 /* fall back to MSI */
1908 e1000e_reset_interrupt_capability(adapter);
1909 adapter->int_mode = E1000E_INT_MODE_MSI;
1910 e1000e_set_interrupt_capability(adapter);
1911 }
1912 if (adapter->flags & FLAG_MSI_ENABLED) {
1913 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
1914 netdev->name, netdev);
1915 if (!err)
1916 return err;
1917
1918 /* fall back to legacy interrupt */
1919 e1000e_reset_interrupt_capability(adapter);
1920 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1921 }
1922
1923 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
1924 netdev->name, netdev);
1925 if (err)
1926 e_err("Unable to allocate interrupt, Error: %d\n", err);
1927
1928 return err;
1929 }
1930
1931 static void e1000_free_irq(struct e1000_adapter *adapter)
1932 {
1933 struct net_device *netdev = adapter->netdev;
1934
1935 if (adapter->msix_entries) {
1936 int vector = 0;
1937
1938 free_irq(adapter->msix_entries[vector].vector, netdev);
1939 vector++;
1940
1941 free_irq(adapter->msix_entries[vector].vector, netdev);
1942 vector++;
1943
1944 /* Other Causes interrupt vector */
1945 free_irq(adapter->msix_entries[vector].vector, netdev);
1946 return;
1947 }
1948
1949 free_irq(adapter->pdev->irq, netdev);
1950 }
1951
1952 /**
1953 * e1000_irq_disable - Mask off interrupt generation on the NIC
1954 **/
1955 static void e1000_irq_disable(struct e1000_adapter *adapter)
1956 {
1957 struct e1000_hw *hw = &adapter->hw;
1958
1959 ew32(IMC, ~0);
1960 if (adapter->msix_entries)
1961 ew32(EIAC_82574, 0);
1962 e1e_flush();
1963
1964 if (adapter->msix_entries) {
1965 int i;
1966 for (i = 0; i < adapter->num_vectors; i++)
1967 synchronize_irq(adapter->msix_entries[i].vector);
1968 } else {
1969 synchronize_irq(adapter->pdev->irq);
1970 }
1971 }
1972
1973 /**
1974 * e1000_irq_enable - Enable default interrupt generation settings
1975 **/
1976 static void e1000_irq_enable(struct e1000_adapter *adapter)
1977 {
1978 struct e1000_hw *hw = &adapter->hw;
1979
1980 if (adapter->msix_entries) {
1981 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1982 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1983 } else {
1984 ew32(IMS, IMS_ENABLE_MASK);
1985 }
1986 e1e_flush();
1987 }
1988
1989 /**
1990 * e1000e_get_hw_control - get control of the h/w from f/w
1991 * @adapter: address of board private structure
1992 *
1993 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
1994 * For ASF and Pass Through versions of f/w this means that
1995 * the driver is loaded. For AMT version (only with 82573)
1996 * of the f/w this means that the network i/f is open.
1997 **/
1998 void e1000e_get_hw_control(struct e1000_adapter *adapter)
1999 {
2000 struct e1000_hw *hw = &adapter->hw;
2001 u32 ctrl_ext;
2002 u32 swsm;
2003
2004 /* Let firmware know the driver has taken over */
2005 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2006 swsm = er32(SWSM);
2007 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2008 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2009 ctrl_ext = er32(CTRL_EXT);
2010 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2011 }
2012 }
2013
2014 /**
2015 * e1000e_release_hw_control - release control of the h/w to f/w
2016 * @adapter: address of board private structure
2017 *
2018 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2019 * For ASF and Pass Through versions of f/w this means that the
2020 * driver is no longer loaded. For AMT version (only with 82573) i
2021 * of the f/w this means that the network i/f is closed.
2022 *
2023 **/
2024 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2025 {
2026 struct e1000_hw *hw = &adapter->hw;
2027 u32 ctrl_ext;
2028 u32 swsm;
2029
2030 /* Let firmware taken over control of h/w */
2031 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2032 swsm = er32(SWSM);
2033 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2034 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2035 ctrl_ext = er32(CTRL_EXT);
2036 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2037 }
2038 }
2039
2040 /**
2041 * @e1000_alloc_ring - allocate memory for a ring structure
2042 **/
2043 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2044 struct e1000_ring *ring)
2045 {
2046 struct pci_dev *pdev = adapter->pdev;
2047
2048 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2049 GFP_KERNEL);
2050 if (!ring->desc)
2051 return -ENOMEM;
2052
2053 return 0;
2054 }
2055
2056 /**
2057 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2058 * @adapter: board private structure
2059 *
2060 * Return 0 on success, negative on failure
2061 **/
2062 int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2063 {
2064 struct e1000_ring *tx_ring = adapter->tx_ring;
2065 int err = -ENOMEM, size;
2066
2067 size = sizeof(struct e1000_buffer) * tx_ring->count;
2068 tx_ring->buffer_info = vzalloc(size);
2069 if (!tx_ring->buffer_info)
2070 goto err;
2071
2072 /* round up to nearest 4K */
2073 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2074 tx_ring->size = ALIGN(tx_ring->size, 4096);
2075
2076 err = e1000_alloc_ring_dma(adapter, tx_ring);
2077 if (err)
2078 goto err;
2079
2080 tx_ring->next_to_use = 0;
2081 tx_ring->next_to_clean = 0;
2082
2083 return 0;
2084 err:
2085 vfree(tx_ring->buffer_info);
2086 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2087 return err;
2088 }
2089
2090 /**
2091 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2092 * @adapter: board private structure
2093 *
2094 * Returns 0 on success, negative on failure
2095 **/
2096 int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2097 {
2098 struct e1000_ring *rx_ring = adapter->rx_ring;
2099 struct e1000_buffer *buffer_info;
2100 int i, size, desc_len, err = -ENOMEM;
2101
2102 size = sizeof(struct e1000_buffer) * rx_ring->count;
2103 rx_ring->buffer_info = vzalloc(size);
2104 if (!rx_ring->buffer_info)
2105 goto err;
2106
2107 for (i = 0; i < rx_ring->count; i++) {
2108 buffer_info = &rx_ring->buffer_info[i];
2109 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2110 sizeof(struct e1000_ps_page),
2111 GFP_KERNEL);
2112 if (!buffer_info->ps_pages)
2113 goto err_pages;
2114 }
2115
2116 desc_len = sizeof(union e1000_rx_desc_packet_split);
2117
2118 /* Round up to nearest 4K */
2119 rx_ring->size = rx_ring->count * desc_len;
2120 rx_ring->size = ALIGN(rx_ring->size, 4096);
2121
2122 err = e1000_alloc_ring_dma(adapter, rx_ring);
2123 if (err)
2124 goto err_pages;
2125
2126 rx_ring->next_to_clean = 0;
2127 rx_ring->next_to_use = 0;
2128 rx_ring->rx_skb_top = NULL;
2129
2130 return 0;
2131
2132 err_pages:
2133 for (i = 0; i < rx_ring->count; i++) {
2134 buffer_info = &rx_ring->buffer_info[i];
2135 kfree(buffer_info->ps_pages);
2136 }
2137 err:
2138 vfree(rx_ring->buffer_info);
2139 e_err("Unable to allocate memory for the receive descriptor ring\n");
2140 return err;
2141 }
2142
2143 /**
2144 * e1000_clean_tx_ring - Free Tx Buffers
2145 * @adapter: board private structure
2146 **/
2147 static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2148 {
2149 struct e1000_ring *tx_ring = adapter->tx_ring;
2150 struct e1000_buffer *buffer_info;
2151 unsigned long size;
2152 unsigned int i;
2153
2154 for (i = 0; i < tx_ring->count; i++) {
2155 buffer_info = &tx_ring->buffer_info[i];
2156 e1000_put_txbuf(adapter, buffer_info);
2157 }
2158
2159 size = sizeof(struct e1000_buffer) * tx_ring->count;
2160 memset(tx_ring->buffer_info, 0, size);
2161
2162 memset(tx_ring->desc, 0, tx_ring->size);
2163
2164 tx_ring->next_to_use = 0;
2165 tx_ring->next_to_clean = 0;
2166
2167 writel(0, adapter->hw.hw_addr + tx_ring->head);
2168 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2169 }
2170
2171 /**
2172 * e1000e_free_tx_resources - Free Tx Resources per Queue
2173 * @adapter: board private structure
2174 *
2175 * Free all transmit software resources
2176 **/
2177 void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2178 {
2179 struct pci_dev *pdev = adapter->pdev;
2180 struct e1000_ring *tx_ring = adapter->tx_ring;
2181
2182 e1000_clean_tx_ring(adapter);
2183
2184 vfree(tx_ring->buffer_info);
2185 tx_ring->buffer_info = NULL;
2186
2187 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2188 tx_ring->dma);
2189 tx_ring->desc = NULL;
2190 }
2191
2192 /**
2193 * e1000e_free_rx_resources - Free Rx Resources
2194 * @adapter: board private structure
2195 *
2196 * Free all receive software resources
2197 **/
2198
2199 void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2200 {
2201 struct pci_dev *pdev = adapter->pdev;
2202 struct e1000_ring *rx_ring = adapter->rx_ring;
2203 int i;
2204
2205 e1000_clean_rx_ring(adapter);
2206
2207 for (i = 0; i < rx_ring->count; i++)
2208 kfree(rx_ring->buffer_info[i].ps_pages);
2209
2210 vfree(rx_ring->buffer_info);
2211 rx_ring->buffer_info = NULL;
2212
2213 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2214 rx_ring->dma);
2215 rx_ring->desc = NULL;
2216 }
2217
2218 /**
2219 * e1000_update_itr - update the dynamic ITR value based on statistics
2220 * @adapter: pointer to adapter
2221 * @itr_setting: current adapter->itr
2222 * @packets: the number of packets during this measurement interval
2223 * @bytes: the number of bytes during this measurement interval
2224 *
2225 * Stores a new ITR value based on packets and byte
2226 * counts during the last interrupt. The advantage of per interrupt
2227 * computation is faster updates and more accurate ITR for the current
2228 * traffic pattern. Constants in this function were computed
2229 * based on theoretical maximum wire speed and thresholds were set based
2230 * on testing data as well as attempting to minimize response time
2231 * while increasing bulk throughput. This functionality is controlled
2232 * by the InterruptThrottleRate module parameter.
2233 **/
2234 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2235 u16 itr_setting, int packets,
2236 int bytes)
2237 {
2238 unsigned int retval = itr_setting;
2239
2240 if (packets == 0)
2241 goto update_itr_done;
2242
2243 switch (itr_setting) {
2244 case lowest_latency:
2245 /* handle TSO and jumbo frames */
2246 if (bytes/packets > 8000)
2247 retval = bulk_latency;
2248 else if ((packets < 5) && (bytes > 512))
2249 retval = low_latency;
2250 break;
2251 case low_latency: /* 50 usec aka 20000 ints/s */
2252 if (bytes > 10000) {
2253 /* this if handles the TSO accounting */
2254 if (bytes/packets > 8000)
2255 retval = bulk_latency;
2256 else if ((packets < 10) || ((bytes/packets) > 1200))
2257 retval = bulk_latency;
2258 else if ((packets > 35))
2259 retval = lowest_latency;
2260 } else if (bytes/packets > 2000) {
2261 retval = bulk_latency;
2262 } else if (packets <= 2 && bytes < 512) {
2263 retval = lowest_latency;
2264 }
2265 break;
2266 case bulk_latency: /* 250 usec aka 4000 ints/s */
2267 if (bytes > 25000) {
2268 if (packets > 35)
2269 retval = low_latency;
2270 } else if (bytes < 6000) {
2271 retval = low_latency;
2272 }
2273 break;
2274 }
2275
2276 update_itr_done:
2277 return retval;
2278 }
2279
2280 static void e1000_set_itr(struct e1000_adapter *adapter)
2281 {
2282 struct e1000_hw *hw = &adapter->hw;
2283 u16 current_itr;
2284 u32 new_itr = adapter->itr;
2285
2286 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2287 if (adapter->link_speed != SPEED_1000) {
2288 current_itr = 0;
2289 new_itr = 4000;
2290 goto set_itr_now;
2291 }
2292
2293 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2294 new_itr = 0;
2295 goto set_itr_now;
2296 }
2297
2298 adapter->tx_itr = e1000_update_itr(adapter,
2299 adapter->tx_itr,
2300 adapter->total_tx_packets,
2301 adapter->total_tx_bytes);
2302 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2303 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2304 adapter->tx_itr = low_latency;
2305
2306 adapter->rx_itr = e1000_update_itr(adapter,
2307 adapter->rx_itr,
2308 adapter->total_rx_packets,
2309 adapter->total_rx_bytes);
2310 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2311 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2312 adapter->rx_itr = low_latency;
2313
2314 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2315
2316 switch (current_itr) {
2317 /* counts and packets in update_itr are dependent on these numbers */
2318 case lowest_latency:
2319 new_itr = 70000;
2320 break;
2321 case low_latency:
2322 new_itr = 20000; /* aka hwitr = ~200 */
2323 break;
2324 case bulk_latency:
2325 new_itr = 4000;
2326 break;
2327 default:
2328 break;
2329 }
2330
2331 set_itr_now:
2332 if (new_itr != adapter->itr) {
2333 /*
2334 * this attempts to bias the interrupt rate towards Bulk
2335 * by adding intermediate steps when interrupt rate is
2336 * increasing
2337 */
2338 new_itr = new_itr > adapter->itr ?
2339 min(adapter->itr + (new_itr >> 2), new_itr) :
2340 new_itr;
2341 adapter->itr = new_itr;
2342 adapter->rx_ring->itr_val = new_itr;
2343 if (adapter->msix_entries)
2344 adapter->rx_ring->set_itr = 1;
2345 else
2346 if (new_itr)
2347 ew32(ITR, 1000000000 / (new_itr * 256));
2348 else
2349 ew32(ITR, 0);
2350 }
2351 }
2352
2353 /**
2354 * e1000_alloc_queues - Allocate memory for all rings
2355 * @adapter: board private structure to initialize
2356 **/
2357 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2358 {
2359 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2360 if (!adapter->tx_ring)
2361 goto err;
2362
2363 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2364 if (!adapter->rx_ring)
2365 goto err;
2366
2367 return 0;
2368 err:
2369 e_err("Unable to allocate memory for queues\n");
2370 kfree(adapter->rx_ring);
2371 kfree(adapter->tx_ring);
2372 return -ENOMEM;
2373 }
2374
2375 /**
2376 * e1000_clean - NAPI Rx polling callback
2377 * @napi: struct associated with this polling callback
2378 * @budget: amount of packets driver is allowed to process this poll
2379 **/
2380 static int e1000_clean(struct napi_struct *napi, int budget)
2381 {
2382 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
2383 struct e1000_hw *hw = &adapter->hw;
2384 struct net_device *poll_dev = adapter->netdev;
2385 int tx_cleaned = 1, work_done = 0;
2386
2387 adapter = netdev_priv(poll_dev);
2388
2389 if (adapter->msix_entries &&
2390 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2391 goto clean_rx;
2392
2393 tx_cleaned = e1000_clean_tx_irq(adapter);
2394
2395 clean_rx:
2396 adapter->clean_rx(adapter, &work_done, budget);
2397
2398 if (!tx_cleaned)
2399 work_done = budget;
2400
2401 /* If budget not fully consumed, exit the polling mode */
2402 if (work_done < budget) {
2403 if (adapter->itr_setting & 3)
2404 e1000_set_itr(adapter);
2405 napi_complete(napi);
2406 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2407 if (adapter->msix_entries)
2408 ew32(IMS, adapter->rx_ring->ims_val);
2409 else
2410 e1000_irq_enable(adapter);
2411 }
2412 }
2413
2414 return work_done;
2415 }
2416
2417 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2418 {
2419 struct e1000_adapter *adapter = netdev_priv(netdev);
2420 struct e1000_hw *hw = &adapter->hw;
2421 u32 vfta, index;
2422
2423 /* don't update vlan cookie if already programmed */
2424 if ((adapter->hw.mng_cookie.status &
2425 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2426 (vid == adapter->mng_vlan_id))
2427 return;
2428
2429 /* add VID to filter table */
2430 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2431 index = (vid >> 5) & 0x7F;
2432 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2433 vfta |= (1 << (vid & 0x1F));
2434 hw->mac.ops.write_vfta(hw, index, vfta);
2435 }
2436 }
2437
2438 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2439 {
2440 struct e1000_adapter *adapter = netdev_priv(netdev);
2441 struct e1000_hw *hw = &adapter->hw;
2442 u32 vfta, index;
2443
2444 if (!test_bit(__E1000_DOWN, &adapter->state))
2445 e1000_irq_disable(adapter);
2446 vlan_group_set_device(adapter->vlgrp, vid, NULL);
2447
2448 if (!test_bit(__E1000_DOWN, &adapter->state))
2449 e1000_irq_enable(adapter);
2450
2451 if ((adapter->hw.mng_cookie.status &
2452 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2453 (vid == adapter->mng_vlan_id)) {
2454 /* release control to f/w */
2455 e1000e_release_hw_control(adapter);
2456 return;
2457 }
2458
2459 /* remove VID from filter table */
2460 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2461 index = (vid >> 5) & 0x7F;
2462 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2463 vfta &= ~(1 << (vid & 0x1F));
2464 hw->mac.ops.write_vfta(hw, index, vfta);
2465 }
2466 }
2467
2468 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2469 {
2470 struct net_device *netdev = adapter->netdev;
2471 u16 vid = adapter->hw.mng_cookie.vlan_id;
2472 u16 old_vid = adapter->mng_vlan_id;
2473
2474 if (!adapter->vlgrp)
2475 return;
2476
2477 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2478 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2479 if (adapter->hw.mng_cookie.status &
2480 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2481 e1000_vlan_rx_add_vid(netdev, vid);
2482 adapter->mng_vlan_id = vid;
2483 }
2484
2485 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2486 (vid != old_vid) &&
2487 !vlan_group_get_device(adapter->vlgrp, old_vid))
2488 e1000_vlan_rx_kill_vid(netdev, old_vid);
2489 } else {
2490 adapter->mng_vlan_id = vid;
2491 }
2492 }
2493
2494
2495 static void e1000_vlan_rx_register(struct net_device *netdev,
2496 struct vlan_group *grp)
2497 {
2498 struct e1000_adapter *adapter = netdev_priv(netdev);
2499 struct e1000_hw *hw = &adapter->hw;
2500 u32 ctrl, rctl;
2501
2502 if (!test_bit(__E1000_DOWN, &adapter->state))
2503 e1000_irq_disable(adapter);
2504 adapter->vlgrp = grp;
2505
2506 if (grp) {
2507 /* enable VLAN tag insert/strip */
2508 ctrl = er32(CTRL);
2509 ctrl |= E1000_CTRL_VME;
2510 ew32(CTRL, ctrl);
2511
2512 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2513 /* enable VLAN receive filtering */
2514 rctl = er32(RCTL);
2515 rctl &= ~E1000_RCTL_CFIEN;
2516 ew32(RCTL, rctl);
2517 e1000_update_mng_vlan(adapter);
2518 }
2519 } else {
2520 /* disable VLAN tag insert/strip */
2521 ctrl = er32(CTRL);
2522 ctrl &= ~E1000_CTRL_VME;
2523 ew32(CTRL, ctrl);
2524
2525 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2526 if (adapter->mng_vlan_id !=
2527 (u16)E1000_MNG_VLAN_NONE) {
2528 e1000_vlan_rx_kill_vid(netdev,
2529 adapter->mng_vlan_id);
2530 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2531 }
2532 }
2533 }
2534
2535 if (!test_bit(__E1000_DOWN, &adapter->state))
2536 e1000_irq_enable(adapter);
2537 }
2538
2539 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2540 {
2541 u16 vid;
2542
2543 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2544
2545 if (!adapter->vlgrp)
2546 return;
2547
2548 for (vid = 0; vid < VLAN_N_VID; vid++) {
2549 if (!vlan_group_get_device(adapter->vlgrp, vid))
2550 continue;
2551 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2552 }
2553 }
2554
2555 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2556 {
2557 struct e1000_hw *hw = &adapter->hw;
2558 u32 manc, manc2h, mdef, i, j;
2559
2560 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2561 return;
2562
2563 manc = er32(MANC);
2564
2565 /*
2566 * enable receiving management packets to the host. this will probably
2567 * generate destination unreachable messages from the host OS, but
2568 * the packets will be handled on SMBUS
2569 */
2570 manc |= E1000_MANC_EN_MNG2HOST;
2571 manc2h = er32(MANC2H);
2572
2573 switch (hw->mac.type) {
2574 default:
2575 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2576 break;
2577 case e1000_82574:
2578 case e1000_82583:
2579 /*
2580 * Check if IPMI pass-through decision filter already exists;
2581 * if so, enable it.
2582 */
2583 for (i = 0, j = 0; i < 8; i++) {
2584 mdef = er32(MDEF(i));
2585
2586 /* Ignore filters with anything other than IPMI ports */
2587 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2588 continue;
2589
2590 /* Enable this decision filter in MANC2H */
2591 if (mdef)
2592 manc2h |= (1 << i);
2593
2594 j |= mdef;
2595 }
2596
2597 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2598 break;
2599
2600 /* Create new decision filter in an empty filter */
2601 for (i = 0, j = 0; i < 8; i++)
2602 if (er32(MDEF(i)) == 0) {
2603 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2604 E1000_MDEF_PORT_664));
2605 manc2h |= (1 << 1);
2606 j++;
2607 break;
2608 }
2609
2610 if (!j)
2611 e_warn("Unable to create IPMI pass-through filter\n");
2612 break;
2613 }
2614
2615 ew32(MANC2H, manc2h);
2616 ew32(MANC, manc);
2617 }
2618
2619 /**
2620 * e1000_configure_tx - Configure Transmit Unit after Reset
2621 * @adapter: board private structure
2622 *
2623 * Configure the Tx unit of the MAC after a reset.
2624 **/
2625 static void e1000_configure_tx(struct e1000_adapter *adapter)
2626 {
2627 struct e1000_hw *hw = &adapter->hw;
2628 struct e1000_ring *tx_ring = adapter->tx_ring;
2629 u64 tdba;
2630 u32 tdlen, tctl, tipg, tarc;
2631 u32 ipgr1, ipgr2;
2632
2633 /* Setup the HW Tx Head and Tail descriptor pointers */
2634 tdba = tx_ring->dma;
2635 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2636 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
2637 ew32(TDBAH, (tdba >> 32));
2638 ew32(TDLEN, tdlen);
2639 ew32(TDH, 0);
2640 ew32(TDT, 0);
2641 tx_ring->head = E1000_TDH;
2642 tx_ring->tail = E1000_TDT;
2643
2644 /* Set the default values for the Tx Inter Packet Gap timer */
2645 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2646 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2647 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2648
2649 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2650 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2651
2652 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2653 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2654 ew32(TIPG, tipg);
2655
2656 /* Set the Tx Interrupt Delay register */
2657 ew32(TIDV, adapter->tx_int_delay);
2658 /* Tx irq moderation */
2659 ew32(TADV, adapter->tx_abs_int_delay);
2660
2661 if (adapter->flags2 & FLAG2_DMA_BURST) {
2662 u32 txdctl = er32(TXDCTL(0));
2663 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2664 E1000_TXDCTL_WTHRESH);
2665 /*
2666 * set up some performance related parameters to encourage the
2667 * hardware to use the bus more efficiently in bursts, depends
2668 * on the tx_int_delay to be enabled,
2669 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2670 * hthresh = 1 ==> prefetch when one or more available
2671 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2672 * BEWARE: this seems to work but should be considered first if
2673 * there are Tx hangs or other Tx related bugs
2674 */
2675 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2676 ew32(TXDCTL(0), txdctl);
2677 /* erratum work around: set txdctl the same for both queues */
2678 ew32(TXDCTL(1), txdctl);
2679 }
2680
2681 /* Program the Transmit Control Register */
2682 tctl = er32(TCTL);
2683 tctl &= ~E1000_TCTL_CT;
2684 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2685 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2686
2687 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2688 tarc = er32(TARC(0));
2689 /*
2690 * set the speed mode bit, we'll clear it if we're not at
2691 * gigabit link later
2692 */
2693 #define SPEED_MODE_BIT (1 << 21)
2694 tarc |= SPEED_MODE_BIT;
2695 ew32(TARC(0), tarc);
2696 }
2697
2698 /* errata: program both queues to unweighted RR */
2699 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2700 tarc = er32(TARC(0));
2701 tarc |= 1;
2702 ew32(TARC(0), tarc);
2703 tarc = er32(TARC(1));
2704 tarc |= 1;
2705 ew32(TARC(1), tarc);
2706 }
2707
2708 /* Setup Transmit Descriptor Settings for eop descriptor */
2709 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2710
2711 /* only set IDE if we are delaying interrupts using the timers */
2712 if (adapter->tx_int_delay)
2713 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2714
2715 /* enable Report Status bit */
2716 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2717
2718 ew32(TCTL, tctl);
2719
2720 e1000e_config_collision_dist(hw);
2721 }
2722
2723 /**
2724 * e1000_setup_rctl - configure the receive control registers
2725 * @adapter: Board private structure
2726 **/
2727 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2728 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2729 static void e1000_setup_rctl(struct e1000_adapter *adapter)
2730 {
2731 struct e1000_hw *hw = &adapter->hw;
2732 u32 rctl, rfctl;
2733 u32 pages = 0;
2734
2735 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2736 if (hw->mac.type == e1000_pch2lan) {
2737 s32 ret_val;
2738
2739 if (adapter->netdev->mtu > ETH_DATA_LEN)
2740 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2741 else
2742 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2743
2744 if (ret_val)
2745 e_dbg("failed to enable jumbo frame workaround mode\n");
2746 }
2747
2748 /* Program MC offset vector base */
2749 rctl = er32(RCTL);
2750 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2751 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2752 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2753 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2754
2755 /* Do not Store bad packets */
2756 rctl &= ~E1000_RCTL_SBP;
2757
2758 /* Enable Long Packet receive */
2759 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2760 rctl &= ~E1000_RCTL_LPE;
2761 else
2762 rctl |= E1000_RCTL_LPE;
2763
2764 /* Some systems expect that the CRC is included in SMBUS traffic. The
2765 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2766 * host memory when this is enabled
2767 */
2768 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2769 rctl |= E1000_RCTL_SECRC;
2770
2771 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2772 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2773 u16 phy_data;
2774
2775 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2776 phy_data &= 0xfff8;
2777 phy_data |= (1 << 2);
2778 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2779
2780 e1e_rphy(hw, 22, &phy_data);
2781 phy_data &= 0x0fff;
2782 phy_data |= (1 << 14);
2783 e1e_wphy(hw, 0x10, 0x2823);
2784 e1e_wphy(hw, 0x11, 0x0003);
2785 e1e_wphy(hw, 22, phy_data);
2786 }
2787
2788 /* Setup buffer sizes */
2789 rctl &= ~E1000_RCTL_SZ_4096;
2790 rctl |= E1000_RCTL_BSEX;
2791 switch (adapter->rx_buffer_len) {
2792 case 2048:
2793 default:
2794 rctl |= E1000_RCTL_SZ_2048;
2795 rctl &= ~E1000_RCTL_BSEX;
2796 break;
2797 case 4096:
2798 rctl |= E1000_RCTL_SZ_4096;
2799 break;
2800 case 8192:
2801 rctl |= E1000_RCTL_SZ_8192;
2802 break;
2803 case 16384:
2804 rctl |= E1000_RCTL_SZ_16384;
2805 break;
2806 }
2807
2808 /*
2809 * 82571 and greater support packet-split where the protocol
2810 * header is placed in skb->data and the packet data is
2811 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2812 * In the case of a non-split, skb->data is linearly filled,
2813 * followed by the page buffers. Therefore, skb->data is
2814 * sized to hold the largest protocol header.
2815 *
2816 * allocations using alloc_page take too long for regular MTU
2817 * so only enable packet split for jumbo frames
2818 *
2819 * Using pages when the page size is greater than 16k wastes
2820 * a lot of memory, since we allocate 3 pages at all times
2821 * per packet.
2822 */
2823 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2824 if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
2825 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
2826 adapter->rx_ps_pages = pages;
2827 else
2828 adapter->rx_ps_pages = 0;
2829
2830 if (adapter->rx_ps_pages) {
2831 u32 psrctl = 0;
2832
2833 /* Configure extra packet-split registers */
2834 rfctl = er32(RFCTL);
2835 rfctl |= E1000_RFCTL_EXTEN;
2836 /*
2837 * disable packet split support for IPv6 extension headers,
2838 * because some malformed IPv6 headers can hang the Rx
2839 */
2840 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2841 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2842
2843 ew32(RFCTL, rfctl);
2844
2845 /* Enable Packet split descriptors */
2846 rctl |= E1000_RCTL_DTYP_PS;
2847
2848 psrctl |= adapter->rx_ps_bsize0 >>
2849 E1000_PSRCTL_BSIZE0_SHIFT;
2850
2851 switch (adapter->rx_ps_pages) {
2852 case 3:
2853 psrctl |= PAGE_SIZE <<
2854 E1000_PSRCTL_BSIZE3_SHIFT;
2855 case 2:
2856 psrctl |= PAGE_SIZE <<
2857 E1000_PSRCTL_BSIZE2_SHIFT;
2858 case 1:
2859 psrctl |= PAGE_SIZE >>
2860 E1000_PSRCTL_BSIZE1_SHIFT;
2861 break;
2862 }
2863
2864 ew32(PSRCTL, psrctl);
2865 }
2866
2867 ew32(RCTL, rctl);
2868 /* just started the receive unit, no need to restart */
2869 adapter->flags &= ~FLAG_RX_RESTART_NOW;
2870 }
2871
2872 /**
2873 * e1000_configure_rx - Configure Receive Unit after Reset
2874 * @adapter: board private structure
2875 *
2876 * Configure the Rx unit of the MAC after a reset.
2877 **/
2878 static void e1000_configure_rx(struct e1000_adapter *adapter)
2879 {
2880 struct e1000_hw *hw = &adapter->hw;
2881 struct e1000_ring *rx_ring = adapter->rx_ring;
2882 u64 rdba;
2883 u32 rdlen, rctl, rxcsum, ctrl_ext;
2884
2885 if (adapter->rx_ps_pages) {
2886 /* this is a 32 byte descriptor */
2887 rdlen = rx_ring->count *
2888 sizeof(union e1000_rx_desc_packet_split);
2889 adapter->clean_rx = e1000_clean_rx_irq_ps;
2890 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2891 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2892 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2893 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2894 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
2895 } else {
2896 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2897 adapter->clean_rx = e1000_clean_rx_irq;
2898 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2899 }
2900
2901 /* disable receives while setting up the descriptors */
2902 rctl = er32(RCTL);
2903 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2904 e1e_flush();
2905 msleep(10);
2906
2907 if (adapter->flags2 & FLAG2_DMA_BURST) {
2908 /*
2909 * set the writeback threshold (only takes effect if the RDTR
2910 * is set). set GRAN=1 and write back up to 0x4 worth, and
2911 * enable prefetching of 0x20 Rx descriptors
2912 * granularity = 01
2913 * wthresh = 04,
2914 * hthresh = 04,
2915 * pthresh = 0x20
2916 */
2917 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
2918 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
2919
2920 /*
2921 * override the delay timers for enabling bursting, only if
2922 * the value was not set by the user via module options
2923 */
2924 if (adapter->rx_int_delay == DEFAULT_RDTR)
2925 adapter->rx_int_delay = BURST_RDTR;
2926 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
2927 adapter->rx_abs_int_delay = BURST_RADV;
2928 }
2929
2930 /* set the Receive Delay Timer Register */
2931 ew32(RDTR, adapter->rx_int_delay);
2932
2933 /* irq moderation */
2934 ew32(RADV, adapter->rx_abs_int_delay);
2935 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
2936 ew32(ITR, 1000000000 / (adapter->itr * 256));
2937
2938 ctrl_ext = er32(CTRL_EXT);
2939 /* Auto-Mask interrupts upon ICR access */
2940 ctrl_ext |= E1000_CTRL_EXT_IAME;
2941 ew32(IAM, 0xffffffff);
2942 ew32(CTRL_EXT, ctrl_ext);
2943 e1e_flush();
2944
2945 /*
2946 * Setup the HW Rx Head and Tail Descriptor Pointers and
2947 * the Base and Length of the Rx Descriptor Ring
2948 */
2949 rdba = rx_ring->dma;
2950 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
2951 ew32(RDBAH, (rdba >> 32));
2952 ew32(RDLEN, rdlen);
2953 ew32(RDH, 0);
2954 ew32(RDT, 0);
2955 rx_ring->head = E1000_RDH;
2956 rx_ring->tail = E1000_RDT;
2957
2958 /* Enable Receive Checksum Offload for TCP and UDP */
2959 rxcsum = er32(RXCSUM);
2960 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2961 rxcsum |= E1000_RXCSUM_TUOFL;
2962
2963 /*
2964 * IPv4 payload checksum for UDP fragments must be
2965 * used in conjunction with packet-split.
2966 */
2967 if (adapter->rx_ps_pages)
2968 rxcsum |= E1000_RXCSUM_IPPCSE;
2969 } else {
2970 rxcsum &= ~E1000_RXCSUM_TUOFL;
2971 /* no need to clear IPPCSE as it defaults to 0 */
2972 }
2973 ew32(RXCSUM, rxcsum);
2974
2975 /*
2976 * Enable early receives on supported devices, only takes effect when
2977 * packet size is equal or larger than the specified value (in 8 byte
2978 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2979 */
2980 if ((adapter->flags & FLAG_HAS_ERT) ||
2981 (adapter->hw.mac.type == e1000_pch2lan)) {
2982 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2983 u32 rxdctl = er32(RXDCTL(0));
2984 ew32(RXDCTL(0), rxdctl | 0x3);
2985 if (adapter->flags & FLAG_HAS_ERT)
2986 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2987 /*
2988 * With jumbo frames and early-receive enabled,
2989 * excessive C-state transition latencies result in
2990 * dropped transactions.
2991 */
2992 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
2993 } else {
2994 pm_qos_update_request(&adapter->netdev->pm_qos_req,
2995 PM_QOS_DEFAULT_VALUE);
2996 }
2997 }
2998
2999 /* Enable Receives */
3000 ew32(RCTL, rctl);
3001 }
3002
3003 /**
3004 * e1000_update_mc_addr_list - Update Multicast addresses
3005 * @hw: pointer to the HW structure
3006 * @mc_addr_list: array of multicast addresses to program
3007 * @mc_addr_count: number of multicast addresses to program
3008 *
3009 * Updates the Multicast Table Array.
3010 * The caller must have a packed mc_addr_list of multicast addresses.
3011 **/
3012 static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
3013 u32 mc_addr_count)
3014 {
3015 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
3016 }
3017
3018 /**
3019 * e1000_set_multi - Multicast and Promiscuous mode set
3020 * @netdev: network interface device structure
3021 *
3022 * The set_multi entry point is called whenever the multicast address
3023 * list or the network interface flags are updated. This routine is
3024 * responsible for configuring the hardware for proper multicast,
3025 * promiscuous mode, and all-multi behavior.
3026 **/
3027 static void e1000_set_multi(struct net_device *netdev)
3028 {
3029 struct e1000_adapter *adapter = netdev_priv(netdev);
3030 struct e1000_hw *hw = &adapter->hw;
3031 struct netdev_hw_addr *ha;
3032 u8 *mta_list;
3033 u32 rctl;
3034
3035 /* Check for Promiscuous and All Multicast modes */
3036
3037 rctl = er32(RCTL);
3038
3039 if (netdev->flags & IFF_PROMISC) {
3040 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3041 rctl &= ~E1000_RCTL_VFE;
3042 } else {
3043 if (netdev->flags & IFF_ALLMULTI) {
3044 rctl |= E1000_RCTL_MPE;
3045 rctl &= ~E1000_RCTL_UPE;
3046 } else {
3047 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3048 }
3049 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
3050 rctl |= E1000_RCTL_VFE;
3051 }
3052
3053 ew32(RCTL, rctl);
3054
3055 if (!netdev_mc_empty(netdev)) {
3056 int i = 0;
3057
3058 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3059 if (!mta_list)
3060 return;
3061
3062 /* prepare a packed array of only addresses. */
3063 netdev_for_each_mc_addr(ha, netdev)
3064 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3065
3066 e1000_update_mc_addr_list(hw, mta_list, i);
3067 kfree(mta_list);
3068 } else {
3069 /*
3070 * if we're called from probe, we might not have
3071 * anything to do here, so clear out the list
3072 */
3073 e1000_update_mc_addr_list(hw, NULL, 0);
3074 }
3075 }
3076
3077 /**
3078 * e1000_configure - configure the hardware for Rx and Tx
3079 * @adapter: private board structure
3080 **/
3081 static void e1000_configure(struct e1000_adapter *adapter)
3082 {
3083 e1000_set_multi(adapter->netdev);
3084
3085 e1000_restore_vlan(adapter);
3086 e1000_init_manageability_pt(adapter);
3087
3088 e1000_configure_tx(adapter);
3089 e1000_setup_rctl(adapter);
3090 e1000_configure_rx(adapter);
3091 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
3092 }
3093
3094 /**
3095 * e1000e_power_up_phy - restore link in case the phy was powered down
3096 * @adapter: address of board private structure
3097 *
3098 * The phy may be powered down to save power and turn off link when the
3099 * driver is unloaded and wake on lan is not enabled (among others)
3100 * *** this routine MUST be followed by a call to e1000e_reset ***
3101 **/
3102 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3103 {
3104 if (adapter->hw.phy.ops.power_up)
3105 adapter->hw.phy.ops.power_up(&adapter->hw);
3106
3107 adapter->hw.mac.ops.setup_link(&adapter->hw);
3108 }
3109
3110 /**
3111 * e1000_power_down_phy - Power down the PHY
3112 *
3113 * Power down the PHY so no link is implied when interface is down.
3114 * The PHY cannot be powered down if management or WoL is active.
3115 */
3116 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3117 {
3118 /* WoL is enabled */
3119 if (adapter->wol)
3120 return;
3121
3122 if (adapter->hw.phy.ops.power_down)
3123 adapter->hw.phy.ops.power_down(&adapter->hw);
3124 }
3125
3126 /**
3127 * e1000e_reset - bring the hardware into a known good state
3128 *
3129 * This function boots the hardware and enables some settings that
3130 * require a configuration cycle of the hardware - those cannot be
3131 * set/changed during runtime. After reset the device needs to be
3132 * properly configured for Rx, Tx etc.
3133 */
3134 void e1000e_reset(struct e1000_adapter *adapter)
3135 {
3136 struct e1000_mac_info *mac = &adapter->hw.mac;
3137 struct e1000_fc_info *fc = &adapter->hw.fc;
3138 struct e1000_hw *hw = &adapter->hw;
3139 u32 tx_space, min_tx_space, min_rx_space;
3140 u32 pba = adapter->pba;
3141 u16 hwm;
3142
3143 /* reset Packet Buffer Allocation to default */
3144 ew32(PBA, pba);
3145
3146 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3147 /*
3148 * To maintain wire speed transmits, the Tx FIFO should be
3149 * large enough to accommodate two full transmit packets,
3150 * rounded up to the next 1KB and expressed in KB. Likewise,
3151 * the Rx FIFO should be large enough to accommodate at least
3152 * one full receive packet and is similarly rounded up and
3153 * expressed in KB.
3154 */
3155 pba = er32(PBA);
3156 /* upper 16 bits has Tx packet buffer allocation size in KB */
3157 tx_space = pba >> 16;
3158 /* lower 16 bits has Rx packet buffer allocation size in KB */
3159 pba &= 0xffff;
3160 /*
3161 * the Tx fifo also stores 16 bytes of information about the Tx
3162 * but don't include ethernet FCS because hardware appends it
3163 */
3164 min_tx_space = (adapter->max_frame_size +
3165 sizeof(struct e1000_tx_desc) -
3166 ETH_FCS_LEN) * 2;
3167 min_tx_space = ALIGN(min_tx_space, 1024);
3168 min_tx_space >>= 10;
3169 /* software strips receive CRC, so leave room for it */
3170 min_rx_space = adapter->max_frame_size;
3171 min_rx_space = ALIGN(min_rx_space, 1024);
3172 min_rx_space >>= 10;
3173
3174 /*
3175 * If current Tx allocation is less than the min Tx FIFO size,
3176 * and the min Tx FIFO size is less than the current Rx FIFO
3177 * allocation, take space away from current Rx allocation
3178 */
3179 if ((tx_space < min_tx_space) &&
3180 ((min_tx_space - tx_space) < pba)) {
3181 pba -= min_tx_space - tx_space;
3182
3183 /*
3184 * if short on Rx space, Rx wins and must trump Tx
3185 * adjustment or use Early Receive if available
3186 */
3187 if ((pba < min_rx_space) &&
3188 (!(adapter->flags & FLAG_HAS_ERT)))
3189 /* ERT enabled in e1000_configure_rx */
3190 pba = min_rx_space;
3191 }
3192
3193 ew32(PBA, pba);
3194 }
3195
3196 /*
3197 * flow control settings
3198 *
3199 * The high water mark must be low enough to fit one full frame
3200 * (or the size used for early receive) above it in the Rx FIFO.
3201 * Set it to the lower of:
3202 * - 90% of the Rx FIFO size, and
3203 * - the full Rx FIFO size minus the early receive size (for parts
3204 * with ERT support assuming ERT set to E1000_ERT_2048), or
3205 * - the full Rx FIFO size minus one full frame
3206 */
3207 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3208 fc->pause_time = 0xFFFF;
3209 else
3210 fc->pause_time = E1000_FC_PAUSE_TIME;
3211 fc->send_xon = 1;
3212 fc->current_mode = fc->requested_mode;
3213
3214 switch (hw->mac.type) {
3215 default:
3216 if ((adapter->flags & FLAG_HAS_ERT) &&
3217 (adapter->netdev->mtu > ETH_DATA_LEN))
3218 hwm = min(((pba << 10) * 9 / 10),
3219 ((pba << 10) - (E1000_ERT_2048 << 3)));
3220 else
3221 hwm = min(((pba << 10) * 9 / 10),
3222 ((pba << 10) - adapter->max_frame_size));
3223
3224 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3225 fc->low_water = fc->high_water - 8;
3226 break;
3227 case e1000_pchlan:
3228 /*
3229 * Workaround PCH LOM adapter hangs with certain network
3230 * loads. If hangs persist, try disabling Tx flow control.
3231 */
3232 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3233 fc->high_water = 0x3500;
3234 fc->low_water = 0x1500;
3235 } else {
3236 fc->high_water = 0x5000;
3237 fc->low_water = 0x3000;
3238 }
3239 fc->refresh_time = 0x1000;
3240 break;
3241 case e1000_pch2lan:
3242 fc->high_water = 0x05C20;
3243 fc->low_water = 0x05048;
3244 fc->pause_time = 0x0650;
3245 fc->refresh_time = 0x0400;
3246 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3247 pba = 14;
3248 ew32(PBA, pba);
3249 }
3250 break;
3251 }
3252
3253 /*
3254 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3255 * fit in receive buffer and early-receive not supported.
3256 */
3257 if (adapter->itr_setting & 0x3) {
3258 if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3259 !(adapter->flags & FLAG_HAS_ERT)) {
3260 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3261 dev_info(&adapter->pdev->dev,
3262 "Interrupt Throttle Rate turned off\n");
3263 adapter->flags2 |= FLAG2_DISABLE_AIM;
3264 ew32(ITR, 0);
3265 }
3266 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3267 dev_info(&adapter->pdev->dev,
3268 "Interrupt Throttle Rate turned on\n");
3269 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3270 adapter->itr = 20000;
3271 ew32(ITR, 1000000000 / (adapter->itr * 256));
3272 }
3273 }
3274
3275 /* Allow time for pending master requests to run */
3276 mac->ops.reset_hw(hw);
3277
3278 /*
3279 * For parts with AMT enabled, let the firmware know
3280 * that the network interface is in control
3281 */
3282 if (adapter->flags & FLAG_HAS_AMT)
3283 e1000e_get_hw_control(adapter);
3284
3285 ew32(WUC, 0);
3286
3287 if (mac->ops.init_hw(hw))
3288 e_err("Hardware Error\n");
3289
3290 e1000_update_mng_vlan(adapter);
3291
3292 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3293 ew32(VET, ETH_P_8021Q);
3294
3295 e1000e_reset_adaptive(hw);
3296
3297 if (!netif_running(adapter->netdev) &&
3298 !test_bit(__E1000_TESTING, &adapter->state)) {
3299 e1000_power_down_phy(adapter);
3300 return;
3301 }
3302
3303 e1000_get_phy_info(hw);
3304
3305 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3306 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3307 u16 phy_data = 0;
3308 /*
3309 * speed up time to link by disabling smart power down, ignore
3310 * the return value of this function because there is nothing
3311 * different we would do if it failed
3312 */
3313 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3314 phy_data &= ~IGP02E1000_PM_SPD;
3315 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3316 }
3317 }
3318
3319 int e1000e_up(struct e1000_adapter *adapter)
3320 {
3321 struct e1000_hw *hw = &adapter->hw;
3322
3323 /* hardware has been reset, we need to reload some things */
3324 e1000_configure(adapter);
3325
3326 clear_bit(__E1000_DOWN, &adapter->state);
3327
3328 napi_enable(&adapter->napi);
3329 if (adapter->msix_entries)
3330 e1000_configure_msix(adapter);
3331 e1000_irq_enable(adapter);
3332
3333 netif_wake_queue(adapter->netdev);
3334
3335 /* fire a link change interrupt to start the watchdog */
3336 if (adapter->msix_entries)
3337 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3338 else
3339 ew32(ICS, E1000_ICS_LSC);
3340
3341 return 0;
3342 }
3343
3344 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3345 {
3346 struct e1000_hw *hw = &adapter->hw;
3347
3348 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3349 return;
3350
3351 /* flush pending descriptor writebacks to memory */
3352 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3353 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3354
3355 /* execute the writes immediately */
3356 e1e_flush();
3357 }
3358
3359 static void e1000e_update_stats(struct e1000_adapter *adapter);
3360
3361 void e1000e_down(struct e1000_adapter *adapter)
3362 {
3363 struct net_device *netdev = adapter->netdev;
3364 struct e1000_hw *hw = &adapter->hw;
3365 u32 tctl, rctl;
3366
3367 /*
3368 * signal that we're down so the interrupt handler does not
3369 * reschedule our watchdog timer
3370 */
3371 set_bit(__E1000_DOWN, &adapter->state);
3372
3373 /* disable receives in the hardware */
3374 rctl = er32(RCTL);
3375 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3376 /* flush and sleep below */
3377
3378 netif_stop_queue(netdev);
3379
3380 /* disable transmits in the hardware */
3381 tctl = er32(TCTL);
3382 tctl &= ~E1000_TCTL_EN;
3383 ew32(TCTL, tctl);
3384 /* flush both disables and wait for them to finish */
3385 e1e_flush();
3386 msleep(10);
3387
3388 napi_disable(&adapter->napi);
3389 e1000_irq_disable(adapter);
3390
3391 del_timer_sync(&adapter->watchdog_timer);
3392 del_timer_sync(&adapter->phy_info_timer);
3393
3394 netif_carrier_off(netdev);
3395
3396 spin_lock(&adapter->stats64_lock);
3397 e1000e_update_stats(adapter);
3398 spin_unlock(&adapter->stats64_lock);
3399
3400 adapter->link_speed = 0;
3401 adapter->link_duplex = 0;
3402
3403 if (!pci_channel_offline(adapter->pdev))
3404 e1000e_reset(adapter);
3405
3406 e1000e_flush_descriptors(adapter);
3407
3408 e1000_clean_tx_ring(adapter);
3409 e1000_clean_rx_ring(adapter);
3410
3411 /*
3412 * TODO: for power management, we could drop the link and
3413 * pci_disable_device here.
3414 */
3415 }
3416
3417 void e1000e_reinit_locked(struct e1000_adapter *adapter)
3418 {
3419 might_sleep();
3420 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3421 msleep(1);
3422 e1000e_down(adapter);
3423 e1000e_up(adapter);
3424 clear_bit(__E1000_RESETTING, &adapter->state);
3425 }
3426
3427 /**
3428 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3429 * @adapter: board private structure to initialize
3430 *
3431 * e1000_sw_init initializes the Adapter private data structure.
3432 * Fields are initialized based on PCI device information and
3433 * OS network device settings (MTU size).
3434 **/
3435 static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3436 {
3437 struct net_device *netdev = adapter->netdev;
3438
3439 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3440 adapter->rx_ps_bsize0 = 128;
3441 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3442 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3443
3444 spin_lock_init(&adapter->stats64_lock);
3445
3446 e1000e_set_interrupt_capability(adapter);
3447
3448 if (e1000_alloc_queues(adapter))
3449 return -ENOMEM;
3450
3451 /* Explicitly disable IRQ since the NIC can be in any state. */
3452 e1000_irq_disable(adapter);
3453
3454 set_bit(__E1000_DOWN, &adapter->state);
3455 return 0;
3456 }
3457
3458 /**
3459 * e1000_intr_msi_test - Interrupt Handler
3460 * @irq: interrupt number
3461 * @data: pointer to a network interface device structure
3462 **/
3463 static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3464 {
3465 struct net_device *netdev = data;
3466 struct e1000_adapter *adapter = netdev_priv(netdev);
3467 struct e1000_hw *hw = &adapter->hw;
3468 u32 icr = er32(ICR);
3469
3470 e_dbg("icr is %08X\n", icr);
3471 if (icr & E1000_ICR_RXSEQ) {
3472 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3473 wmb();
3474 }
3475
3476 return IRQ_HANDLED;
3477 }
3478
3479 /**
3480 * e1000_test_msi_interrupt - Returns 0 for successful test
3481 * @adapter: board private struct
3482 *
3483 * code flow taken from tg3.c
3484 **/
3485 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3486 {
3487 struct net_device *netdev = adapter->netdev;
3488 struct e1000_hw *hw = &adapter->hw;
3489 int err;
3490
3491 /* poll_enable hasn't been called yet, so don't need disable */
3492 /* clear any pending events */
3493 er32(ICR);
3494
3495 /* free the real vector and request a test handler */
3496 e1000_free_irq(adapter);
3497 e1000e_reset_interrupt_capability(adapter);
3498
3499 /* Assume that the test fails, if it succeeds then the test
3500 * MSI irq handler will unset this flag */
3501 adapter->flags |= FLAG_MSI_TEST_FAILED;
3502
3503 err = pci_enable_msi(adapter->pdev);
3504 if (err)
3505 goto msi_test_failed;
3506
3507 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
3508 netdev->name, netdev);
3509 if (err) {
3510 pci_disable_msi(adapter->pdev);
3511 goto msi_test_failed;
3512 }
3513
3514 wmb();
3515
3516 e1000_irq_enable(adapter);
3517
3518 /* fire an unusual interrupt on the test handler */
3519 ew32(ICS, E1000_ICS_RXSEQ);
3520 e1e_flush();
3521 msleep(50);
3522
3523 e1000_irq_disable(adapter);
3524
3525 rmb();
3526
3527 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
3528 adapter->int_mode = E1000E_INT_MODE_LEGACY;
3529 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3530 } else
3531 e_dbg("MSI interrupt test succeeded!\n");
3532
3533 free_irq(adapter->pdev->irq, netdev);
3534 pci_disable_msi(adapter->pdev);
3535
3536 msi_test_failed:
3537 e1000e_set_interrupt_capability(adapter);
3538 return e1000_request_irq(adapter);
3539 }
3540
3541 /**
3542 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3543 * @adapter: board private struct
3544 *
3545 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3546 **/
3547 static int e1000_test_msi(struct e1000_adapter *adapter)
3548 {
3549 int err;
3550 u16 pci_cmd;
3551
3552 if (!(adapter->flags & FLAG_MSI_ENABLED))
3553 return 0;
3554
3555 /* disable SERR in case the MSI write causes a master abort */
3556 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3557 if (pci_cmd & PCI_COMMAND_SERR)
3558 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3559 pci_cmd & ~PCI_COMMAND_SERR);
3560
3561 err = e1000_test_msi_interrupt(adapter);
3562
3563 /* re-enable SERR */
3564 if (pci_cmd & PCI_COMMAND_SERR) {
3565 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3566 pci_cmd |= PCI_COMMAND_SERR;
3567 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3568 }
3569
3570 return err;
3571 }
3572
3573 /**
3574 * e1000_open - Called when a network interface is made active
3575 * @netdev: network interface device structure
3576 *
3577 * Returns 0 on success, negative value on failure
3578 *
3579 * The open entry point is called when a network interface is made
3580 * active by the system (IFF_UP). At this point all resources needed
3581 * for transmit and receive operations are allocated, the interrupt
3582 * handler is registered with the OS, the watchdog timer is started,
3583 * and the stack is notified that the interface is ready.
3584 **/
3585 static int e1000_open(struct net_device *netdev)
3586 {
3587 struct e1000_adapter *adapter = netdev_priv(netdev);
3588 struct e1000_hw *hw = &adapter->hw;
3589 struct pci_dev *pdev = adapter->pdev;
3590 int err;
3591
3592 /* disallow open during test */
3593 if (test_bit(__E1000_TESTING, &adapter->state))
3594 return -EBUSY;
3595
3596 pm_runtime_get_sync(&pdev->dev);
3597
3598 netif_carrier_off(netdev);
3599
3600 /* allocate transmit descriptors */
3601 err = e1000e_setup_tx_resources(adapter);
3602 if (err)
3603 goto err_setup_tx;
3604
3605 /* allocate receive descriptors */
3606 err = e1000e_setup_rx_resources(adapter);
3607 if (err)
3608 goto err_setup_rx;
3609
3610 /*
3611 * If AMT is enabled, let the firmware know that the network
3612 * interface is now open and reset the part to a known state.
3613 */
3614 if (adapter->flags & FLAG_HAS_AMT) {
3615 e1000e_get_hw_control(adapter);
3616 e1000e_reset(adapter);
3617 }
3618
3619 e1000e_power_up_phy(adapter);
3620
3621 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3622 if ((adapter->hw.mng_cookie.status &
3623 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3624 e1000_update_mng_vlan(adapter);
3625
3626 /* DMA latency requirement to workaround early-receive/jumbo issue */
3627 if ((adapter->flags & FLAG_HAS_ERT) ||
3628 (adapter->hw.mac.type == e1000_pch2lan))
3629 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3630 PM_QOS_CPU_DMA_LATENCY,
3631 PM_QOS_DEFAULT_VALUE);
3632
3633 /*
3634 * before we allocate an interrupt, we must be ready to handle it.
3635 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3636 * as soon as we call pci_request_irq, so we have to setup our
3637 * clean_rx handler before we do so.
3638 */
3639 e1000_configure(adapter);
3640
3641 err = e1000_request_irq(adapter);
3642 if (err)
3643 goto err_req_irq;
3644
3645 /*
3646 * Work around PCIe errata with MSI interrupts causing some chipsets to
3647 * ignore e1000e MSI messages, which means we need to test our MSI
3648 * interrupt now
3649 */
3650 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
3651 err = e1000_test_msi(adapter);
3652 if (err) {
3653 e_err("Interrupt allocation failed\n");
3654 goto err_req_irq;
3655 }
3656 }
3657
3658 /* From here on the code is the same as e1000e_up() */
3659 clear_bit(__E1000_DOWN, &adapter->state);
3660
3661 napi_enable(&adapter->napi);
3662
3663 e1000_irq_enable(adapter);
3664
3665 netif_start_queue(netdev);
3666
3667 adapter->idle_check = true;
3668 pm_runtime_put(&pdev->dev);
3669
3670 /* fire a link status change interrupt to start the watchdog */
3671 if (adapter->msix_entries)
3672 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3673 else
3674 ew32(ICS, E1000_ICS_LSC);
3675
3676 return 0;
3677
3678 err_req_irq:
3679 e1000e_release_hw_control(adapter);
3680 e1000_power_down_phy(adapter);
3681 e1000e_free_rx_resources(adapter);
3682 err_setup_rx:
3683 e1000e_free_tx_resources(adapter);
3684 err_setup_tx:
3685 e1000e_reset(adapter);
3686 pm_runtime_put_sync(&pdev->dev);
3687
3688 return err;
3689 }
3690
3691 /**
3692 * e1000_close - Disables a network interface
3693 * @netdev: network interface device structure
3694 *
3695 * Returns 0, this is not allowed to fail
3696 *
3697 * The close entry point is called when an interface is de-activated
3698 * by the OS. The hardware is still under the drivers control, but
3699 * needs to be disabled. A global MAC reset is issued to stop the
3700 * hardware, and all transmit and receive resources are freed.
3701 **/
3702 static int e1000_close(struct net_device *netdev)
3703 {
3704 struct e1000_adapter *adapter = netdev_priv(netdev);
3705 struct pci_dev *pdev = adapter->pdev;
3706
3707 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3708
3709 pm_runtime_get_sync(&pdev->dev);
3710
3711 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3712 e1000e_down(adapter);
3713 e1000_free_irq(adapter);
3714 }
3715 e1000_power_down_phy(adapter);
3716
3717 e1000e_free_tx_resources(adapter);
3718 e1000e_free_rx_resources(adapter);
3719
3720 /*
3721 * kill manageability vlan ID if supported, but not if a vlan with
3722 * the same ID is registered on the host OS (let 8021q kill it)
3723 */
3724 if ((adapter->hw.mng_cookie.status &
3725 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3726 !(adapter->vlgrp &&
3727 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3728 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3729
3730 /*
3731 * If AMT is enabled, let the firmware know that the network
3732 * interface is now closed
3733 */
3734 if ((adapter->flags & FLAG_HAS_AMT) &&
3735 !test_bit(__E1000_TESTING, &adapter->state))
3736 e1000e_release_hw_control(adapter);
3737
3738 if ((adapter->flags & FLAG_HAS_ERT) ||
3739 (adapter->hw.mac.type == e1000_pch2lan))
3740 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
3741
3742 pm_runtime_put_sync(&pdev->dev);
3743
3744 return 0;
3745 }
3746 /**
3747 * e1000_set_mac - Change the Ethernet Address of the NIC
3748 * @netdev: network interface device structure
3749 * @p: pointer to an address structure
3750 *
3751 * Returns 0 on success, negative on failure
3752 **/
3753 static int e1000_set_mac(struct net_device *netdev, void *p)
3754 {
3755 struct e1000_adapter *adapter = netdev_priv(netdev);
3756 struct sockaddr *addr = p;
3757
3758 if (!is_valid_ether_addr(addr->sa_data))
3759 return -EADDRNOTAVAIL;
3760
3761 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3762 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3763
3764 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3765
3766 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3767 /* activate the work around */
3768 e1000e_set_laa_state_82571(&adapter->hw, 1);
3769
3770 /*
3771 * Hold a copy of the LAA in RAR[14] This is done so that
3772 * between the time RAR[0] gets clobbered and the time it
3773 * gets fixed (in e1000_watchdog), the actual LAA is in one
3774 * of the RARs and no incoming packets directed to this port
3775 * are dropped. Eventually the LAA will be in RAR[0] and
3776 * RAR[14]
3777 */
3778 e1000e_rar_set(&adapter->hw,
3779 adapter->hw.mac.addr,
3780 adapter->hw.mac.rar_entry_count - 1);
3781 }
3782
3783 return 0;
3784 }
3785
3786 /**
3787 * e1000e_update_phy_task - work thread to update phy
3788 * @work: pointer to our work struct
3789 *
3790 * this worker thread exists because we must acquire a
3791 * semaphore to read the phy, which we could msleep while
3792 * waiting for it, and we can't msleep in a timer.
3793 **/
3794 static void e1000e_update_phy_task(struct work_struct *work)
3795 {
3796 struct e1000_adapter *adapter = container_of(work,
3797 struct e1000_adapter, update_phy_task);
3798
3799 if (test_bit(__E1000_DOWN, &adapter->state))
3800 return;
3801
3802 e1000_get_phy_info(&adapter->hw);
3803 }
3804
3805 /*
3806 * Need to wait a few seconds after link up to get diagnostic information from
3807 * the phy
3808 */
3809 static void e1000_update_phy_info(unsigned long data)
3810 {
3811 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3812
3813 if (test_bit(__E1000_DOWN, &adapter->state))
3814 return;
3815
3816 schedule_work(&adapter->update_phy_task);
3817 }
3818
3819 /**
3820 * e1000e_update_phy_stats - Update the PHY statistics counters
3821 * @adapter: board private structure
3822 **/
3823 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3824 {
3825 struct e1000_hw *hw = &adapter->hw;
3826 s32 ret_val;
3827 u16 phy_data;
3828
3829 ret_val = hw->phy.ops.acquire(hw);
3830 if (ret_val)
3831 return;
3832
3833 hw->phy.addr = 1;
3834
3835 #define HV_PHY_STATS_PAGE 778
3836 /*
3837 * A page set is expensive so check if already on desired page.
3838 * If not, set to the page with the PHY status registers.
3839 */
3840 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3841 &phy_data);
3842 if (ret_val)
3843 goto release;
3844 if (phy_data != (HV_PHY_STATS_PAGE << IGP_PAGE_SHIFT)) {
3845 ret_val = e1000e_write_phy_reg_mdic(hw,
3846 IGP01E1000_PHY_PAGE_SELECT,
3847 (HV_PHY_STATS_PAGE <<
3848 IGP_PAGE_SHIFT));
3849 if (ret_val)
3850 goto release;
3851 }
3852
3853 /* Read/clear the upper 16-bit registers and read/accumulate lower */
3854
3855 /* Single Collision Count */
3856 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3857 &phy_data);
3858 ret_val = e1000e_read_phy_reg_mdic(hw,
3859 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3860 &phy_data);
3861 if (!ret_val)
3862 adapter->stats.scc += phy_data;
3863
3864 /* Excessive Collision Count */
3865 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3866 &phy_data);
3867 ret_val = e1000e_read_phy_reg_mdic(hw,
3868 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3869 &phy_data);
3870 if (!ret_val)
3871 adapter->stats.ecol += phy_data;
3872
3873 /* Multiple Collision Count */
3874 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3875 &phy_data);
3876 ret_val = e1000e_read_phy_reg_mdic(hw,
3877 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3878 &phy_data);
3879 if (!ret_val)
3880 adapter->stats.mcc += phy_data;
3881
3882 /* Late Collision Count */
3883 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3884 &phy_data);
3885 ret_val = e1000e_read_phy_reg_mdic(hw,
3886 HV_LATECOL_LOWER &
3887 MAX_PHY_REG_ADDRESS,
3888 &phy_data);
3889 if (!ret_val)
3890 adapter->stats.latecol += phy_data;
3891
3892 /* Collision Count - also used for adaptive IFS */
3893 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3894 &phy_data);
3895 ret_val = e1000e_read_phy_reg_mdic(hw,
3896 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
3897 &phy_data);
3898 if (!ret_val)
3899 hw->mac.collision_delta = phy_data;
3900
3901 /* Defer Count */
3902 e1000e_read_phy_reg_mdic(hw, HV_DC_UPPER & MAX_PHY_REG_ADDRESS,
3903 &phy_data);
3904 ret_val = e1000e_read_phy_reg_mdic(hw,
3905 HV_DC_LOWER & MAX_PHY_REG_ADDRESS,
3906 &phy_data);
3907 if (!ret_val)
3908 adapter->stats.dc += phy_data;
3909
3910 /* Transmit with no CRS */
3911 e1000e_read_phy_reg_mdic(hw, HV_TNCRS_UPPER & MAX_PHY_REG_ADDRESS,
3912 &phy_data);
3913 ret_val = e1000e_read_phy_reg_mdic(hw,
3914 HV_TNCRS_LOWER & MAX_PHY_REG_ADDRESS,
3915 &phy_data);
3916 if (!ret_val)
3917 adapter->stats.tncrs += phy_data;
3918
3919 release:
3920 hw->phy.ops.release(hw);
3921 }
3922
3923 /**
3924 * e1000e_update_stats - Update the board statistics counters
3925 * @adapter: board private structure
3926 **/
3927 static void e1000e_update_stats(struct e1000_adapter *adapter)
3928 {
3929 struct net_device *netdev = adapter->netdev;
3930 struct e1000_hw *hw = &adapter->hw;
3931 struct pci_dev *pdev = adapter->pdev;
3932
3933 /*
3934 * Prevent stats update while adapter is being reset, or if the pci
3935 * connection is down.
3936 */
3937 if (adapter->link_speed == 0)
3938 return;
3939 if (pci_channel_offline(pdev))
3940 return;
3941
3942 adapter->stats.crcerrs += er32(CRCERRS);
3943 adapter->stats.gprc += er32(GPRC);
3944 adapter->stats.gorc += er32(GORCL);
3945 er32(GORCH); /* Clear gorc */
3946 adapter->stats.bprc += er32(BPRC);
3947 adapter->stats.mprc += er32(MPRC);
3948 adapter->stats.roc += er32(ROC);
3949
3950 adapter->stats.mpc += er32(MPC);
3951
3952 /* Half-duplex statistics */
3953 if (adapter->link_duplex == HALF_DUPLEX) {
3954 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
3955 e1000e_update_phy_stats(adapter);
3956 } else {
3957 adapter->stats.scc += er32(SCC);
3958 adapter->stats.ecol += er32(ECOL);
3959 adapter->stats.mcc += er32(MCC);
3960 adapter->stats.latecol += er32(LATECOL);
3961 adapter->stats.dc += er32(DC);
3962
3963 hw->mac.collision_delta = er32(COLC);
3964
3965 if ((hw->mac.type != e1000_82574) &&
3966 (hw->mac.type != e1000_82583))
3967 adapter->stats.tncrs += er32(TNCRS);
3968 }
3969 adapter->stats.colc += hw->mac.collision_delta;
3970 }
3971
3972 adapter->stats.xonrxc += er32(XONRXC);
3973 adapter->stats.xontxc += er32(XONTXC);
3974 adapter->stats.xoffrxc += er32(XOFFRXC);
3975 adapter->stats.xofftxc += er32(XOFFTXC);
3976 adapter->stats.gptc += er32(GPTC);
3977 adapter->stats.gotc += er32(GOTCL);
3978 er32(GOTCH); /* Clear gotc */
3979 adapter->stats.rnbc += er32(RNBC);
3980 adapter->stats.ruc += er32(RUC);
3981
3982 adapter->stats.mptc += er32(MPTC);
3983 adapter->stats.bptc += er32(BPTC);
3984
3985 /* used for adaptive IFS */
3986
3987 hw->mac.tx_packet_delta = er32(TPT);
3988 adapter->stats.tpt += hw->mac.tx_packet_delta;
3989
3990 adapter->stats.algnerrc += er32(ALGNERRC);
3991 adapter->stats.rxerrc += er32(RXERRC);
3992 adapter->stats.cexterr += er32(CEXTERR);
3993 adapter->stats.tsctc += er32(TSCTC);
3994 adapter->stats.tsctfc += er32(TSCTFC);
3995
3996 /* Fill out the OS statistics structure */
3997 netdev->stats.multicast = adapter->stats.mprc;
3998 netdev->stats.collisions = adapter->stats.colc;
3999
4000 /* Rx Errors */
4001
4002 /*
4003 * RLEC on some newer hardware can be incorrect so build
4004 * our own version based on RUC and ROC
4005 */
4006 netdev->stats.rx_errors = adapter->stats.rxerrc +
4007 adapter->stats.crcerrs + adapter->stats.algnerrc +
4008 adapter->stats.ruc + adapter->stats.roc +
4009 adapter->stats.cexterr;
4010 netdev->stats.rx_length_errors = adapter->stats.ruc +
4011 adapter->stats.roc;
4012 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4013 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4014 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4015
4016 /* Tx Errors */
4017 netdev->stats.tx_errors = adapter->stats.ecol +
4018 adapter->stats.latecol;
4019 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4020 netdev->stats.tx_window_errors = adapter->stats.latecol;
4021 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4022
4023 /* Tx Dropped needs to be maintained elsewhere */
4024
4025 /* Management Stats */
4026 adapter->stats.mgptc += er32(MGTPTC);
4027 adapter->stats.mgprc += er32(MGTPRC);
4028 adapter->stats.mgpdc += er32(MGTPDC);
4029 }
4030
4031 /**
4032 * e1000_phy_read_status - Update the PHY register status snapshot
4033 * @adapter: board private structure
4034 **/
4035 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4036 {
4037 struct e1000_hw *hw = &adapter->hw;
4038 struct e1000_phy_regs *phy = &adapter->phy_regs;
4039
4040 if ((er32(STATUS) & E1000_STATUS_LU) &&
4041 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4042 int ret_val;
4043
4044 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4045 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4046 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4047 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4048 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4049 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4050 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4051 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4052 if (ret_val)
4053 e_warn("Error reading PHY register\n");
4054 } else {
4055 /*
4056 * Do not read PHY registers if link is not up
4057 * Set values to typical power-on defaults
4058 */
4059 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4060 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4061 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4062 BMSR_ERCAP);
4063 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4064 ADVERTISE_ALL | ADVERTISE_CSMA);
4065 phy->lpa = 0;
4066 phy->expansion = EXPANSION_ENABLENPAGE;
4067 phy->ctrl1000 = ADVERTISE_1000FULL;
4068 phy->stat1000 = 0;
4069 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4070 }
4071 }
4072
4073 static void e1000_print_link_info(struct e1000_adapter *adapter)
4074 {
4075 struct e1000_hw *hw = &adapter->hw;
4076 u32 ctrl = er32(CTRL);
4077
4078 /* Link status message must follow this format for user tools */
4079 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4080 "Flow Control: %s\n",
4081 adapter->netdev->name,
4082 adapter->link_speed,
4083 (adapter->link_duplex == FULL_DUPLEX) ?
4084 "Full Duplex" : "Half Duplex",
4085 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
4086 "Rx/Tx" :
4087 ((ctrl & E1000_CTRL_RFCE) ? "Rx" :
4088 ((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None")));
4089 }
4090
4091 static bool e1000e_has_link(struct e1000_adapter *adapter)
4092 {
4093 struct e1000_hw *hw = &adapter->hw;
4094 bool link_active = 0;
4095 s32 ret_val = 0;
4096
4097 /*
4098 * get_link_status is set on LSC (link status) interrupt or
4099 * Rx sequence error interrupt. get_link_status will stay
4100 * false until the check_for_link establishes link
4101 * for copper adapters ONLY
4102 */
4103 switch (hw->phy.media_type) {
4104 case e1000_media_type_copper:
4105 if (hw->mac.get_link_status) {
4106 ret_val = hw->mac.ops.check_for_link(hw);
4107 link_active = !hw->mac.get_link_status;
4108 } else {
4109 link_active = 1;
4110 }
4111 break;
4112 case e1000_media_type_fiber:
4113 ret_val = hw->mac.ops.check_for_link(hw);
4114 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4115 break;
4116 case e1000_media_type_internal_serdes:
4117 ret_val = hw->mac.ops.check_for_link(hw);
4118 link_active = adapter->hw.mac.serdes_has_link;
4119 break;
4120 default:
4121 case e1000_media_type_unknown:
4122 break;
4123 }
4124
4125 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4126 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4127 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4128 e_info("Gigabit has been disabled, downgrading speed\n");
4129 }
4130
4131 return link_active;
4132 }
4133
4134 static void e1000e_enable_receives(struct e1000_adapter *adapter)
4135 {
4136 /* make sure the receive unit is started */
4137 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4138 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4139 struct e1000_hw *hw = &adapter->hw;
4140 u32 rctl = er32(RCTL);
4141 ew32(RCTL, rctl | E1000_RCTL_EN);
4142 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4143 }
4144 }
4145
4146 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4147 {
4148 struct e1000_hw *hw = &adapter->hw;
4149
4150 /*
4151 * With 82574 controllers, PHY needs to be checked periodically
4152 * for hung state and reset, if two calls return true
4153 */
4154 if (e1000_check_phy_82574(hw))
4155 adapter->phy_hang_count++;
4156 else
4157 adapter->phy_hang_count = 0;
4158
4159 if (adapter->phy_hang_count > 1) {
4160 adapter->phy_hang_count = 0;
4161 schedule_work(&adapter->reset_task);
4162 }
4163 }
4164
4165 /**
4166 * e1000_watchdog - Timer Call-back
4167 * @data: pointer to adapter cast into an unsigned long
4168 **/
4169 static void e1000_watchdog(unsigned long data)
4170 {
4171 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4172
4173 /* Do the rest outside of interrupt context */
4174 schedule_work(&adapter->watchdog_task);
4175
4176 /* TODO: make this use queue_delayed_work() */
4177 }
4178
4179 static void e1000_watchdog_task(struct work_struct *work)
4180 {
4181 struct e1000_adapter *adapter = container_of(work,
4182 struct e1000_adapter, watchdog_task);
4183 struct net_device *netdev = adapter->netdev;
4184 struct e1000_mac_info *mac = &adapter->hw.mac;
4185 struct e1000_phy_info *phy = &adapter->hw.phy;
4186 struct e1000_ring *tx_ring = adapter->tx_ring;
4187 struct e1000_hw *hw = &adapter->hw;
4188 u32 link, tctl;
4189
4190 if (test_bit(__E1000_DOWN, &adapter->state))
4191 return;
4192
4193 link = e1000e_has_link(adapter);
4194 if ((netif_carrier_ok(netdev)) && link) {
4195 /* Cancel scheduled suspend requests. */
4196 pm_runtime_resume(netdev->dev.parent);
4197
4198 e1000e_enable_receives(adapter);
4199 goto link_up;
4200 }
4201
4202 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4203 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4204 e1000_update_mng_vlan(adapter);
4205
4206 if (link) {
4207 if (!netif_carrier_ok(netdev)) {
4208 bool txb2b = 1;
4209
4210 /* Cancel scheduled suspend requests. */
4211 pm_runtime_resume(netdev->dev.parent);
4212
4213 /* update snapshot of PHY registers on LSC */
4214 e1000_phy_read_status(adapter);
4215 mac->ops.get_link_up_info(&adapter->hw,
4216 &adapter->link_speed,
4217 &adapter->link_duplex);
4218 e1000_print_link_info(adapter);
4219 /*
4220 * On supported PHYs, check for duplex mismatch only
4221 * if link has autonegotiated at 10/100 half
4222 */
4223 if ((hw->phy.type == e1000_phy_igp_3 ||
4224 hw->phy.type == e1000_phy_bm) &&
4225 (hw->mac.autoneg == true) &&
4226 (adapter->link_speed == SPEED_10 ||
4227 adapter->link_speed == SPEED_100) &&
4228 (adapter->link_duplex == HALF_DUPLEX)) {
4229 u16 autoneg_exp;
4230
4231 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4232
4233 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4234 e_info("Autonegotiated half duplex but"
4235 " link partner cannot autoneg. "
4236 " Try forcing full duplex if "
4237 "link gets many collisions.\n");
4238 }
4239
4240 /* adjust timeout factor according to speed/duplex */
4241 adapter->tx_timeout_factor = 1;
4242 switch (adapter->link_speed) {
4243 case SPEED_10:
4244 txb2b = 0;
4245 adapter->tx_timeout_factor = 16;
4246 break;
4247 case SPEED_100:
4248 txb2b = 0;
4249 adapter->tx_timeout_factor = 10;
4250 break;
4251 }
4252
4253 /*
4254 * workaround: re-program speed mode bit after
4255 * link-up event
4256 */
4257 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4258 !txb2b) {
4259 u32 tarc0;
4260 tarc0 = er32(TARC(0));
4261 tarc0 &= ~SPEED_MODE_BIT;
4262 ew32(TARC(0), tarc0);
4263 }
4264
4265 /*
4266 * disable TSO for pcie and 10/100 speeds, to avoid
4267 * some hardware issues
4268 */
4269 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4270 switch (adapter->link_speed) {
4271 case SPEED_10:
4272 case SPEED_100:
4273 e_info("10/100 speed: disabling TSO\n");
4274 netdev->features &= ~NETIF_F_TSO;
4275 netdev->features &= ~NETIF_F_TSO6;
4276 break;
4277 case SPEED_1000:
4278 netdev->features |= NETIF_F_TSO;
4279 netdev->features |= NETIF_F_TSO6;
4280 break;
4281 default:
4282 /* oops */
4283 break;
4284 }
4285 }
4286
4287 /*
4288 * enable transmits in the hardware, need to do this
4289 * after setting TARC(0)
4290 */
4291 tctl = er32(TCTL);
4292 tctl |= E1000_TCTL_EN;
4293 ew32(TCTL, tctl);
4294
4295 /*
4296 * Perform any post-link-up configuration before
4297 * reporting link up.
4298 */
4299 if (phy->ops.cfg_on_link_up)
4300 phy->ops.cfg_on_link_up(hw);
4301
4302 netif_carrier_on(netdev);
4303
4304 if (!test_bit(__E1000_DOWN, &adapter->state))
4305 mod_timer(&adapter->phy_info_timer,
4306 round_jiffies(jiffies + 2 * HZ));
4307 }
4308 } else {
4309 if (netif_carrier_ok(netdev)) {
4310 adapter->link_speed = 0;
4311 adapter->link_duplex = 0;
4312 /* Link status message must follow this format */
4313 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4314 adapter->netdev->name);
4315 netif_carrier_off(netdev);
4316 if (!test_bit(__E1000_DOWN, &adapter->state))
4317 mod_timer(&adapter->phy_info_timer,
4318 round_jiffies(jiffies + 2 * HZ));
4319
4320 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4321 schedule_work(&adapter->reset_task);
4322 else
4323 pm_schedule_suspend(netdev->dev.parent,
4324 LINK_TIMEOUT);
4325 }
4326 }
4327
4328 link_up:
4329 spin_lock(&adapter->stats64_lock);
4330 e1000e_update_stats(adapter);
4331 spin_unlock(&adapter->stats64_lock);
4332
4333 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4334 adapter->tpt_old = adapter->stats.tpt;
4335 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4336 adapter->colc_old = adapter->stats.colc;
4337
4338 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4339 adapter->gorc_old = adapter->stats.gorc;
4340 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4341 adapter->gotc_old = adapter->stats.gotc;
4342
4343 e1000e_update_adaptive(&adapter->hw);
4344
4345 if (!netif_carrier_ok(netdev) &&
4346 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4347 /*
4348 * We've lost link, so the controller stops DMA,
4349 * but we've got queued Tx work that's never going
4350 * to get done, so reset controller to flush Tx.
4351 * (Do the reset outside of interrupt context).
4352 */
4353 schedule_work(&adapter->reset_task);
4354 /* return immediately since reset is imminent */
4355 return;
4356 }
4357
4358 /* Simple mode for Interrupt Throttle Rate (ITR) */
4359 if (adapter->itr_setting == 4) {
4360 /*
4361 * Symmetric Tx/Rx gets a reduced ITR=2000;
4362 * Total asymmetrical Tx or Rx gets ITR=8000;
4363 * everyone else is between 2000-8000.
4364 */
4365 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4366 u32 dif = (adapter->gotc > adapter->gorc ?
4367 adapter->gotc - adapter->gorc :
4368 adapter->gorc - adapter->gotc) / 10000;
4369 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4370
4371 ew32(ITR, 1000000000 / (itr * 256));
4372 }
4373
4374 /* Cause software interrupt to ensure Rx ring is cleaned */
4375 if (adapter->msix_entries)
4376 ew32(ICS, adapter->rx_ring->ims_val);
4377 else
4378 ew32(ICS, E1000_ICS_RXDMT0);
4379
4380 /* flush pending descriptors to memory before detecting Tx hang */
4381 e1000e_flush_descriptors(adapter);
4382
4383 /* Force detection of hung controller every watchdog period */
4384 adapter->detect_tx_hung = 1;
4385
4386 /*
4387 * With 82571 controllers, LAA may be overwritten due to controller
4388 * reset from the other port. Set the appropriate LAA in RAR[0]
4389 */
4390 if (e1000e_get_laa_state_82571(hw))
4391 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4392
4393 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4394 e1000e_check_82574_phy_workaround(adapter);
4395
4396 /* Reset the timer */
4397 if (!test_bit(__E1000_DOWN, &adapter->state))
4398 mod_timer(&adapter->watchdog_timer,
4399 round_jiffies(jiffies + 2 * HZ));
4400 }
4401
4402 #define E1000_TX_FLAGS_CSUM 0x00000001
4403 #define E1000_TX_FLAGS_VLAN 0x00000002
4404 #define E1000_TX_FLAGS_TSO 0x00000004
4405 #define E1000_TX_FLAGS_IPV4 0x00000008
4406 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4407 #define E1000_TX_FLAGS_VLAN_SHIFT 16
4408
4409 static int e1000_tso(struct e1000_adapter *adapter,
4410 struct sk_buff *skb)
4411 {
4412 struct e1000_ring *tx_ring = adapter->tx_ring;
4413 struct e1000_context_desc *context_desc;
4414 struct e1000_buffer *buffer_info;
4415 unsigned int i;
4416 u32 cmd_length = 0;
4417 u16 ipcse = 0, tucse, mss;
4418 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4419
4420 if (!skb_is_gso(skb))
4421 return 0;
4422
4423 if (skb_header_cloned(skb)) {
4424 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4425
4426 if (err)
4427 return err;
4428 }
4429
4430 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4431 mss = skb_shinfo(skb)->gso_size;
4432 if (skb->protocol == htons(ETH_P_IP)) {
4433 struct iphdr *iph = ip_hdr(skb);
4434 iph->tot_len = 0;
4435 iph->check = 0;
4436 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4437 0, IPPROTO_TCP, 0);
4438 cmd_length = E1000_TXD_CMD_IP;
4439 ipcse = skb_transport_offset(skb) - 1;
4440 } else if (skb_is_gso_v6(skb)) {
4441 ipv6_hdr(skb)->payload_len = 0;
4442 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4443 &ipv6_hdr(skb)->daddr,
4444 0, IPPROTO_TCP, 0);
4445 ipcse = 0;
4446 }
4447 ipcss = skb_network_offset(skb);
4448 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4449 tucss = skb_transport_offset(skb);
4450 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4451 tucse = 0;
4452
4453 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4454 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4455
4456 i = tx_ring->next_to_use;
4457 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4458 buffer_info = &tx_ring->buffer_info[i];
4459
4460 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4461 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4462 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4463 context_desc->upper_setup.tcp_fields.tucss = tucss;
4464 context_desc->upper_setup.tcp_fields.tucso = tucso;
4465 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4466 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4467 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4468 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4469
4470 buffer_info->time_stamp = jiffies;
4471 buffer_info->next_to_watch = i;
4472
4473 i++;
4474 if (i == tx_ring->count)
4475 i = 0;
4476 tx_ring->next_to_use = i;
4477
4478 return 1;
4479 }
4480
4481 static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4482 {
4483 struct e1000_ring *tx_ring = adapter->tx_ring;
4484 struct e1000_context_desc *context_desc;
4485 struct e1000_buffer *buffer_info;
4486 unsigned int i;
4487 u8 css;
4488 u32 cmd_len = E1000_TXD_CMD_DEXT;
4489 __be16 protocol;
4490
4491 if (skb->ip_summed != CHECKSUM_PARTIAL)
4492 return 0;
4493
4494 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4495 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4496 else
4497 protocol = skb->protocol;
4498
4499 switch (protocol) {
4500 case cpu_to_be16(ETH_P_IP):
4501 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4502 cmd_len |= E1000_TXD_CMD_TCP;
4503 break;
4504 case cpu_to_be16(ETH_P_IPV6):
4505 /* XXX not handling all IPV6 headers */
4506 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4507 cmd_len |= E1000_TXD_CMD_TCP;
4508 break;
4509 default:
4510 if (unlikely(net_ratelimit()))
4511 e_warn("checksum_partial proto=%x!\n",
4512 be16_to_cpu(protocol));
4513 break;
4514 }
4515
4516 css = skb_checksum_start_offset(skb);
4517
4518 i = tx_ring->next_to_use;
4519 buffer_info = &tx_ring->buffer_info[i];
4520 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4521
4522 context_desc->lower_setup.ip_config = 0;
4523 context_desc->upper_setup.tcp_fields.tucss = css;
4524 context_desc->upper_setup.tcp_fields.tucso =
4525 css + skb->csum_offset;
4526 context_desc->upper_setup.tcp_fields.tucse = 0;
4527 context_desc->tcp_seg_setup.data = 0;
4528 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4529
4530 buffer_info->time_stamp = jiffies;
4531 buffer_info->next_to_watch = i;
4532
4533 i++;
4534 if (i == tx_ring->count)
4535 i = 0;
4536 tx_ring->next_to_use = i;
4537
4538 return 1;
4539 }
4540
4541 #define E1000_MAX_PER_TXD 8192
4542 #define E1000_MAX_TXD_PWR 12
4543
4544 static int e1000_tx_map(struct e1000_adapter *adapter,
4545 struct sk_buff *skb, unsigned int first,
4546 unsigned int max_per_txd, unsigned int nr_frags,
4547 unsigned int mss)
4548 {
4549 struct e1000_ring *tx_ring = adapter->tx_ring;
4550 struct pci_dev *pdev = adapter->pdev;
4551 struct e1000_buffer *buffer_info;
4552 unsigned int len = skb_headlen(skb);
4553 unsigned int offset = 0, size, count = 0, i;
4554 unsigned int f, bytecount, segs;
4555
4556 i = tx_ring->next_to_use;
4557
4558 while (len) {
4559 buffer_info = &tx_ring->buffer_info[i];
4560 size = min(len, max_per_txd);
4561
4562 buffer_info->length = size;
4563 buffer_info->time_stamp = jiffies;
4564 buffer_info->next_to_watch = i;
4565 buffer_info->dma = dma_map_single(&pdev->dev,
4566 skb->data + offset,
4567 size, DMA_TO_DEVICE);
4568 buffer_info->mapped_as_page = false;
4569 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4570 goto dma_error;
4571
4572 len -= size;
4573 offset += size;
4574 count++;
4575
4576 if (len) {
4577 i++;
4578 if (i == tx_ring->count)
4579 i = 0;
4580 }
4581 }
4582
4583 for (f = 0; f < nr_frags; f++) {
4584 struct skb_frag_struct *frag;
4585
4586 frag = &skb_shinfo(skb)->frags[f];
4587 len = frag->size;
4588 offset = frag->page_offset;
4589
4590 while (len) {
4591 i++;
4592 if (i == tx_ring->count)
4593 i = 0;
4594
4595 buffer_info = &tx_ring->buffer_info[i];
4596 size = min(len, max_per_txd);
4597
4598 buffer_info->length = size;
4599 buffer_info->time_stamp = jiffies;
4600 buffer_info->next_to_watch = i;
4601 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
4602 offset, size,
4603 DMA_TO_DEVICE);
4604 buffer_info->mapped_as_page = true;
4605 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4606 goto dma_error;
4607
4608 len -= size;
4609 offset += size;
4610 count++;
4611 }
4612 }
4613
4614 segs = skb_shinfo(skb)->gso_segs ? : 1;
4615 /* multiply data chunks by size of headers */
4616 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4617
4618 tx_ring->buffer_info[i].skb = skb;
4619 tx_ring->buffer_info[i].segs = segs;
4620 tx_ring->buffer_info[i].bytecount = bytecount;
4621 tx_ring->buffer_info[first].next_to_watch = i;
4622
4623 return count;
4624
4625 dma_error:
4626 dev_err(&pdev->dev, "Tx DMA map failed\n");
4627 buffer_info->dma = 0;
4628 if (count)
4629 count--;
4630
4631 while (count--) {
4632 if (i == 0)
4633 i += tx_ring->count;
4634 i--;
4635 buffer_info = &tx_ring->buffer_info[i];
4636 e1000_put_txbuf(adapter, buffer_info);
4637 }
4638
4639 return 0;
4640 }
4641
4642 static void e1000_tx_queue(struct e1000_adapter *adapter,
4643 int tx_flags, int count)
4644 {
4645 struct e1000_ring *tx_ring = adapter->tx_ring;
4646 struct e1000_tx_desc *tx_desc = NULL;
4647 struct e1000_buffer *buffer_info;
4648 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4649 unsigned int i;
4650
4651 if (tx_flags & E1000_TX_FLAGS_TSO) {
4652 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4653 E1000_TXD_CMD_TSE;
4654 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4655
4656 if (tx_flags & E1000_TX_FLAGS_IPV4)
4657 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4658 }
4659
4660 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4661 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4662 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4663 }
4664
4665 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4666 txd_lower |= E1000_TXD_CMD_VLE;
4667 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4668 }
4669
4670 i = tx_ring->next_to_use;
4671
4672 do {
4673 buffer_info = &tx_ring->buffer_info[i];
4674 tx_desc = E1000_TX_DESC(*tx_ring, i);
4675 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4676 tx_desc->lower.data =
4677 cpu_to_le32(txd_lower | buffer_info->length);
4678 tx_desc->upper.data = cpu_to_le32(txd_upper);
4679
4680 i++;
4681 if (i == tx_ring->count)
4682 i = 0;
4683 } while (--count > 0);
4684
4685 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4686
4687 /*
4688 * Force memory writes to complete before letting h/w
4689 * know there are new descriptors to fetch. (Only
4690 * applicable for weak-ordered memory model archs,
4691 * such as IA-64).
4692 */
4693 wmb();
4694
4695 tx_ring->next_to_use = i;
4696 writel(i, adapter->hw.hw_addr + tx_ring->tail);
4697 /*
4698 * we need this if more than one processor can write to our tail
4699 * at a time, it synchronizes IO on IA64/Altix systems
4700 */
4701 mmiowb();
4702 }
4703
4704 #define MINIMUM_DHCP_PACKET_SIZE 282
4705 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4706 struct sk_buff *skb)
4707 {
4708 struct e1000_hw *hw = &adapter->hw;
4709 u16 length, offset;
4710
4711 if (vlan_tx_tag_present(skb)) {
4712 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4713 (adapter->hw.mng_cookie.status &
4714 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4715 return 0;
4716 }
4717
4718 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4719 return 0;
4720
4721 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4722 return 0;
4723
4724 {
4725 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4726 struct udphdr *udp;
4727
4728 if (ip->protocol != IPPROTO_UDP)
4729 return 0;
4730
4731 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4732 if (ntohs(udp->dest) != 67)
4733 return 0;
4734
4735 offset = (u8 *)udp + 8 - skb->data;
4736 length = skb->len - offset;
4737 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4738 }
4739
4740 return 0;
4741 }
4742
4743 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4744 {
4745 struct e1000_adapter *adapter = netdev_priv(netdev);
4746
4747 netif_stop_queue(netdev);
4748 /*
4749 * Herbert's original patch had:
4750 * smp_mb__after_netif_stop_queue();
4751 * but since that doesn't exist yet, just open code it.
4752 */
4753 smp_mb();
4754
4755 /*
4756 * We need to check again in a case another CPU has just
4757 * made room available.
4758 */
4759 if (e1000_desc_unused(adapter->tx_ring) < size)
4760 return -EBUSY;
4761
4762 /* A reprieve! */
4763 netif_start_queue(netdev);
4764 ++adapter->restart_queue;
4765 return 0;
4766 }
4767
4768 static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4769 {
4770 struct e1000_adapter *adapter = netdev_priv(netdev);
4771
4772 if (e1000_desc_unused(adapter->tx_ring) >= size)
4773 return 0;
4774 return __e1000_maybe_stop_tx(netdev, size);
4775 }
4776
4777 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
4778 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4779 struct net_device *netdev)
4780 {
4781 struct e1000_adapter *adapter = netdev_priv(netdev);
4782 struct e1000_ring *tx_ring = adapter->tx_ring;
4783 unsigned int first;
4784 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4785 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4786 unsigned int tx_flags = 0;
4787 unsigned int len = skb_headlen(skb);
4788 unsigned int nr_frags;
4789 unsigned int mss;
4790 int count = 0;
4791 int tso;
4792 unsigned int f;
4793
4794 if (test_bit(__E1000_DOWN, &adapter->state)) {
4795 dev_kfree_skb_any(skb);
4796 return NETDEV_TX_OK;
4797 }
4798
4799 if (skb->len <= 0) {
4800 dev_kfree_skb_any(skb);
4801 return NETDEV_TX_OK;
4802 }
4803
4804 mss = skb_shinfo(skb)->gso_size;
4805 /*
4806 * The controller does a simple calculation to
4807 * make sure there is enough room in the FIFO before
4808 * initiating the DMA for each buffer. The calc is:
4809 * 4 = ceil(buffer len/mss). To make sure we don't
4810 * overrun the FIFO, adjust the max buffer len if mss
4811 * drops.
4812 */
4813 if (mss) {
4814 u8 hdr_len;
4815 max_per_txd = min(mss << 2, max_per_txd);
4816 max_txd_pwr = fls(max_per_txd) - 1;
4817
4818 /*
4819 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4820 * points to just header, pull a few bytes of payload from
4821 * frags into skb->data
4822 */
4823 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4824 /*
4825 * we do this workaround for ES2LAN, but it is un-necessary,
4826 * avoiding it could save a lot of cycles
4827 */
4828 if (skb->data_len && (hdr_len == len)) {
4829 unsigned int pull_size;
4830
4831 pull_size = min((unsigned int)4, skb->data_len);
4832 if (!__pskb_pull_tail(skb, pull_size)) {
4833 e_err("__pskb_pull_tail failed.\n");
4834 dev_kfree_skb_any(skb);
4835 return NETDEV_TX_OK;
4836 }
4837 len = skb_headlen(skb);
4838 }
4839 }
4840
4841 /* reserve a descriptor for the offload context */
4842 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4843 count++;
4844 count++;
4845
4846 count += TXD_USE_COUNT(len, max_txd_pwr);
4847
4848 nr_frags = skb_shinfo(skb)->nr_frags;
4849 for (f = 0; f < nr_frags; f++)
4850 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4851 max_txd_pwr);
4852
4853 if (adapter->hw.mac.tx_pkt_filtering)
4854 e1000_transfer_dhcp_info(adapter, skb);
4855
4856 /*
4857 * need: count + 2 desc gap to keep tail from touching
4858 * head, otherwise try next time
4859 */
4860 if (e1000_maybe_stop_tx(netdev, count + 2))
4861 return NETDEV_TX_BUSY;
4862
4863 if (vlan_tx_tag_present(skb)) {
4864 tx_flags |= E1000_TX_FLAGS_VLAN;
4865 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4866 }
4867
4868 first = tx_ring->next_to_use;
4869
4870 tso = e1000_tso(adapter, skb);
4871 if (tso < 0) {
4872 dev_kfree_skb_any(skb);
4873 return NETDEV_TX_OK;
4874 }
4875
4876 if (tso)
4877 tx_flags |= E1000_TX_FLAGS_TSO;
4878 else if (e1000_tx_csum(adapter, skb))
4879 tx_flags |= E1000_TX_FLAGS_CSUM;
4880
4881 /*
4882 * Old method was to assume IPv4 packet by default if TSO was enabled.
4883 * 82571 hardware supports TSO capabilities for IPv6 as well...
4884 * no longer assume, we must.
4885 */
4886 if (skb->protocol == htons(ETH_P_IP))
4887 tx_flags |= E1000_TX_FLAGS_IPV4;
4888
4889 /* if count is 0 then mapping error has occured */
4890 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
4891 if (count) {
4892 e1000_tx_queue(adapter, tx_flags, count);
4893 /* Make sure there is space in the ring for the next send. */
4894 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4895
4896 } else {
4897 dev_kfree_skb_any(skb);
4898 tx_ring->buffer_info[first].time_stamp = 0;
4899 tx_ring->next_to_use = first;
4900 }
4901
4902 return NETDEV_TX_OK;
4903 }
4904
4905 /**
4906 * e1000_tx_timeout - Respond to a Tx Hang
4907 * @netdev: network interface device structure
4908 **/
4909 static void e1000_tx_timeout(struct net_device *netdev)
4910 {
4911 struct e1000_adapter *adapter = netdev_priv(netdev);
4912
4913 /* Do the reset outside of interrupt context */
4914 adapter->tx_timeout_count++;
4915 schedule_work(&adapter->reset_task);
4916 }
4917
4918 static void e1000_reset_task(struct work_struct *work)
4919 {
4920 struct e1000_adapter *adapter;
4921 adapter = container_of(work, struct e1000_adapter, reset_task);
4922
4923 /* don't run the task if already down */
4924 if (test_bit(__E1000_DOWN, &adapter->state))
4925 return;
4926
4927 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4928 (adapter->flags & FLAG_RX_RESTART_NOW))) {
4929 e1000e_dump(adapter);
4930 e_err("Reset adapter\n");
4931 }
4932 e1000e_reinit_locked(adapter);
4933 }
4934
4935 /**
4936 * e1000_get_stats64 - Get System Network Statistics
4937 * @netdev: network interface device structure
4938 * @stats: rtnl_link_stats64 pointer
4939 *
4940 * Returns the address of the device statistics structure.
4941 **/
4942 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
4943 struct rtnl_link_stats64 *stats)
4944 {
4945 struct e1000_adapter *adapter = netdev_priv(netdev);
4946
4947 memset(stats, 0, sizeof(struct rtnl_link_stats64));
4948 spin_lock(&adapter->stats64_lock);
4949 e1000e_update_stats(adapter);
4950 /* Fill out the OS statistics structure */
4951 stats->rx_bytes = adapter->stats.gorc;
4952 stats->rx_packets = adapter->stats.gprc;
4953 stats->tx_bytes = adapter->stats.gotc;
4954 stats->tx_packets = adapter->stats.gptc;
4955 stats->multicast = adapter->stats.mprc;
4956 stats->collisions = adapter->stats.colc;
4957
4958 /* Rx Errors */
4959
4960 /*
4961 * RLEC on some newer hardware can be incorrect so build
4962 * our own version based on RUC and ROC
4963 */
4964 stats->rx_errors = adapter->stats.rxerrc +
4965 adapter->stats.crcerrs + adapter->stats.algnerrc +
4966 adapter->stats.ruc + adapter->stats.roc +
4967 adapter->stats.cexterr;
4968 stats->rx_length_errors = adapter->stats.ruc +
4969 adapter->stats.roc;
4970 stats->rx_crc_errors = adapter->stats.crcerrs;
4971 stats->rx_frame_errors = adapter->stats.algnerrc;
4972 stats->rx_missed_errors = adapter->stats.mpc;
4973
4974 /* Tx Errors */
4975 stats->tx_errors = adapter->stats.ecol +
4976 adapter->stats.latecol;
4977 stats->tx_aborted_errors = adapter->stats.ecol;
4978 stats->tx_window_errors = adapter->stats.latecol;
4979 stats->tx_carrier_errors = adapter->stats.tncrs;
4980
4981 /* Tx Dropped needs to be maintained elsewhere */
4982
4983 spin_unlock(&adapter->stats64_lock);
4984 return stats;
4985 }
4986
4987 /**
4988 * e1000_change_mtu - Change the Maximum Transfer Unit
4989 * @netdev: network interface device structure
4990 * @new_mtu: new value for maximum frame size
4991 *
4992 * Returns 0 on success, negative on failure
4993 **/
4994 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4995 {
4996 struct e1000_adapter *adapter = netdev_priv(netdev);
4997 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4998
4999 /* Jumbo frame support */
5000 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5001 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5002 e_err("Jumbo Frames not supported.\n");
5003 return -EINVAL;
5004 }
5005
5006 /* Supported frame sizes */
5007 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5008 (max_frame > adapter->max_hw_frame_size)) {
5009 e_err("Unsupported MTU setting\n");
5010 return -EINVAL;
5011 }
5012
5013 /* Jumbo frame workaround on 82579 requires CRC be stripped */
5014 if ((adapter->hw.mac.type == e1000_pch2lan) &&
5015 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5016 (new_mtu > ETH_DATA_LEN)) {
5017 e_err("Jumbo Frames not supported on 82579 when CRC "
5018 "stripping is disabled.\n");
5019 return -EINVAL;
5020 }
5021
5022 /* 82573 Errata 17 */
5023 if (((adapter->hw.mac.type == e1000_82573) ||
5024 (adapter->hw.mac.type == e1000_82574)) &&
5025 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
5026 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
5027 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
5028 }
5029
5030 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5031 msleep(1);
5032 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5033 adapter->max_frame_size = max_frame;
5034 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5035 netdev->mtu = new_mtu;
5036 if (netif_running(netdev))
5037 e1000e_down(adapter);
5038
5039 /*
5040 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5041 * means we reserve 2 more, this pushes us to allocate from the next
5042 * larger slab size.
5043 * i.e. RXBUFFER_2048 --> size-4096 slab
5044 * However with the new *_jumbo_rx* routines, jumbo receives will use
5045 * fragmented skbs
5046 */
5047
5048 if (max_frame <= 2048)
5049 adapter->rx_buffer_len = 2048;
5050 else
5051 adapter->rx_buffer_len = 4096;
5052
5053 /* adjust allocation if LPE protects us, and we aren't using SBP */
5054 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5055 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5056 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5057 + ETH_FCS_LEN;
5058
5059 if (netif_running(netdev))
5060 e1000e_up(adapter);
5061 else
5062 e1000e_reset(adapter);
5063
5064 clear_bit(__E1000_RESETTING, &adapter->state);
5065
5066 return 0;
5067 }
5068
5069 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5070 int cmd)
5071 {
5072 struct e1000_adapter *adapter = netdev_priv(netdev);
5073 struct mii_ioctl_data *data = if_mii(ifr);
5074
5075 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5076 return -EOPNOTSUPP;
5077
5078 switch (cmd) {
5079 case SIOCGMIIPHY:
5080 data->phy_id = adapter->hw.phy.addr;
5081 break;
5082 case SIOCGMIIREG:
5083 e1000_phy_read_status(adapter);
5084
5085 switch (data->reg_num & 0x1F) {
5086 case MII_BMCR:
5087 data->val_out = adapter->phy_regs.bmcr;
5088 break;
5089 case MII_BMSR:
5090 data->val_out = adapter->phy_regs.bmsr;
5091 break;
5092 case MII_PHYSID1:
5093 data->val_out = (adapter->hw.phy.id >> 16);
5094 break;
5095 case MII_PHYSID2:
5096 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5097 break;
5098 case MII_ADVERTISE:
5099 data->val_out = adapter->phy_regs.advertise;
5100 break;
5101 case MII_LPA:
5102 data->val_out = adapter->phy_regs.lpa;
5103 break;
5104 case MII_EXPANSION:
5105 data->val_out = adapter->phy_regs.expansion;
5106 break;
5107 case MII_CTRL1000:
5108 data->val_out = adapter->phy_regs.ctrl1000;
5109 break;
5110 case MII_STAT1000:
5111 data->val_out = adapter->phy_regs.stat1000;
5112 break;
5113 case MII_ESTATUS:
5114 data->val_out = adapter->phy_regs.estatus;
5115 break;
5116 default:
5117 return -EIO;
5118 }
5119 break;
5120 case SIOCSMIIREG:
5121 default:
5122 return -EOPNOTSUPP;
5123 }
5124 return 0;
5125 }
5126
5127 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5128 {
5129 switch (cmd) {
5130 case SIOCGMIIPHY:
5131 case SIOCGMIIREG:
5132 case SIOCSMIIREG:
5133 return e1000_mii_ioctl(netdev, ifr, cmd);
5134 default:
5135 return -EOPNOTSUPP;
5136 }
5137 }
5138
5139 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5140 {
5141 struct e1000_hw *hw = &adapter->hw;
5142 u32 i, mac_reg;
5143 u16 phy_reg;
5144 int retval = 0;
5145
5146 /* copy MAC RARs to PHY RARs */
5147 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5148
5149 /* copy MAC MTA to PHY MTA */
5150 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5151 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5152 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
5153 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
5154 }
5155
5156 /* configure PHY Rx Control register */
5157 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
5158 mac_reg = er32(RCTL);
5159 if (mac_reg & E1000_RCTL_UPE)
5160 phy_reg |= BM_RCTL_UPE;
5161 if (mac_reg & E1000_RCTL_MPE)
5162 phy_reg |= BM_RCTL_MPE;
5163 phy_reg &= ~(BM_RCTL_MO_MASK);
5164 if (mac_reg & E1000_RCTL_MO_3)
5165 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5166 << BM_RCTL_MO_SHIFT);
5167 if (mac_reg & E1000_RCTL_BAM)
5168 phy_reg |= BM_RCTL_BAM;
5169 if (mac_reg & E1000_RCTL_PMCF)
5170 phy_reg |= BM_RCTL_PMCF;
5171 mac_reg = er32(CTRL);
5172 if (mac_reg & E1000_CTRL_RFCE)
5173 phy_reg |= BM_RCTL_RFCE;
5174 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
5175
5176 /* enable PHY wakeup in MAC register */
5177 ew32(WUFC, wufc);
5178 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5179
5180 /* configure and enable PHY wakeup in PHY registers */
5181 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
5182 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5183
5184 /* activate PHY wakeup */
5185 retval = hw->phy.ops.acquire(hw);
5186 if (retval) {
5187 e_err("Could not acquire PHY\n");
5188 return retval;
5189 }
5190 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5191 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
5192 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
5193 if (retval) {
5194 e_err("Could not read PHY page 769\n");
5195 goto out;
5196 }
5197 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5198 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
5199 if (retval)
5200 e_err("Could not set PHY Host Wakeup bit\n");
5201 out:
5202 hw->phy.ops.release(hw);
5203
5204 return retval;
5205 }
5206
5207 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5208 bool runtime)
5209 {
5210 struct net_device *netdev = pci_get_drvdata(pdev);
5211 struct e1000_adapter *adapter = netdev_priv(netdev);
5212 struct e1000_hw *hw = &adapter->hw;
5213 u32 ctrl, ctrl_ext, rctl, status;
5214 /* Runtime suspend should only enable wakeup for link changes */
5215 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5216 int retval = 0;
5217
5218 netif_device_detach(netdev);
5219
5220 if (netif_running(netdev)) {
5221 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5222 e1000e_down(adapter);
5223 e1000_free_irq(adapter);
5224 }
5225 e1000e_reset_interrupt_capability(adapter);
5226
5227 retval = pci_save_state(pdev);
5228 if (retval)
5229 return retval;
5230
5231 status = er32(STATUS);
5232 if (status & E1000_STATUS_LU)
5233 wufc &= ~E1000_WUFC_LNKC;
5234
5235 if (wufc) {
5236 e1000_setup_rctl(adapter);
5237 e1000_set_multi(netdev);
5238
5239 /* turn on all-multi mode if wake on multicast is enabled */
5240 if (wufc & E1000_WUFC_MC) {
5241 rctl = er32(RCTL);
5242 rctl |= E1000_RCTL_MPE;
5243 ew32(RCTL, rctl);
5244 }
5245
5246 ctrl = er32(CTRL);
5247 /* advertise wake from D3Cold */
5248 #define E1000_CTRL_ADVD3WUC 0x00100000
5249 /* phy power management enable */
5250 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5251 ctrl |= E1000_CTRL_ADVD3WUC;
5252 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5253 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5254 ew32(CTRL, ctrl);
5255
5256 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5257 adapter->hw.phy.media_type ==
5258 e1000_media_type_internal_serdes) {
5259 /* keep the laser running in D3 */
5260 ctrl_ext = er32(CTRL_EXT);
5261 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5262 ew32(CTRL_EXT, ctrl_ext);
5263 }
5264
5265 if (adapter->flags & FLAG_IS_ICH)
5266 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
5267
5268 /* Allow time for pending master requests to run */
5269 e1000e_disable_pcie_master(&adapter->hw);
5270
5271 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5272 /* enable wakeup by the PHY */
5273 retval = e1000_init_phy_wakeup(adapter, wufc);
5274 if (retval)
5275 return retval;
5276 } else {
5277 /* enable wakeup by the MAC */
5278 ew32(WUFC, wufc);
5279 ew32(WUC, E1000_WUC_PME_EN);
5280 }
5281 } else {
5282 ew32(WUC, 0);
5283 ew32(WUFC, 0);
5284 }
5285
5286 *enable_wake = !!wufc;
5287
5288 /* make sure adapter isn't asleep if manageability is enabled */
5289 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5290 (hw->mac.ops.check_mng_mode(hw)))
5291 *enable_wake = true;
5292
5293 if (adapter->hw.phy.type == e1000_phy_igp_3)
5294 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5295
5296 /*
5297 * Release control of h/w to f/w. If f/w is AMT enabled, this
5298 * would have already happened in close and is redundant.
5299 */
5300 e1000e_release_hw_control(adapter);
5301
5302 pci_disable_device(pdev);
5303
5304 return 0;
5305 }
5306
5307 static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5308 {
5309 if (sleep && wake) {
5310 pci_prepare_to_sleep(pdev);
5311 return;
5312 }
5313
5314 pci_wake_from_d3(pdev, wake);
5315 pci_set_power_state(pdev, PCI_D3hot);
5316 }
5317
5318 static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5319 bool wake)
5320 {
5321 struct net_device *netdev = pci_get_drvdata(pdev);
5322 struct e1000_adapter *adapter = netdev_priv(netdev);
5323
5324 /*
5325 * The pci-e switch on some quad port adapters will report a
5326 * correctable error when the MAC transitions from D0 to D3. To
5327 * prevent this we need to mask off the correctable errors on the
5328 * downstream port of the pci-e switch.
5329 */
5330 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5331 struct pci_dev *us_dev = pdev->bus->self;
5332 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
5333 u16 devctl;
5334
5335 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5336 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5337 (devctl & ~PCI_EXP_DEVCTL_CERE));
5338
5339 e1000_power_off(pdev, sleep, wake);
5340
5341 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5342 } else {
5343 e1000_power_off(pdev, sleep, wake);
5344 }
5345 }
5346
5347 #ifdef CONFIG_PCIEASPM
5348 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5349 {
5350 pci_disable_link_state(pdev, state);
5351 }
5352 #else
5353 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5354 {
5355 int pos;
5356 u16 reg16;
5357
5358 /*
5359 * Both device and parent should have the same ASPM setting.
5360 * Disable ASPM in downstream component first and then upstream.
5361 */
5362 pos = pci_pcie_cap(pdev);
5363 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5364 reg16 &= ~state;
5365 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5366
5367 if (!pdev->bus->self)
5368 return;
5369
5370 pos = pci_pcie_cap(pdev->bus->self);
5371 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5372 reg16 &= ~state;
5373 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5374 }
5375 #endif
5376 void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5377 {
5378 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5379 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5380 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5381
5382 __e1000e_disable_aspm(pdev, state);
5383 }
5384
5385 #ifdef CONFIG_PM
5386 static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5387 {
5388 return !!adapter->tx_ring->buffer_info;
5389 }
5390
5391 static int __e1000_resume(struct pci_dev *pdev)
5392 {
5393 struct net_device *netdev = pci_get_drvdata(pdev);
5394 struct e1000_adapter *adapter = netdev_priv(netdev);
5395 struct e1000_hw *hw = &adapter->hw;
5396 u32 err;
5397
5398 pci_set_power_state(pdev, PCI_D0);
5399 pci_restore_state(pdev);
5400 pci_save_state(pdev);
5401 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5402 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
5403
5404 e1000e_set_interrupt_capability(adapter);
5405 if (netif_running(netdev)) {
5406 err = e1000_request_irq(adapter);
5407 if (err)
5408 return err;
5409 }
5410
5411 e1000e_power_up_phy(adapter);
5412
5413 /* report the system wakeup cause from S3/S4 */
5414 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5415 u16 phy_data;
5416
5417 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5418 if (phy_data) {
5419 e_info("PHY Wakeup cause - %s\n",
5420 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5421 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5422 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5423 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5424 phy_data & E1000_WUS_LNKC ? "Link Status "
5425 " Change" : "other");
5426 }
5427 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5428 } else {
5429 u32 wus = er32(WUS);
5430 if (wus) {
5431 e_info("MAC Wakeup cause - %s\n",
5432 wus & E1000_WUS_EX ? "Unicast Packet" :
5433 wus & E1000_WUS_MC ? "Multicast Packet" :
5434 wus & E1000_WUS_BC ? "Broadcast Packet" :
5435 wus & E1000_WUS_MAG ? "Magic Packet" :
5436 wus & E1000_WUS_LNKC ? "Link Status Change" :
5437 "other");
5438 }
5439 ew32(WUS, ~0);
5440 }
5441
5442 e1000e_reset(adapter);
5443
5444 e1000_init_manageability_pt(adapter);
5445
5446 if (netif_running(netdev))
5447 e1000e_up(adapter);
5448
5449 netif_device_attach(netdev);
5450
5451 /*
5452 * If the controller has AMT, do not set DRV_LOAD until the interface
5453 * is up. For all other cases, let the f/w know that the h/w is now
5454 * under the control of the driver.
5455 */
5456 if (!(adapter->flags & FLAG_HAS_AMT))
5457 e1000e_get_hw_control(adapter);
5458
5459 return 0;
5460 }
5461
5462 #ifdef CONFIG_PM_SLEEP
5463 static int e1000_suspend(struct device *dev)
5464 {
5465 struct pci_dev *pdev = to_pci_dev(dev);
5466 int retval;
5467 bool wake;
5468
5469 retval = __e1000_shutdown(pdev, &wake, false);
5470 if (!retval)
5471 e1000_complete_shutdown(pdev, true, wake);
5472
5473 return retval;
5474 }
5475
5476 static int e1000_resume(struct device *dev)
5477 {
5478 struct pci_dev *pdev = to_pci_dev(dev);
5479 struct net_device *netdev = pci_get_drvdata(pdev);
5480 struct e1000_adapter *adapter = netdev_priv(netdev);
5481
5482 if (e1000e_pm_ready(adapter))
5483 adapter->idle_check = true;
5484
5485 return __e1000_resume(pdev);
5486 }
5487 #endif /* CONFIG_PM_SLEEP */
5488
5489 #ifdef CONFIG_PM_RUNTIME
5490 static int e1000_runtime_suspend(struct device *dev)
5491 {
5492 struct pci_dev *pdev = to_pci_dev(dev);
5493 struct net_device *netdev = pci_get_drvdata(pdev);
5494 struct e1000_adapter *adapter = netdev_priv(netdev);
5495
5496 if (e1000e_pm_ready(adapter)) {
5497 bool wake;
5498
5499 __e1000_shutdown(pdev, &wake, true);
5500 }
5501
5502 return 0;
5503 }
5504
5505 static int e1000_idle(struct device *dev)
5506 {
5507 struct pci_dev *pdev = to_pci_dev(dev);
5508 struct net_device *netdev = pci_get_drvdata(pdev);
5509 struct e1000_adapter *adapter = netdev_priv(netdev);
5510
5511 if (!e1000e_pm_ready(adapter))
5512 return 0;
5513
5514 if (adapter->idle_check) {
5515 adapter->idle_check = false;
5516 if (!e1000e_has_link(adapter))
5517 pm_schedule_suspend(dev, MSEC_PER_SEC);
5518 }
5519
5520 return -EBUSY;
5521 }
5522
5523 static int e1000_runtime_resume(struct device *dev)
5524 {
5525 struct pci_dev *pdev = to_pci_dev(dev);
5526 struct net_device *netdev = pci_get_drvdata(pdev);
5527 struct e1000_adapter *adapter = netdev_priv(netdev);
5528
5529 if (!e1000e_pm_ready(adapter))
5530 return 0;
5531
5532 adapter->idle_check = !dev->power.runtime_auto;
5533 return __e1000_resume(pdev);
5534 }
5535 #endif /* CONFIG_PM_RUNTIME */
5536 #endif /* CONFIG_PM */
5537
5538 static void e1000_shutdown(struct pci_dev *pdev)
5539 {
5540 bool wake = false;
5541
5542 __e1000_shutdown(pdev, &wake, false);
5543
5544 if (system_state == SYSTEM_POWER_OFF)
5545 e1000_complete_shutdown(pdev, false, wake);
5546 }
5547
5548 #ifdef CONFIG_NET_POLL_CONTROLLER
5549
5550 static irqreturn_t e1000_intr_msix(int irq, void *data)
5551 {
5552 struct net_device *netdev = data;
5553 struct e1000_adapter *adapter = netdev_priv(netdev);
5554
5555 if (adapter->msix_entries) {
5556 int vector, msix_irq;
5557
5558 vector = 0;
5559 msix_irq = adapter->msix_entries[vector].vector;
5560 disable_irq(msix_irq);
5561 e1000_intr_msix_rx(msix_irq, netdev);
5562 enable_irq(msix_irq);
5563
5564 vector++;
5565 msix_irq = adapter->msix_entries[vector].vector;
5566 disable_irq(msix_irq);
5567 e1000_intr_msix_tx(msix_irq, netdev);
5568 enable_irq(msix_irq);
5569
5570 vector++;
5571 msix_irq = adapter->msix_entries[vector].vector;
5572 disable_irq(msix_irq);
5573 e1000_msix_other(msix_irq, netdev);
5574 enable_irq(msix_irq);
5575 }
5576
5577 return IRQ_HANDLED;
5578 }
5579
5580 /*
5581 * Polling 'interrupt' - used by things like netconsole to send skbs
5582 * without having to re-enable interrupts. It's not called while
5583 * the interrupt routine is executing.
5584 */
5585 static void e1000_netpoll(struct net_device *netdev)
5586 {
5587 struct e1000_adapter *adapter = netdev_priv(netdev);
5588
5589 switch (adapter->int_mode) {
5590 case E1000E_INT_MODE_MSIX:
5591 e1000_intr_msix(adapter->pdev->irq, netdev);
5592 break;
5593 case E1000E_INT_MODE_MSI:
5594 disable_irq(adapter->pdev->irq);
5595 e1000_intr_msi(adapter->pdev->irq, netdev);
5596 enable_irq(adapter->pdev->irq);
5597 break;
5598 default: /* E1000E_INT_MODE_LEGACY */
5599 disable_irq(adapter->pdev->irq);
5600 e1000_intr(adapter->pdev->irq, netdev);
5601 enable_irq(adapter->pdev->irq);
5602 break;
5603 }
5604 }
5605 #endif
5606
5607 /**
5608 * e1000_io_error_detected - called when PCI error is detected
5609 * @pdev: Pointer to PCI device
5610 * @state: The current pci connection state
5611 *
5612 * This function is called after a PCI bus error affecting
5613 * this device has been detected.
5614 */
5615 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5616 pci_channel_state_t state)
5617 {
5618 struct net_device *netdev = pci_get_drvdata(pdev);
5619 struct e1000_adapter *adapter = netdev_priv(netdev);
5620
5621 netif_device_detach(netdev);
5622
5623 if (state == pci_channel_io_perm_failure)
5624 return PCI_ERS_RESULT_DISCONNECT;
5625
5626 if (netif_running(netdev))
5627 e1000e_down(adapter);
5628 pci_disable_device(pdev);
5629
5630 /* Request a slot slot reset. */
5631 return PCI_ERS_RESULT_NEED_RESET;
5632 }
5633
5634 /**
5635 * e1000_io_slot_reset - called after the pci bus has been reset.
5636 * @pdev: Pointer to PCI device
5637 *
5638 * Restart the card from scratch, as if from a cold-boot. Implementation
5639 * resembles the first-half of the e1000_resume routine.
5640 */
5641 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5642 {
5643 struct net_device *netdev = pci_get_drvdata(pdev);
5644 struct e1000_adapter *adapter = netdev_priv(netdev);
5645 struct e1000_hw *hw = &adapter->hw;
5646 int err;
5647 pci_ers_result_t result;
5648
5649 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5650 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
5651 err = pci_enable_device_mem(pdev);
5652 if (err) {
5653 dev_err(&pdev->dev,
5654 "Cannot re-enable PCI device after reset.\n");
5655 result = PCI_ERS_RESULT_DISCONNECT;
5656 } else {
5657 pci_set_master(pdev);
5658 pdev->state_saved = true;
5659 pci_restore_state(pdev);
5660
5661 pci_enable_wake(pdev, PCI_D3hot, 0);
5662 pci_enable_wake(pdev, PCI_D3cold, 0);
5663
5664 e1000e_reset(adapter);
5665 ew32(WUS, ~0);
5666 result = PCI_ERS_RESULT_RECOVERED;
5667 }
5668
5669 pci_cleanup_aer_uncorrect_error_status(pdev);
5670
5671 return result;
5672 }
5673
5674 /**
5675 * e1000_io_resume - called when traffic can start flowing again.
5676 * @pdev: Pointer to PCI device
5677 *
5678 * This callback is called when the error recovery driver tells us that
5679 * its OK to resume normal operation. Implementation resembles the
5680 * second-half of the e1000_resume routine.
5681 */
5682 static void e1000_io_resume(struct pci_dev *pdev)
5683 {
5684 struct net_device *netdev = pci_get_drvdata(pdev);
5685 struct e1000_adapter *adapter = netdev_priv(netdev);
5686
5687 e1000_init_manageability_pt(adapter);
5688
5689 if (netif_running(netdev)) {
5690 if (e1000e_up(adapter)) {
5691 dev_err(&pdev->dev,
5692 "can't bring device back up after reset\n");
5693 return;
5694 }
5695 }
5696
5697 netif_device_attach(netdev);
5698
5699 /*
5700 * If the controller has AMT, do not set DRV_LOAD until the interface
5701 * is up. For all other cases, let the f/w know that the h/w is now
5702 * under the control of the driver.
5703 */
5704 if (!(adapter->flags & FLAG_HAS_AMT))
5705 e1000e_get_hw_control(adapter);
5706
5707 }
5708
5709 static void e1000_print_device_info(struct e1000_adapter *adapter)
5710 {
5711 struct e1000_hw *hw = &adapter->hw;
5712 struct net_device *netdev = adapter->netdev;
5713 u32 ret_val;
5714 u8 pba_str[E1000_PBANUM_LENGTH];
5715
5716 /* print bus type/speed/width info */
5717 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
5718 /* bus width */
5719 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5720 "Width x1"),
5721 /* MAC address */
5722 netdev->dev_addr);
5723 e_info("Intel(R) PRO/%s Network Connection\n",
5724 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
5725 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5726 E1000_PBANUM_LENGTH);
5727 if (ret_val)
5728 strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1);
5729 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5730 hw->mac.type, hw->phy.type, pba_str);
5731 }
5732
5733 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5734 {
5735 struct e1000_hw *hw = &adapter->hw;
5736 int ret_val;
5737 u16 buf = 0;
5738
5739 if (hw->mac.type != e1000_82573)
5740 return;
5741
5742 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
5743 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
5744 /* Deep Smart Power Down (DSPD) */
5745 dev_warn(&adapter->pdev->dev,
5746 "Warning: detected DSPD enabled in EEPROM\n");
5747 }
5748 }
5749
5750 static const struct net_device_ops e1000e_netdev_ops = {
5751 .ndo_open = e1000_open,
5752 .ndo_stop = e1000_close,
5753 .ndo_start_xmit = e1000_xmit_frame,
5754 .ndo_get_stats64 = e1000e_get_stats64,
5755 .ndo_set_multicast_list = e1000_set_multi,
5756 .ndo_set_mac_address = e1000_set_mac,
5757 .ndo_change_mtu = e1000_change_mtu,
5758 .ndo_do_ioctl = e1000_ioctl,
5759 .ndo_tx_timeout = e1000_tx_timeout,
5760 .ndo_validate_addr = eth_validate_addr,
5761
5762 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5763 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5764 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5765 #ifdef CONFIG_NET_POLL_CONTROLLER
5766 .ndo_poll_controller = e1000_netpoll,
5767 #endif
5768 };
5769
5770 /**
5771 * e1000_probe - Device Initialization Routine
5772 * @pdev: PCI device information struct
5773 * @ent: entry in e1000_pci_tbl
5774 *
5775 * Returns 0 on success, negative on failure
5776 *
5777 * e1000_probe initializes an adapter identified by a pci_dev structure.
5778 * The OS initialization, configuring of the adapter private structure,
5779 * and a hardware reset occur.
5780 **/
5781 static int __devinit e1000_probe(struct pci_dev *pdev,
5782 const struct pci_device_id *ent)
5783 {
5784 struct net_device *netdev;
5785 struct e1000_adapter *adapter;
5786 struct e1000_hw *hw;
5787 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
5788 resource_size_t mmio_start, mmio_len;
5789 resource_size_t flash_start, flash_len;
5790
5791 static int cards_found;
5792 int i, err, pci_using_dac;
5793 u16 eeprom_data = 0;
5794 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5795
5796 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5797 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
5798
5799 err = pci_enable_device_mem(pdev);
5800 if (err)
5801 return err;
5802
5803 pci_using_dac = 0;
5804 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
5805 if (!err) {
5806 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
5807 if (!err)
5808 pci_using_dac = 1;
5809 } else {
5810 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5811 if (err) {
5812 err = dma_set_coherent_mask(&pdev->dev,
5813 DMA_BIT_MASK(32));
5814 if (err) {
5815 dev_err(&pdev->dev, "No usable DMA "
5816 "configuration, aborting\n");
5817 goto err_dma;
5818 }
5819 }
5820 }
5821
5822 err = pci_request_selected_regions_exclusive(pdev,
5823 pci_select_bars(pdev, IORESOURCE_MEM),
5824 e1000e_driver_name);
5825 if (err)
5826 goto err_pci_reg;
5827
5828 /* AER (Advanced Error Reporting) hooks */
5829 pci_enable_pcie_error_reporting(pdev);
5830
5831 pci_set_master(pdev);
5832 /* PCI config space info */
5833 err = pci_save_state(pdev);
5834 if (err)
5835 goto err_alloc_etherdev;
5836
5837 err = -ENOMEM;
5838 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5839 if (!netdev)
5840 goto err_alloc_etherdev;
5841
5842 SET_NETDEV_DEV(netdev, &pdev->dev);
5843
5844 netdev->irq = pdev->irq;
5845
5846 pci_set_drvdata(pdev, netdev);
5847 adapter = netdev_priv(netdev);
5848 hw = &adapter->hw;
5849 adapter->netdev = netdev;
5850 adapter->pdev = pdev;
5851 adapter->ei = ei;
5852 adapter->pba = ei->pba;
5853 adapter->flags = ei->flags;
5854 adapter->flags2 = ei->flags2;
5855 adapter->hw.adapter = adapter;
5856 adapter->hw.mac.type = ei->mac;
5857 adapter->max_hw_frame_size = ei->max_hw_frame_size;
5858 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5859
5860 mmio_start = pci_resource_start(pdev, 0);
5861 mmio_len = pci_resource_len(pdev, 0);
5862
5863 err = -EIO;
5864 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5865 if (!adapter->hw.hw_addr)
5866 goto err_ioremap;
5867
5868 if ((adapter->flags & FLAG_HAS_FLASH) &&
5869 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5870 flash_start = pci_resource_start(pdev, 1);
5871 flash_len = pci_resource_len(pdev, 1);
5872 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5873 if (!adapter->hw.flash_address)
5874 goto err_flashmap;
5875 }
5876
5877 /* construct the net_device struct */
5878 netdev->netdev_ops = &e1000e_netdev_ops;
5879 e1000e_set_ethtool_ops(netdev);
5880 netdev->watchdog_timeo = 5 * HZ;
5881 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
5882 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5883
5884 netdev->mem_start = mmio_start;
5885 netdev->mem_end = mmio_start + mmio_len;
5886
5887 adapter->bd_number = cards_found++;
5888
5889 e1000e_check_options(adapter);
5890
5891 /* setup adapter struct */
5892 err = e1000_sw_init(adapter);
5893 if (err)
5894 goto err_sw_init;
5895
5896 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5897 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5898 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5899
5900 err = ei->get_variants(adapter);
5901 if (err)
5902 goto err_hw_init;
5903
5904 if ((adapter->flags & FLAG_IS_ICH) &&
5905 (adapter->flags & FLAG_READ_ONLY_NVM))
5906 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5907
5908 hw->mac.ops.get_bus_info(&adapter->hw);
5909
5910 adapter->hw.phy.autoneg_wait_to_complete = 0;
5911
5912 /* Copper options */
5913 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
5914 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5915 adapter->hw.phy.disable_polarity_correction = 0;
5916 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5917 }
5918
5919 if (e1000_check_reset_block(&adapter->hw))
5920 e_info("PHY reset is blocked due to SOL/IDER session.\n");
5921
5922 netdev->features = NETIF_F_SG |
5923 NETIF_F_HW_CSUM |
5924 NETIF_F_HW_VLAN_TX |
5925 NETIF_F_HW_VLAN_RX;
5926
5927 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5928 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5929
5930 netdev->features |= NETIF_F_TSO;
5931 netdev->features |= NETIF_F_TSO6;
5932
5933 netdev->vlan_features |= NETIF_F_TSO;
5934 netdev->vlan_features |= NETIF_F_TSO6;
5935 netdev->vlan_features |= NETIF_F_HW_CSUM;
5936 netdev->vlan_features |= NETIF_F_SG;
5937
5938 if (pci_using_dac) {
5939 netdev->features |= NETIF_F_HIGHDMA;
5940 netdev->vlan_features |= NETIF_F_HIGHDMA;
5941 }
5942
5943 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5944 adapter->flags |= FLAG_MNG_PT_ENABLED;
5945
5946 /*
5947 * before reading the NVM, reset the controller to
5948 * put the device in a known good starting state
5949 */
5950 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5951
5952 /*
5953 * systems with ASPM and others may see the checksum fail on the first
5954 * attempt. Let's give it a few tries
5955 */
5956 for (i = 0;; i++) {
5957 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5958 break;
5959 if (i == 2) {
5960 e_err("The NVM Checksum Is Not Valid\n");
5961 err = -EIO;
5962 goto err_eeprom;
5963 }
5964 }
5965
5966 e1000_eeprom_checks(adapter);
5967
5968 /* copy the MAC address */
5969 if (e1000e_read_mac_addr(&adapter->hw))
5970 e_err("NVM Read Error while reading MAC address\n");
5971
5972 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5973 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5974
5975 if (!is_valid_ether_addr(netdev->perm_addr)) {
5976 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
5977 err = -EIO;
5978 goto err_eeprom;
5979 }
5980
5981 init_timer(&adapter->watchdog_timer);
5982 adapter->watchdog_timer.function = e1000_watchdog;
5983 adapter->watchdog_timer.data = (unsigned long) adapter;
5984
5985 init_timer(&adapter->phy_info_timer);
5986 adapter->phy_info_timer.function = e1000_update_phy_info;
5987 adapter->phy_info_timer.data = (unsigned long) adapter;
5988
5989 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5990 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
5991 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5992 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
5993 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
5994 INIT_WORK(&adapter->led_blink_task, e1000e_led_blink_task);
5995
5996 /* Initialize link parameters. User can change them with ethtool */
5997 adapter->hw.mac.autoneg = 1;
5998 adapter->fc_autoneg = 1;
5999 adapter->hw.fc.requested_mode = e1000_fc_default;
6000 adapter->hw.fc.current_mode = e1000_fc_default;
6001 adapter->hw.phy.autoneg_advertised = 0x2f;
6002
6003 /* ring size defaults */
6004 adapter->rx_ring->count = 256;
6005 adapter->tx_ring->count = 256;
6006
6007 /*
6008 * Initial Wake on LAN setting - If APM wake is enabled in
6009 * the EEPROM, enable the ACPI Magic Packet filter
6010 */
6011 if (adapter->flags & FLAG_APME_IN_WUC) {
6012 /* APME bit in EEPROM is mapped to WUC.APME */
6013 eeprom_data = er32(WUC);
6014 eeprom_apme_mask = E1000_WUC_APME;
6015 if ((hw->mac.type > e1000_ich10lan) &&
6016 (eeprom_data & E1000_WUC_PHY_WAKE))
6017 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6018 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6019 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6020 (adapter->hw.bus.func == 1))
6021 e1000_read_nvm(&adapter->hw,
6022 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
6023 else
6024 e1000_read_nvm(&adapter->hw,
6025 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
6026 }
6027
6028 /* fetch WoL from EEPROM */
6029 if (eeprom_data & eeprom_apme_mask)
6030 adapter->eeprom_wol |= E1000_WUFC_MAG;
6031
6032 /*
6033 * now that we have the eeprom settings, apply the special cases
6034 * where the eeprom may be wrong or the board simply won't support
6035 * wake on lan on a particular port
6036 */
6037 if (!(adapter->flags & FLAG_HAS_WOL))
6038 adapter->eeprom_wol = 0;
6039
6040 /* initialize the wol settings based on the eeprom settings */
6041 adapter->wol = adapter->eeprom_wol;
6042 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6043
6044 /* save off EEPROM version number */
6045 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6046
6047 /* reset the hardware with the new settings */
6048 e1000e_reset(adapter);
6049
6050 /*
6051 * If the controller has AMT, do not set DRV_LOAD until the interface
6052 * is up. For all other cases, let the f/w know that the h/w is now
6053 * under the control of the driver.
6054 */
6055 if (!(adapter->flags & FLAG_HAS_AMT))
6056 e1000e_get_hw_control(adapter);
6057
6058 strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1);
6059 err = register_netdev(netdev);
6060 if (err)
6061 goto err_register;
6062
6063 /* carrier off reporting is important to ethtool even BEFORE open */
6064 netif_carrier_off(netdev);
6065
6066 e1000_print_device_info(adapter);
6067
6068 if (pci_dev_run_wake(pdev))
6069 pm_runtime_put_noidle(&pdev->dev);
6070
6071 return 0;
6072
6073 err_register:
6074 if (!(adapter->flags & FLAG_HAS_AMT))
6075 e1000e_release_hw_control(adapter);
6076 err_eeprom:
6077 if (!e1000_check_reset_block(&adapter->hw))
6078 e1000_phy_hw_reset(&adapter->hw);
6079 err_hw_init:
6080 kfree(adapter->tx_ring);
6081 kfree(adapter->rx_ring);
6082 err_sw_init:
6083 if (adapter->hw.flash_address)
6084 iounmap(adapter->hw.flash_address);
6085 e1000e_reset_interrupt_capability(adapter);
6086 err_flashmap:
6087 iounmap(adapter->hw.hw_addr);
6088 err_ioremap:
6089 free_netdev(netdev);
6090 err_alloc_etherdev:
6091 pci_release_selected_regions(pdev,
6092 pci_select_bars(pdev, IORESOURCE_MEM));
6093 err_pci_reg:
6094 err_dma:
6095 pci_disable_device(pdev);
6096 return err;
6097 }
6098
6099 /**
6100 * e1000_remove - Device Removal Routine
6101 * @pdev: PCI device information struct
6102 *
6103 * e1000_remove is called by the PCI subsystem to alert the driver
6104 * that it should release a PCI device. The could be caused by a
6105 * Hot-Plug event, or because the driver is going to be removed from
6106 * memory.
6107 **/
6108 static void __devexit e1000_remove(struct pci_dev *pdev)
6109 {
6110 struct net_device *netdev = pci_get_drvdata(pdev);
6111 struct e1000_adapter *adapter = netdev_priv(netdev);
6112 bool down = test_bit(__E1000_DOWN, &adapter->state);
6113
6114 /*
6115 * The timers may be rescheduled, so explicitly disable them
6116 * from being rescheduled.
6117 */
6118 if (!down)
6119 set_bit(__E1000_DOWN, &adapter->state);
6120 del_timer_sync(&adapter->watchdog_timer);
6121 del_timer_sync(&adapter->phy_info_timer);
6122
6123 cancel_work_sync(&adapter->reset_task);
6124 cancel_work_sync(&adapter->watchdog_task);
6125 cancel_work_sync(&adapter->downshift_task);
6126 cancel_work_sync(&adapter->update_phy_task);
6127 cancel_work_sync(&adapter->led_blink_task);
6128 cancel_work_sync(&adapter->print_hang_task);
6129
6130 if (!(netdev->flags & IFF_UP))
6131 e1000_power_down_phy(adapter);
6132
6133 /* Don't lie to e1000_close() down the road. */
6134 if (!down)
6135 clear_bit(__E1000_DOWN, &adapter->state);
6136 unregister_netdev(netdev);
6137
6138 if (pci_dev_run_wake(pdev))
6139 pm_runtime_get_noresume(&pdev->dev);
6140
6141 /*
6142 * Release control of h/w to f/w. If f/w is AMT enabled, this
6143 * would have already happened in close and is redundant.
6144 */
6145 e1000e_release_hw_control(adapter);
6146
6147 e1000e_reset_interrupt_capability(adapter);
6148 kfree(adapter->tx_ring);
6149 kfree(adapter->rx_ring);
6150
6151 iounmap(adapter->hw.hw_addr);
6152 if (adapter->hw.flash_address)
6153 iounmap(adapter->hw.flash_address);
6154 pci_release_selected_regions(pdev,
6155 pci_select_bars(pdev, IORESOURCE_MEM));
6156
6157 free_netdev(netdev);
6158
6159 /* AER disable */
6160 pci_disable_pcie_error_reporting(pdev);
6161
6162 pci_disable_device(pdev);
6163 }
6164
6165 /* PCI Error Recovery (ERS) */
6166 static struct pci_error_handlers e1000_err_handler = {
6167 .error_detected = e1000_io_error_detected,
6168 .slot_reset = e1000_io_slot_reset,
6169 .resume = e1000_io_resume,
6170 };
6171
6172 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6173 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6174 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6175 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6176 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6177 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6178 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6179 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6180 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6181 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6182
6183 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6184 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6185 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6186 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6187
6188 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6189 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6190 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6191
6192 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6193 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6194 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6195
6196 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6197 board_80003es2lan },
6198 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6199 board_80003es2lan },
6200 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6201 board_80003es2lan },
6202 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6203 board_80003es2lan },
6204
6205 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6206 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6207 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6208 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6209 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6210 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6211 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
6212 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
6213
6214 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6215 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6216 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6217 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6218 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
6219 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
6220 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6221 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6222 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6223
6224 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6225 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6226 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
6227
6228 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6229 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
6230 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
6231
6232 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6233 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6234 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6235 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6236
6237 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6238 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6239
6240 { } /* terminate list */
6241 };
6242 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6243
6244 #ifdef CONFIG_PM
6245 static const struct dev_pm_ops e1000_pm_ops = {
6246 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6247 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6248 e1000_runtime_resume, e1000_idle)
6249 };
6250 #endif
6251
6252 /* PCI Device API Driver */
6253 static struct pci_driver e1000_driver = {
6254 .name = e1000e_driver_name,
6255 .id_table = e1000_pci_tbl,
6256 .probe = e1000_probe,
6257 .remove = __devexit_p(e1000_remove),
6258 #ifdef CONFIG_PM
6259 .driver.pm = &e1000_pm_ops,
6260 #endif
6261 .shutdown = e1000_shutdown,
6262 .err_handler = &e1000_err_handler
6263 };
6264
6265 /**
6266 * e1000_init_module - Driver Registration Routine
6267 *
6268 * e1000_init_module is the first routine called when the driver is
6269 * loaded. All it does is register with the PCI subsystem.
6270 **/
6271 static int __init e1000_init_module(void)
6272 {
6273 int ret;
6274 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6275 e1000e_driver_version);
6276 pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n");
6277 ret = pci_register_driver(&e1000_driver);
6278
6279 return ret;
6280 }
6281 module_init(e1000_init_module);
6282
6283 /**
6284 * e1000_exit_module - Driver Exit Cleanup Routine
6285 *
6286 * e1000_exit_module is called just before the driver is removed
6287 * from memory.
6288 **/
6289 static void __exit e1000_exit_module(void)
6290 {
6291 pci_unregister_driver(&e1000_driver);
6292 }
6293 module_exit(e1000_exit_module);
6294
6295
6296 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6297 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6298 MODULE_LICENSE("GPL");
6299 MODULE_VERSION(DRV_VERSION);
6300
6301 /* e1000_main.c */
CRIS linux kernel tree