2 * Panasonic MN88472 DVB-T/T2/C demodulator driver
4 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include "mn88472_priv.h"
19 static int mn88472_get_tune_settings(struct dvb_frontend
*fe
,
20 struct dvb_frontend_tune_settings
*s
)
22 s
->min_delay_ms
= 1000;
26 static int mn88472_read_status(struct dvb_frontend
*fe
, enum fe_status
*status
)
28 struct i2c_client
*client
= fe
->demodulator_priv
;
29 struct mn88472_dev
*dev
= i2c_get_clientdata(client
);
30 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
39 switch (c
->delivery_system
) {
41 ret
= regmap_read(dev
->regmap
[0], 0x7f, &utmp
);
44 if ((utmp
& 0x0f) >= 0x09)
45 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
46 FE_HAS_VITERBI
| FE_HAS_SYNC
| FE_HAS_LOCK
;
51 ret
= regmap_read(dev
->regmap
[2], 0x92, &utmp
);
54 if ((utmp
& 0x0f) >= 0x0d)
55 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
56 FE_HAS_VITERBI
| FE_HAS_SYNC
| FE_HAS_LOCK
;
57 else if ((utmp
& 0x0f) >= 0x0a)
58 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
60 else if ((utmp
& 0x0f) >= 0x07)
61 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
;
65 case SYS_DVBC_ANNEX_A
:
66 ret
= regmap_read(dev
->regmap
[1], 0x84, &utmp
);
69 if ((utmp
& 0x0f) >= 0x08)
70 *status
= FE_HAS_SIGNAL
| FE_HAS_CARRIER
|
71 FE_HAS_VITERBI
| FE_HAS_SYNC
| FE_HAS_LOCK
;
82 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
86 static int mn88472_set_frontend(struct dvb_frontend
*fe
)
88 struct i2c_client
*client
= fe
->demodulator_priv
;
89 struct mn88472_dev
*dev
= i2c_get_clientdata(client
);
90 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
94 u8 buf
[3], delivery_system_val
, bandwidth_val
, *bandwidth_vals_ptr
;
95 u8 reg_bank0_b4_val
, reg_bank0_cd_val
, reg_bank0_d4_val
;
99 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
100 c
->delivery_system
, c
->modulation
, c
->frequency
,
101 c
->bandwidth_hz
, c
->symbol_rate
, c
->inversion
, c
->stream_id
);
108 switch (c
->delivery_system
) {
110 delivery_system_val
= 0x02;
111 reg_bank0_b4_val
= 0x00;
112 reg_bank0_cd_val
= 0x1f;
113 reg_bank0_d4_val
= 0x0a;
114 reg_bank0_d6_val
= 0x48;
117 delivery_system_val
= 0x03;
118 reg_bank0_b4_val
= 0xf6;
119 reg_bank0_cd_val
= 0x01;
120 reg_bank0_d4_val
= 0x09;
121 reg_bank0_d6_val
= 0x46;
123 case SYS_DVBC_ANNEX_A
:
124 delivery_system_val
= 0x04;
125 reg_bank0_b4_val
= 0x00;
126 reg_bank0_cd_val
= 0x17;
127 reg_bank0_d4_val
= 0x09;
128 reg_bank0_d6_val
= 0x48;
135 switch (c
->delivery_system
) {
138 switch (c
->bandwidth_hz
) {
140 bandwidth_vals_ptr
= "\xe5\x99\x9a\x1b\xa9\x1b\xa9";
141 bandwidth_val
= 0x03;
144 bandwidth_vals_ptr
= "\xbf\x55\x55\x15\x6b\x15\x6b";
145 bandwidth_val
= 0x02;
148 bandwidth_vals_ptr
= "\xa4\x00\x00\x0f\x2c\x0f\x2c";
149 bandwidth_val
= 0x01;
152 bandwidth_vals_ptr
= "\x8f\x80\x00\x08\xee\x08\xee";
153 bandwidth_val
= 0x00;
160 case SYS_DVBC_ANNEX_A
:
161 bandwidth_vals_ptr
= NULL
;
162 bandwidth_val
= 0x00;
169 if (fe
->ops
.tuner_ops
.set_params
) {
170 ret
= fe
->ops
.tuner_ops
.set_params(fe
);
175 if (fe
->ops
.tuner_ops
.get_if_frequency
) {
176 ret
= fe
->ops
.tuner_ops
.get_if_frequency(fe
, &if_frequency
);
180 dev_dbg(&client
->dev
, "get_if_frequency=%d\n", if_frequency
);
186 ret
= regmap_write(dev
->regmap
[2], 0x00, 0x66);
189 ret
= regmap_write(dev
->regmap
[2], 0x01, 0x00);
192 ret
= regmap_write(dev
->regmap
[2], 0x02, 0x01);
195 ret
= regmap_write(dev
->regmap
[2], 0x03, delivery_system_val
);
198 ret
= regmap_write(dev
->regmap
[2], 0x04, bandwidth_val
);
203 utmp
= DIV_ROUND_CLOSEST_ULL((u64
)if_frequency
* 0x1000000, dev
->clk
);
204 buf
[0] = (utmp
>> 16) & 0xff;
205 buf
[1] = (utmp
>> 8) & 0xff;
206 buf
[2] = (utmp
>> 0) & 0xff;
207 for (i
= 0; i
< 3; i
++) {
208 ret
= regmap_write(dev
->regmap
[2], 0x10 + i
, buf
[i
]);
214 if (bandwidth_vals_ptr
) {
215 for (i
= 0; i
< 7; i
++) {
216 ret
= regmap_write(dev
->regmap
[2], 0x13 + i
,
217 bandwidth_vals_ptr
[i
]);
223 ret
= regmap_write(dev
->regmap
[0], 0xb4, reg_bank0_b4_val
);
226 ret
= regmap_write(dev
->regmap
[0], 0xcd, reg_bank0_cd_val
);
229 ret
= regmap_write(dev
->regmap
[0], 0xd4, reg_bank0_d4_val
);
232 ret
= regmap_write(dev
->regmap
[0], 0xd6, reg_bank0_d6_val
);
236 switch (c
->delivery_system
) {
238 ret
= regmap_write(dev
->regmap
[0], 0x07, 0x26);
241 ret
= regmap_write(dev
->regmap
[0], 0x00, 0xba);
244 ret
= regmap_write(dev
->regmap
[0], 0x01, 0x13);
249 ret
= regmap_write(dev
->regmap
[2], 0x2b, 0x13);
252 ret
= regmap_write(dev
->regmap
[2], 0x4f, 0x05);
255 ret
= regmap_write(dev
->regmap
[1], 0xf6, 0x05);
258 ret
= regmap_write(dev
->regmap
[2], 0x32, c
->stream_id
);
262 case SYS_DVBC_ANNEX_A
:
269 ret
= regmap_write(dev
->regmap
[2], 0xf8, 0x9f);
275 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
279 static int mn88472_init(struct dvb_frontend
*fe
)
281 struct i2c_client
*client
= fe
->demodulator_priv
;
282 struct mn88472_dev
*dev
= i2c_get_clientdata(client
);
285 const struct firmware
*firmware
;
286 const char *name
= MN88472_FIRMWARE
;
288 dev_dbg(&client
->dev
, "\n");
291 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x00);
294 ret
= regmap_write(dev
->regmap
[2], 0x0b, 0x00);
297 ret
= regmap_write(dev
->regmap
[2], 0x0c, 0x00);
301 /* Check if firmware is already running */
302 ret
= regmap_read(dev
->regmap
[0], 0xf5, &utmp
);
308 ret
= request_firmware(&firmware
, name
, &client
->dev
);
310 dev_err(&client
->dev
, "firmware file '%s' not found\n", name
);
314 dev_info(&client
->dev
, "downloading firmware from file '%s'\n", name
);
316 ret
= regmap_write(dev
->regmap
[0], 0xf5, 0x03);
318 goto err_release_firmware
;
320 for (rem
= firmware
->size
; rem
> 0; rem
-= (dev
->i2c_write_max
- 1)) {
321 len
= min(dev
->i2c_write_max
- 1, rem
);
322 ret
= regmap_bulk_write(dev
->regmap
[0], 0xf6,
323 &firmware
->data
[firmware
->size
- rem
],
326 dev_err(&client
->dev
, "firmware download failed %d\n",
328 goto err_release_firmware
;
332 /* Parity check of firmware */
333 ret
= regmap_read(dev
->regmap
[0], 0xf8, &utmp
);
335 goto err_release_firmware
;
338 dev_err(&client
->dev
, "firmware did not run\n");
339 goto err_release_firmware
;
342 ret
= regmap_write(dev
->regmap
[0], 0xf5, 0x00);
344 goto err_release_firmware
;
346 release_firmware(firmware
);
349 switch (dev
->ts_mode
) {
353 case PARALLEL_TS_MODE
:
360 ret
= regmap_write(dev
->regmap
[2], 0x08, utmp
);
364 switch (dev
->ts_clk
) {
365 case VARIABLE_TS_CLOCK
:
375 ret
= regmap_write(dev
->regmap
[0], 0xd9, utmp
);
382 err_release_firmware
:
383 release_firmware(firmware
);
385 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
389 static int mn88472_sleep(struct dvb_frontend
*fe
)
391 struct i2c_client
*client
= fe
->demodulator_priv
;
392 struct mn88472_dev
*dev
= i2c_get_clientdata(client
);
395 dev_dbg(&client
->dev
, "\n");
398 ret
= regmap_write(dev
->regmap
[2], 0x0c, 0x30);
401 ret
= regmap_write(dev
->regmap
[2], 0x0b, 0x30);
404 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x3e);
410 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
414 static struct dvb_frontend_ops mn88472_ops
= {
415 .delsys
= {SYS_DVBT
, SYS_DVBT2
, SYS_DVBC_ANNEX_A
},
417 .name
= "Panasonic MN88472",
418 .symbol_rate_min
= 1000000,
419 .symbol_rate_max
= 7200000,
420 .caps
= FE_CAN_FEC_1_2
|
433 FE_CAN_TRANSMISSION_MODE_AUTO
|
434 FE_CAN_GUARD_INTERVAL_AUTO
|
435 FE_CAN_HIERARCHY_AUTO
|
437 FE_CAN_2G_MODULATION
|
441 .get_tune_settings
= mn88472_get_tune_settings
,
443 .init
= mn88472_init
,
444 .sleep
= mn88472_sleep
,
446 .set_frontend
= mn88472_set_frontend
,
448 .read_status
= mn88472_read_status
,
451 static struct dvb_frontend
*mn88472_get_dvb_frontend(struct i2c_client
*client
)
453 struct mn88472_dev
*dev
= i2c_get_clientdata(client
);
455 dev_dbg(&client
->dev
, "\n");
460 static int mn88472_probe(struct i2c_client
*client
,
461 const struct i2c_device_id
*id
)
463 struct mn88472_config
*pdata
= client
->dev
.platform_data
;
464 struct mn88472_dev
*dev
;
467 static const struct regmap_config regmap_config
= {
472 dev_dbg(&client
->dev
, "\n");
474 dev
= kzalloc(sizeof(*dev
), GFP_KERNEL
);
480 dev
->i2c_write_max
= pdata
->i2c_wr_max
? pdata
->i2c_wr_max
: ~0;
481 dev
->clk
= pdata
->xtal
;
482 dev
->ts_mode
= pdata
->ts_mode
;
483 dev
->ts_clk
= pdata
->ts_clock
;
484 dev
->client
[0] = client
;
485 dev
->regmap
[0] = regmap_init_i2c(dev
->client
[0], ®map_config
);
486 if (IS_ERR(dev
->regmap
[0])) {
487 ret
= PTR_ERR(dev
->regmap
[0]);
491 /* Check demod answers with correct chip id */
492 ret
= regmap_read(dev
->regmap
[0], 0xff, &utmp
);
494 goto err_regmap_0_regmap_exit
;
496 dev_dbg(&client
->dev
, "chip id=%02x\n", utmp
);
500 goto err_regmap_0_regmap_exit
;
504 * Chip has three I2C addresses for different register banks. Used
505 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
506 * 0x1a and 0x1c, in order to get own I2C client for each register bank.
508 * Also, register bank 2 do not support sequential I/O. Only single
509 * register write or read is allowed to that bank.
511 dev
->client
[1] = i2c_new_dummy(client
->adapter
, 0x1a);
512 if (!dev
->client
[1]) {
514 dev_err(&client
->dev
, "I2C registration failed\n");
516 goto err_regmap_0_regmap_exit
;
518 dev
->regmap
[1] = regmap_init_i2c(dev
->client
[1], ®map_config
);
519 if (IS_ERR(dev
->regmap
[1])) {
520 ret
= PTR_ERR(dev
->regmap
[1]);
521 goto err_client_1_i2c_unregister_device
;
523 i2c_set_clientdata(dev
->client
[1], dev
);
525 dev
->client
[2] = i2c_new_dummy(client
->adapter
, 0x1c);
526 if (!dev
->client
[2]) {
528 dev_err(&client
->dev
, "2nd I2C registration failed\n");
530 goto err_regmap_1_regmap_exit
;
532 dev
->regmap
[2] = regmap_init_i2c(dev
->client
[2], ®map_config
);
533 if (IS_ERR(dev
->regmap
[2])) {
534 ret
= PTR_ERR(dev
->regmap
[2]);
535 goto err_client_2_i2c_unregister_device
;
537 i2c_set_clientdata(dev
->client
[2], dev
);
539 /* Sleep because chip is active by default */
540 ret
= regmap_write(dev
->regmap
[2], 0x05, 0x3e);
542 goto err_regmap_2_regmap_exit
;
544 /* Create dvb frontend */
545 memcpy(&dev
->fe
.ops
, &mn88472_ops
, sizeof(struct dvb_frontend_ops
));
546 dev
->fe
.demodulator_priv
= client
;
547 *pdata
->fe
= &dev
->fe
;
548 i2c_set_clientdata(client
, dev
);
550 /* Setup callbacks */
551 pdata
->get_dvb_frontend
= mn88472_get_dvb_frontend
;
553 dev_info(&client
->dev
, "Panasonic MN88472 successfully identified\n");
556 err_regmap_2_regmap_exit
:
557 regmap_exit(dev
->regmap
[2]);
558 err_client_2_i2c_unregister_device
:
559 i2c_unregister_device(dev
->client
[2]);
560 err_regmap_1_regmap_exit
:
561 regmap_exit(dev
->regmap
[1]);
562 err_client_1_i2c_unregister_device
:
563 i2c_unregister_device(dev
->client
[1]);
564 err_regmap_0_regmap_exit
:
565 regmap_exit(dev
->regmap
[0]);
569 dev_dbg(&client
->dev
, "failed=%d\n", ret
);
573 static int mn88472_remove(struct i2c_client
*client
)
575 struct mn88472_dev
*dev
= i2c_get_clientdata(client
);
577 dev_dbg(&client
->dev
, "\n");
579 regmap_exit(dev
->regmap
[2]);
580 i2c_unregister_device(dev
->client
[2]);
582 regmap_exit(dev
->regmap
[1]);
583 i2c_unregister_device(dev
->client
[1]);
585 regmap_exit(dev
->regmap
[0]);
592 static const struct i2c_device_id mn88472_id_table
[] = {
596 MODULE_DEVICE_TABLE(i2c
, mn88472_id_table
);
598 static struct i2c_driver mn88472_driver
= {
601 .suppress_bind_attrs
= true,
603 .probe
= mn88472_probe
,
604 .remove
= mn88472_remove
,
605 .id_table
= mn88472_id_table
,
608 module_i2c_driver(mn88472_driver
);
610 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
611 MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver");
612 MODULE_LICENSE("GPL");
613 MODULE_FIRMWARE(MN88472_FIRMWARE
);