4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2009 Magnus Damm
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Based on "Compaq ASIC3 support":
14 * Copyright 2001 Compaq Computer Corporation.
15 * Copyright 2004-2005 Phil Blundell
16 * Copyright 2007-2008 OpenedHand Ltd.
18 * Authors: Phil Blundell <pb@handhelds.org>,
19 * Samuel Ortiz <sameo@openedhand.com>
23 #include <linux/kernel.h>
24 #include <linux/clk.h>
25 #include <linux/slab.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/platform_device.h>
30 #include <linux/mmc/host.h>
31 #include <linux/mfd/tmio.h>
32 #include <linux/sh_dma.h>
33 #include <linux/delay.h>
34 #include <linux/pinctrl/consumer.h>
35 #include <linux/pinctrl/pinctrl-state.h>
36 #include <linux/regulator/consumer.h>
42 #define SDHI_VER_GEN2_SDR50 0x490c
43 /* very old datasheets said 0x490c for SDR104, too. They are wrong! */
44 #define SDHI_VER_GEN2_SDR104 0xcb0d
45 #define SDHI_VER_GEN3_SD 0xcc10
46 #define SDHI_VER_GEN3_SDMMC 0xcd10
48 #define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
50 struct sh_mobile_sdhi_of_data
{
51 unsigned long tmio_flags
;
52 unsigned long capabilities
;
53 unsigned long capabilities2
;
54 enum dma_slave_buswidth dma_buswidth
;
55 dma_addr_t dma_rx_offset
;
59 static const struct sh_mobile_sdhi_of_data of_default_cfg
= {
60 .tmio_flags
= TMIO_MMC_HAS_IDLE_WAIT
,
63 static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible
= {
64 .tmio_flags
= TMIO_MMC_HAS_IDLE_WAIT
| TMIO_MMC_WRPROTECT_DISABLE
|
66 .capabilities
= MMC_CAP_SD_HIGHSPEED
| MMC_CAP_SDIO_IRQ
,
69 static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible
= {
70 .tmio_flags
= TMIO_MMC_HAS_IDLE_WAIT
| TMIO_MMC_WRPROTECT_DISABLE
|
71 TMIO_MMC_CLK_ACTUAL
| TMIO_MMC_MIN_RCAR2
,
72 .capabilities
= MMC_CAP_SD_HIGHSPEED
| MMC_CAP_SDIO_IRQ
,
73 .dma_buswidth
= DMA_SLAVE_BUSWIDTH_4_BYTES
,
74 .dma_rx_offset
= 0x2000,
77 static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible
= {
78 .tmio_flags
= TMIO_MMC_HAS_IDLE_WAIT
| TMIO_MMC_WRPROTECT_DISABLE
|
79 TMIO_MMC_CLK_ACTUAL
| TMIO_MMC_MIN_RCAR2
,
80 .capabilities
= MMC_CAP_SD_HIGHSPEED
| MMC_CAP_SDIO_IRQ
,
84 static const struct of_device_id sh_mobile_sdhi_of_match
[] = {
85 { .compatible
= "renesas,sdhi-shmobile" },
86 { .compatible
= "renesas,sdhi-sh73a0", .data
= &of_default_cfg
, },
87 { .compatible
= "renesas,sdhi-r8a73a4", .data
= &of_default_cfg
, },
88 { .compatible
= "renesas,sdhi-r8a7740", .data
= &of_default_cfg
, },
89 { .compatible
= "renesas,sdhi-r8a7778", .data
= &of_rcar_gen1_compatible
, },
90 { .compatible
= "renesas,sdhi-r8a7779", .data
= &of_rcar_gen1_compatible
, },
91 { .compatible
= "renesas,sdhi-r8a7790", .data
= &of_rcar_gen2_compatible
, },
92 { .compatible
= "renesas,sdhi-r8a7791", .data
= &of_rcar_gen2_compatible
, },
93 { .compatible
= "renesas,sdhi-r8a7792", .data
= &of_rcar_gen2_compatible
, },
94 { .compatible
= "renesas,sdhi-r8a7793", .data
= &of_rcar_gen2_compatible
, },
95 { .compatible
= "renesas,sdhi-r8a7794", .data
= &of_rcar_gen2_compatible
, },
96 { .compatible
= "renesas,sdhi-r8a7795", .data
= &of_rcar_gen3_compatible
, },
99 MODULE_DEVICE_TABLE(of
, sh_mobile_sdhi_of_match
);
101 struct sh_mobile_sdhi
{
103 struct tmio_mmc_data mmc_data
;
104 struct tmio_mmc_dma dma_priv
;
105 struct pinctrl
*pinctrl
;
106 struct pinctrl_state
*pins_default
, *pins_uhs
;
109 static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host
*host
, int width
)
115 * sh_mobile_sdhi_of_data :: dma_buswidth
117 switch (sd_ctrl_read16(host
, CTL_VERSION
)) {
118 case SDHI_VER_GEN2_SDR50
:
119 val
= (width
== 32) ? 0x0001 : 0x0000;
121 case SDHI_VER_GEN2_SDR104
:
122 val
= (width
== 32) ? 0x0000 : 0x0001;
124 case SDHI_VER_GEN3_SD
:
125 case SDHI_VER_GEN3_SDMMC
:
128 else if (width
== 32)
138 sd_ctrl_write16(host
, EXT_ACC
, val
);
141 static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host
*host
)
143 struct mmc_host
*mmc
= host
->mmc
;
144 struct sh_mobile_sdhi
*priv
= host_to_priv(host
);
145 int ret
= clk_prepare_enable(priv
->clk
);
150 * The clock driver may not know what maximum frequency
151 * actually works, so it should be set with the max-frequency
152 * property which will already have been read to f_max. If it
153 * was missing, assume the current frequency is the maximum.
156 mmc
->f_max
= clk_get_rate(priv
->clk
);
159 * Minimum frequency is the minimum input clock frequency
160 * divided by our maximum divider.
162 mmc
->f_min
= max(clk_round_rate(priv
->clk
, 1) / 512, 1L);
164 /* enable 16bit data access on SDBUF as default */
165 sh_mobile_sdhi_sdbuf_width(host
, 16);
170 static unsigned int sh_mobile_sdhi_clk_update(struct tmio_mmc_host
*host
,
171 unsigned int new_clock
)
173 struct sh_mobile_sdhi
*priv
= host_to_priv(host
);
174 unsigned int freq
, diff
, best_freq
= 0, diff_min
= ~0;
177 /* tested only on RCar Gen2+ currently; may work for others */
178 if (!(host
->pdata
->flags
& TMIO_MMC_MIN_RCAR2
))
179 return clk_get_rate(priv
->clk
);
182 * We want the bus clock to be as close as possible to, but no
183 * greater than, new_clock. As we can divide by 1 << i for
184 * any i in [0, 9] we want the input clock to be as close as
185 * possible, but no greater than, new_clock << i.
187 for (i
= min(9, ilog2(UINT_MAX
/ new_clock
)); i
>= 0; i
--) {
188 freq
= clk_round_rate(priv
->clk
, new_clock
<< i
);
189 if (freq
> (new_clock
<< i
)) {
190 /* Too fast; look for a slightly slower option */
191 freq
= clk_round_rate(priv
->clk
,
192 (new_clock
<< i
) / 4 * 3);
193 if (freq
> (new_clock
<< i
))
197 diff
= new_clock
- (freq
>> i
);
198 if (diff
<= diff_min
) {
204 ret
= clk_set_rate(priv
->clk
, best_freq
);
206 return ret
== 0 ? best_freq
: clk_get_rate(priv
->clk
);
209 static void sh_mobile_sdhi_clk_disable(struct tmio_mmc_host
*host
)
211 struct sh_mobile_sdhi
*priv
= host_to_priv(host
);
213 clk_disable_unprepare(priv
->clk
);
216 static int sh_mobile_sdhi_start_signal_voltage_switch(struct mmc_host
*mmc
,
219 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
220 struct sh_mobile_sdhi
*priv
= host_to_priv(host
);
221 struct pinctrl_state
*pin_state
;
224 switch (ios
->signal_voltage
) {
225 case MMC_SIGNAL_VOLTAGE_330
:
226 pin_state
= priv
->pins_default
;
228 case MMC_SIGNAL_VOLTAGE_180
:
229 pin_state
= priv
->pins_uhs
;
236 * If anything is missing, assume signal voltage is fixed at
237 * 3.3V and succeed/fail accordingly.
239 if (IS_ERR(priv
->pinctrl
) || IS_ERR(pin_state
))
240 return ios
->signal_voltage
==
241 MMC_SIGNAL_VOLTAGE_330
? 0 : -EINVAL
;
243 ret
= mmc_regulator_set_vqmmc(host
->mmc
, ios
);
247 return pinctrl_select_state(priv
->pinctrl
, pin_state
);
250 static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host
*host
)
254 while (--timeout
&& !(sd_ctrl_read16_and_16_as_32(host
, CTL_STATUS
)
255 & TMIO_STAT_SCLKDIVEN
))
259 dev_warn(&host
->pdev
->dev
, "timeout waiting for SD bus idle\n");
266 static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host
*host
, int addr
)
271 case CTL_STOP_INTERNAL_ACTION
:
272 case CTL_XFER_BLK_COUNT
:
273 case CTL_SD_CARD_CLK_CTL
:
274 case CTL_SD_XFER_LEN
:
275 case CTL_SD_MEM_CARD_OPT
:
276 case CTL_TRANSACTION_CTL
:
279 return sh_mobile_sdhi_wait_idle(host
);
285 static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card
*card
,
286 unsigned int direction
, int blk_size
)
289 * In Renesas controllers, when performing a
290 * multiple block read of one or two blocks,
291 * depending on the timing with which the
292 * response register is read, the response
293 * value may not be read properly.
294 * Use single block read for this HW bug
296 if ((direction
== MMC_DATA_READ
) &&
303 static void sh_mobile_sdhi_enable_dma(struct tmio_mmc_host
*host
, bool enable
)
305 sd_ctrl_write16(host
, CTL_DMA_ENABLE
, enable
? 2 : 0);
307 /* enable 32bit access if DMA mode if possibile */
308 sh_mobile_sdhi_sdbuf_width(host
, enable
? 32 : 16);
311 static int sh_mobile_sdhi_probe(struct platform_device
*pdev
)
313 const struct of_device_id
*of_id
=
314 of_match_device(sh_mobile_sdhi_of_match
, &pdev
->dev
);
315 struct sh_mobile_sdhi
*priv
;
316 struct tmio_mmc_data
*mmc_data
;
317 struct tmio_mmc_data
*mmd
= pdev
->dev
.platform_data
;
318 struct tmio_mmc_host
*host
;
319 struct resource
*res
;
321 struct tmio_mmc_dma
*dma_priv
;
323 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
327 priv
= devm_kzalloc(&pdev
->dev
, sizeof(struct sh_mobile_sdhi
), GFP_KERNEL
);
331 mmc_data
= &priv
->mmc_data
;
332 dma_priv
= &priv
->dma_priv
;
334 priv
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
335 if (IS_ERR(priv
->clk
)) {
336 ret
= PTR_ERR(priv
->clk
);
337 dev_err(&pdev
->dev
, "cannot get clock: %d\n", ret
);
341 priv
->pinctrl
= devm_pinctrl_get(&pdev
->dev
);
342 if (!IS_ERR(priv
->pinctrl
)) {
343 priv
->pins_default
= pinctrl_lookup_state(priv
->pinctrl
,
344 PINCTRL_STATE_DEFAULT
);
345 priv
->pins_uhs
= pinctrl_lookup_state(priv
->pinctrl
,
349 host
= tmio_mmc_host_alloc(pdev
);
355 if (of_id
&& of_id
->data
) {
356 const struct sh_mobile_sdhi_of_data
*of_data
= of_id
->data
;
358 mmc_data
->flags
|= of_data
->tmio_flags
;
359 mmc_data
->capabilities
|= of_data
->capabilities
;
360 mmc_data
->capabilities2
|= of_data
->capabilities2
;
361 mmc_data
->dma_rx_offset
= of_data
->dma_rx_offset
;
362 dma_priv
->dma_buswidth
= of_data
->dma_buswidth
;
363 host
->bus_shift
= of_data
->bus_shift
;
366 host
->dma
= dma_priv
;
367 host
->write16_hook
= sh_mobile_sdhi_write16_hook
;
368 host
->clk_enable
= sh_mobile_sdhi_clk_enable
;
369 host
->clk_update
= sh_mobile_sdhi_clk_update
;
370 host
->clk_disable
= sh_mobile_sdhi_clk_disable
;
371 host
->multi_io_quirk
= sh_mobile_sdhi_multi_io_quirk
;
372 host
->start_signal_voltage_switch
= sh_mobile_sdhi_start_signal_voltage_switch
;
374 /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
375 if (!host
->bus_shift
&& resource_size(res
) > 0x100) /* old way to determine the shift */
381 dma_priv
->filter
= shdma_chan_filter
;
382 dma_priv
->enable
= sh_mobile_sdhi_enable_dma
;
384 mmc_data
->alignment_shift
= 1; /* 2-byte alignment */
385 mmc_data
->capabilities
|= MMC_CAP_MMC_HIGHSPEED
;
388 * All SDHI blocks support 2-byte and larger block sizes in 4-bit
391 mmc_data
->flags
|= TMIO_MMC_BLKSZ_2BYTES
;
394 * All SDHI blocks support SDIO IRQ signalling.
396 mmc_data
->flags
|= TMIO_MMC_SDIO_IRQ
;
399 * All SDHI have CMD12 controll bit
401 mmc_data
->flags
|= TMIO_MMC_HAVE_CMD12_CTRL
;
404 * All SDHI need SDIO_INFO1 reserved bit
406 mmc_data
->flags
|= TMIO_MMC_SDIO_STATUS_QUIRK
;
408 ret
= tmio_mmc_host_probe(host
, mmc_data
);
413 irq
= platform_get_irq(pdev
, i
);
417 ret
= devm_request_irq(&pdev
->dev
, irq
, tmio_mmc_irq
, 0,
418 dev_name(&pdev
->dev
), host
);
423 /* There must be at least one IRQ source */
429 dev_info(&pdev
->dev
, "%s base at 0x%08lx max clock rate %u MHz\n",
430 mmc_hostname(host
->mmc
), (unsigned long)
431 (platform_get_resource(pdev
, IORESOURCE_MEM
, 0)->start
),
432 host
->mmc
->f_max
/ 1000000);
437 tmio_mmc_host_remove(host
);
439 tmio_mmc_host_free(host
);
444 static int sh_mobile_sdhi_remove(struct platform_device
*pdev
)
446 struct mmc_host
*mmc
= platform_get_drvdata(pdev
);
447 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
449 tmio_mmc_host_remove(host
);
454 static const struct dev_pm_ops tmio_mmc_dev_pm_ops
= {
455 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend
,
456 pm_runtime_force_resume
)
457 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend
,
458 tmio_mmc_host_runtime_resume
,
462 static struct platform_driver sh_mobile_sdhi_driver
= {
464 .name
= "sh_mobile_sdhi",
465 .pm
= &tmio_mmc_dev_pm_ops
,
466 .of_match_table
= sh_mobile_sdhi_of_match
,
468 .probe
= sh_mobile_sdhi_probe
,
469 .remove
= sh_mobile_sdhi_remove
,
472 module_platform_driver(sh_mobile_sdhi_driver
);
474 MODULE_DESCRIPTION("SuperH Mobile SDHI driver");
475 MODULE_AUTHOR("Magnus Damm");
476 MODULE_LICENSE("GPL v2");
477 MODULE_ALIAS("platform:sh_mobile_sdhi");