2 * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
3 * Copyright (c) 2008-2009 Marvell Semiconductor
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
11 #include <linux/delay.h>
12 #include <linux/jiffies.h>
13 #include <linux/list.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/phy.h>
18 #include "mv88e6060.h"
20 static int reg_read(struct dsa_switch
*ds
, int addr
, int reg
)
22 struct mv88e6060_priv
*priv
= ds_to_priv(ds
);
24 return mdiobus_read_nested(priv
->bus
, priv
->sw_addr
+ addr
, reg
);
27 #define REG_READ(addr, reg) \
31 __ret = reg_read(ds, addr, reg); \
38 static int reg_write(struct dsa_switch
*ds
, int addr
, int reg
, u16 val
)
40 struct mv88e6060_priv
*priv
= ds_to_priv(ds
);
42 return mdiobus_write_nested(priv
->bus
, priv
->sw_addr
+ addr
, reg
, val
);
45 #define REG_WRITE(addr, reg, val) \
49 __ret = reg_write(ds, addr, reg, val); \
54 static const char *mv88e6060_get_name(struct mii_bus
*bus
, int sw_addr
)
58 ret
= mdiobus_read(bus
, sw_addr
+ REG_PORT(0), PORT_SWITCH_ID
);
60 if (ret
== PORT_SWITCH_ID_6060
)
61 return "Marvell 88E6060 (A0)";
62 if (ret
== PORT_SWITCH_ID_6060_R1
||
63 ret
== PORT_SWITCH_ID_6060_R2
)
64 return "Marvell 88E6060 (B0)";
65 if ((ret
& PORT_SWITCH_ID_6060_MASK
) == PORT_SWITCH_ID_6060
)
66 return "Marvell 88E6060";
72 static const char *mv88e6060_drv_probe(struct device
*dsa_dev
,
73 struct device
*host_dev
, int sw_addr
,
76 struct mii_bus
*bus
= dsa_host_dev_to_mii_bus(host_dev
);
77 struct mv88e6060_priv
*priv
;
80 name
= mv88e6060_get_name(bus
, sw_addr
);
82 priv
= devm_kzalloc(dsa_dev
, sizeof(*priv
), GFP_KERNEL
);
87 priv
->sw_addr
= sw_addr
;
93 static int mv88e6060_switch_reset(struct dsa_switch
*ds
)
97 unsigned long timeout
;
99 /* Set all ports to the disabled state. */
100 for (i
= 0; i
< MV88E6060_PORTS
; i
++) {
101 ret
= REG_READ(REG_PORT(i
), PORT_CONTROL
);
102 REG_WRITE(REG_PORT(i
), PORT_CONTROL
,
103 ret
& ~PORT_CONTROL_STATE_MASK
);
106 /* Wait for transmit queues to drain. */
107 usleep_range(2000, 4000);
109 /* Reset the switch. */
110 REG_WRITE(REG_GLOBAL
, GLOBAL_ATU_CONTROL
,
111 GLOBAL_ATU_CONTROL_SWRESET
|
112 GLOBAL_ATU_CONTROL_ATUSIZE_1024
|
113 GLOBAL_ATU_CONTROL_ATE_AGE_5MIN
);
115 /* Wait up to one second for reset to complete. */
116 timeout
= jiffies
+ 1 * HZ
;
117 while (time_before(jiffies
, timeout
)) {
118 ret
= REG_READ(REG_GLOBAL
, GLOBAL_STATUS
);
119 if (ret
& GLOBAL_STATUS_INIT_READY
)
122 usleep_range(1000, 2000);
124 if (time_after(jiffies
, timeout
))
130 static int mv88e6060_setup_global(struct dsa_switch
*ds
)
132 /* Disable discarding of frames with excessive collisions,
133 * set the maximum frame size to 1536 bytes, and mask all
136 REG_WRITE(REG_GLOBAL
, GLOBAL_CONTROL
, GLOBAL_CONTROL_MAX_FRAME_1536
);
138 /* Enable automatic address learning, set the address
139 * database size to 1024 entries, and set the default aging
142 REG_WRITE(REG_GLOBAL
, GLOBAL_ATU_CONTROL
,
143 GLOBAL_ATU_CONTROL_ATUSIZE_1024
|
144 GLOBAL_ATU_CONTROL_ATE_AGE_5MIN
);
149 static int mv88e6060_setup_port(struct dsa_switch
*ds
, int p
)
151 int addr
= REG_PORT(p
);
153 /* Do not force flow control, disable Ingress and Egress
154 * Header tagging, disable VLAN tunneling, and set the port
155 * state to Forwarding. Additionally, if this is the CPU
156 * port, enable Ingress and Egress Trailer tagging mode.
158 REG_WRITE(addr
, PORT_CONTROL
,
159 dsa_is_cpu_port(ds
, p
) ?
160 PORT_CONTROL_TRAILER
|
161 PORT_CONTROL_INGRESS_MODE
|
162 PORT_CONTROL_STATE_FORWARDING
:
163 PORT_CONTROL_STATE_FORWARDING
);
165 /* Port based VLAN map: give each port its own address
166 * database, allow the CPU port to talk to each of the 'real'
167 * ports, and allow each of the 'real' ports to only talk to
170 REG_WRITE(addr
, PORT_VLAN_MAP
,
171 ((p
& 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT
) |
172 (dsa_is_cpu_port(ds
, p
) ?
173 ds
->enabled_port_mask
:
174 BIT(ds
->dst
->cpu_port
)));
176 /* Port Association Vector: when learning source addresses
177 * of packets, add the address to the address database using
178 * a port bitmap that has only the bit for this port set and
179 * the other bits clear.
181 REG_WRITE(addr
, PORT_ASSOC_VECTOR
, BIT(p
));
186 static int mv88e6060_setup(struct dsa_switch
*ds
)
191 ret
= mv88e6060_switch_reset(ds
);
195 /* @@@ initialise atu */
197 ret
= mv88e6060_setup_global(ds
);
201 for (i
= 0; i
< MV88E6060_PORTS
; i
++) {
202 ret
= mv88e6060_setup_port(ds
, i
);
210 static int mv88e6060_set_addr(struct dsa_switch
*ds
, u8
*addr
)
212 /* Use the same MAC Address as FD Pause frames for all ports */
213 REG_WRITE(REG_GLOBAL
, GLOBAL_MAC_01
, (addr
[0] << 9) | addr
[1]);
214 REG_WRITE(REG_GLOBAL
, GLOBAL_MAC_23
, (addr
[2] << 8) | addr
[3]);
215 REG_WRITE(REG_GLOBAL
, GLOBAL_MAC_45
, (addr
[4] << 8) | addr
[5]);
220 static int mv88e6060_port_to_phy_addr(int port
)
222 if (port
>= 0 && port
< MV88E6060_PORTS
)
227 static int mv88e6060_phy_read(struct dsa_switch
*ds
, int port
, int regnum
)
231 addr
= mv88e6060_port_to_phy_addr(port
);
235 return reg_read(ds
, addr
, regnum
);
239 mv88e6060_phy_write(struct dsa_switch
*ds
, int port
, int regnum
, u16 val
)
243 addr
= mv88e6060_port_to_phy_addr(port
);
247 return reg_write(ds
, addr
, regnum
, val
);
250 static struct dsa_switch_driver mv88e6060_switch_driver
= {
251 .tag_protocol
= DSA_TAG_PROTO_TRAILER
,
252 .probe
= mv88e6060_drv_probe
,
253 .setup
= mv88e6060_setup
,
254 .set_addr
= mv88e6060_set_addr
,
255 .phy_read
= mv88e6060_phy_read
,
256 .phy_write
= mv88e6060_phy_write
,
259 static int __init
mv88e6060_init(void)
261 register_switch_driver(&mv88e6060_switch_driver
);
264 module_init(mv88e6060_init
);
266 static void __exit
mv88e6060_cleanup(void)
268 unregister_switch_driver(&mv88e6060_switch_driver
);
270 module_exit(mv88e6060_cleanup
);
272 MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>");
273 MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
274 MODULE_LICENSE("GPL");
275 MODULE_ALIAS("platform:mv88e6060");