2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8
ath9k_parse_mpdudensity(u8 mpdudensity
)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity
) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc
*sc
, struct ath_txq
*txq
,
62 spin_lock_bh(&txq
->axq_lock
);
72 if (txq
->mac80211_qnum
>= 0) {
73 struct list_head
*list
;
75 list
= &sc
->cur_chan
->acq
[txq
->mac80211_qnum
];
76 if (!list_empty(list
))
80 spin_unlock_bh(&txq
->axq_lock
);
84 static bool ath9k_setpower(struct ath_softc
*sc
, enum ath9k_power_mode mode
)
89 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
90 ret
= ath9k_hw_setpower(sc
->sc_ah
, mode
);
91 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
96 void ath_ps_full_sleep(unsigned long data
)
98 struct ath_softc
*sc
= (struct ath_softc
*) data
;
99 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
102 spin_lock(&common
->cc_lock
);
103 ath_hw_cycle_counters_update(common
);
104 spin_unlock(&common
->cc_lock
);
106 ath9k_hw_setrxabort(sc
->sc_ah
, 1);
107 ath9k_hw_stopdmarecv(sc
->sc_ah
, &reset
);
109 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_FULL_SLEEP
);
112 void ath9k_ps_wakeup(struct ath_softc
*sc
)
114 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
116 enum ath9k_power_mode power_mode
;
118 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
119 if (++sc
->ps_usecount
!= 1)
122 del_timer_sync(&sc
->sleep_timer
);
123 power_mode
= sc
->sc_ah
->power_mode
;
124 ath9k_hw_setpower(sc
->sc_ah
, ATH9K_PM_AWAKE
);
127 * While the hardware is asleep, the cycle counters contain no
128 * useful data. Better clear them now so that they don't mess up
129 * survey data results.
131 if (power_mode
!= ATH9K_PM_AWAKE
) {
132 spin_lock(&common
->cc_lock
);
133 ath_hw_cycle_counters_update(common
);
134 memset(&common
->cc_survey
, 0, sizeof(common
->cc_survey
));
135 memset(&common
->cc_ani
, 0, sizeof(common
->cc_ani
));
136 spin_unlock(&common
->cc_lock
);
140 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
143 void ath9k_ps_restore(struct ath_softc
*sc
)
145 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
146 enum ath9k_power_mode mode
;
149 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
150 if (--sc
->ps_usecount
!= 0)
154 mod_timer(&sc
->sleep_timer
, jiffies
+ HZ
/ 10);
158 if (sc
->ps_enabled
&&
159 !(sc
->ps_flags
& (PS_WAIT_FOR_BEACON
|
161 PS_WAIT_FOR_PSPOLL_DATA
|
164 mode
= ATH9K_PM_NETWORK_SLEEP
;
165 if (ath9k_hw_btcoex_is_enabled(sc
->sc_ah
))
166 ath9k_btcoex_stop_gen_timer(sc
);
171 spin_lock(&common
->cc_lock
);
172 ath_hw_cycle_counters_update(common
);
173 spin_unlock(&common
->cc_lock
);
175 ath9k_hw_setpower(sc
->sc_ah
, mode
);
178 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
181 static void __ath_cancel_work(struct ath_softc
*sc
)
183 cancel_work_sync(&sc
->paprd_work
);
184 cancel_delayed_work_sync(&sc
->tx_complete_work
);
185 cancel_delayed_work_sync(&sc
->hw_pll_work
);
187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
188 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
))
189 cancel_work_sync(&sc
->mci_work
);
193 void ath_cancel_work(struct ath_softc
*sc
)
195 __ath_cancel_work(sc
);
196 cancel_work_sync(&sc
->hw_reset_work
);
199 void ath_restart_work(struct ath_softc
*sc
)
201 ieee80211_queue_delayed_work(sc
->hw
, &sc
->tx_complete_work
, 0);
203 if (AR_SREV_9340(sc
->sc_ah
) || AR_SREV_9330(sc
->sc_ah
))
204 ieee80211_queue_delayed_work(sc
->hw
, &sc
->hw_pll_work
,
205 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL
));
210 static bool ath_prepare_reset(struct ath_softc
*sc
)
212 struct ath_hw
*ah
= sc
->sc_ah
;
215 ieee80211_stop_queues(sc
->hw
);
217 ath9k_hw_disable_interrupts(ah
);
219 if (AR_SREV_9300_20_OR_LATER(ah
)) {
220 ret
&= ath_stoprecv(sc
);
221 ret
&= ath_drain_all_txq(sc
);
223 ret
&= ath_drain_all_txq(sc
);
224 ret
&= ath_stoprecv(sc
);
230 static bool ath_complete_reset(struct ath_softc
*sc
, bool start
)
232 struct ath_hw
*ah
= sc
->sc_ah
;
233 struct ath_common
*common
= ath9k_hw_common(ah
);
236 ath9k_calculate_summary_state(sc
, sc
->cur_chan
);
238 ath9k_cmn_update_txpow(ah
, sc
->cur_chan
->cur_txpower
,
239 sc
->cur_chan
->txpower
,
240 &sc
->cur_chan
->cur_txpower
);
241 clear_bit(ATH_OP_HW_RESET
, &common
->op_flags
);
243 if (!sc
->cur_chan
->offchannel
&& start
) {
244 /* restore per chanctx TSF timer */
245 if (sc
->cur_chan
->tsf_val
) {
248 offset
= ath9k_hw_get_tsf_offset(&sc
->cur_chan
->tsf_ts
,
250 ath9k_hw_settsf64(ah
, sc
->cur_chan
->tsf_val
+ offset
);
254 if (!test_bit(ATH_OP_BEACONS
, &common
->op_flags
))
257 if (ah
->opmode
== NL80211_IFTYPE_STATION
&&
258 test_bit(ATH_OP_PRIM_STA_VIF
, &common
->op_flags
)) {
259 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
260 sc
->ps_flags
|= PS_BEACON_SYNC
| PS_WAIT_FOR_BEACON
;
261 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
263 ath9k_set_beacon(sc
);
266 ath_restart_work(sc
);
267 ath_txq_schedule_all(sc
);
272 ath9k_hw_set_interrupts(ah
);
273 ath9k_hw_enable_interrupts(ah
);
274 ieee80211_wake_queues(sc
->hw
);
275 ath9k_p2p_ps_timer(sc
);
280 static int ath_reset_internal(struct ath_softc
*sc
, struct ath9k_channel
*hchan
)
282 struct ath_hw
*ah
= sc
->sc_ah
;
283 struct ath_common
*common
= ath9k_hw_common(ah
);
284 struct ath9k_hw_cal_data
*caldata
= NULL
;
288 __ath_cancel_work(sc
);
290 disable_irq(sc
->irq
);
291 tasklet_disable(&sc
->intr_tq
);
292 tasklet_disable(&sc
->bcon_tasklet
);
293 spin_lock_bh(&sc
->sc_pcu_lock
);
295 if (!sc
->cur_chan
->offchannel
) {
297 caldata
= &sc
->cur_chan
->caldata
;
305 if (!ath_prepare_reset(sc
))
308 if (ath9k_is_chanctx_enabled())
311 spin_lock_bh(&sc
->chan_lock
);
312 sc
->cur_chandef
= sc
->cur_chan
->chandef
;
313 spin_unlock_bh(&sc
->chan_lock
);
315 ath_dbg(common
, CONFIG
, "Reset to %u MHz, HT40: %d fastcc: %d\n",
316 hchan
->channel
, IS_CHAN_HT40(hchan
), fastcc
);
318 r
= ath9k_hw_reset(ah
, hchan
, caldata
, fastcc
);
321 "Unable to reset channel, reset status %d\n", r
);
323 ath9k_hw_enable_interrupts(ah
);
324 ath9k_queue_reset(sc
, RESET_TYPE_BB_HANG
);
329 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
) &&
330 sc
->cur_chan
->offchannel
)
331 ath9k_mci_set_txpower(sc
, true, false);
333 if (!ath_complete_reset(sc
, true))
338 spin_unlock_bh(&sc
->sc_pcu_lock
);
339 tasklet_enable(&sc
->bcon_tasklet
);
340 tasklet_enable(&sc
->intr_tq
);
345 static void ath_node_attach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
,
346 struct ieee80211_vif
*vif
)
349 an
= (struct ath_node
*)sta
->drv_priv
;
354 memset(&an
->key_idx
, 0, sizeof(an
->key_idx
));
356 ath_tx_node_init(sc
, an
);
358 ath_dynack_node_init(sc
->sc_ah
, an
);
361 static void ath_node_detach(struct ath_softc
*sc
, struct ieee80211_sta
*sta
)
363 struct ath_node
*an
= (struct ath_node
*)sta
->drv_priv
;
364 ath_tx_node_cleanup(sc
, an
);
366 ath_dynack_node_deinit(sc
->sc_ah
, an
);
369 void ath9k_tasklet(unsigned long data
)
371 struct ath_softc
*sc
= (struct ath_softc
*)data
;
372 struct ath_hw
*ah
= sc
->sc_ah
;
373 struct ath_common
*common
= ath9k_hw_common(ah
);
374 enum ath_reset_type type
;
376 u32 status
= sc
->intrstatus
;
380 spin_lock(&sc
->sc_pcu_lock
);
382 if (status
& ATH9K_INT_FATAL
) {
383 type
= RESET_TYPE_FATAL_INT
;
384 ath9k_queue_reset(sc
, type
);
387 * Increment the ref. counter here so that
388 * interrupts are enabled in the reset routine.
390 atomic_inc(&ah
->intr_ref_cnt
);
391 ath_dbg(common
, RESET
, "FATAL: Skipping interrupts\n");
395 if ((ah
->config
.hw_hang_checks
& HW_BB_WATCHDOG
) &&
396 (status
& ATH9K_INT_BB_WATCHDOG
)) {
397 spin_lock(&common
->cc_lock
);
398 ath_hw_cycle_counters_update(common
);
399 ar9003_hw_bb_watchdog_dbg_info(ah
);
400 spin_unlock(&common
->cc_lock
);
402 if (ar9003_hw_bb_watchdog_check(ah
)) {
403 type
= RESET_TYPE_BB_WATCHDOG
;
404 ath9k_queue_reset(sc
, type
);
407 * Increment the ref. counter here so that
408 * interrupts are enabled in the reset routine.
410 atomic_inc(&ah
->intr_ref_cnt
);
411 ath_dbg(common
, RESET
,
412 "BB_WATCHDOG: Skipping interrupts\n");
417 if (status
& ATH9K_INT_GTT
) {
420 if ((sc
->gtt_cnt
>= MAX_GTT_CNT
) && !ath9k_hw_check_alive(ah
)) {
421 type
= RESET_TYPE_TX_GTT
;
422 ath9k_queue_reset(sc
, type
);
423 atomic_inc(&ah
->intr_ref_cnt
);
424 ath_dbg(common
, RESET
,
425 "GTT: Skipping interrupts\n");
430 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
431 if ((status
& ATH9K_INT_TSFOOR
) && sc
->ps_enabled
) {
433 * TSF sync does not look correct; remain awake to sync with
436 ath_dbg(common
, PS
, "TSFOOR - Sync with next Beacon\n");
437 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
| PS_BEACON_SYNC
;
439 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
441 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
442 rxmask
= (ATH9K_INT_RXHP
| ATH9K_INT_RXLP
| ATH9K_INT_RXEOL
|
445 rxmask
= (ATH9K_INT_RX
| ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
447 if (status
& rxmask
) {
448 /* Check for high priority Rx first */
449 if ((ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) &&
450 (status
& ATH9K_INT_RXHP
))
451 ath_rx_tasklet(sc
, 0, true);
453 ath_rx_tasklet(sc
, 0, false);
456 if (status
& ATH9K_INT_TX
) {
457 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
) {
459 * For EDMA chips, TX completion is enabled for the
460 * beacon queue, so if a beacon has been transmitted
461 * successfully after a GTT interrupt, the GTT counter
462 * gets reset to zero here.
466 ath_tx_edma_tasklet(sc
);
471 wake_up(&sc
->tx_wait
);
474 if (status
& ATH9K_INT_GENTIMER
)
475 ath_gen_timer_isr(sc
->sc_ah
);
477 ath9k_btcoex_handle_interrupt(sc
, status
);
479 /* re-enable hardware interrupt */
480 ath9k_hw_enable_interrupts(ah
);
482 spin_unlock(&sc
->sc_pcu_lock
);
483 ath9k_ps_restore(sc
);
486 irqreturn_t
ath_isr(int irq
, void *dev
)
488 #define SCHED_INTR ( \
490 ATH9K_INT_BB_WATCHDOG | \
501 ATH9K_INT_GENTIMER | \
504 struct ath_softc
*sc
= dev
;
505 struct ath_hw
*ah
= sc
->sc_ah
;
506 struct ath_common
*common
= ath9k_hw_common(ah
);
507 enum ath9k_int status
;
512 * The hardware is not ready/present, don't
513 * touch anything. Note this can happen early
514 * on if the IRQ is shared.
516 if (!ah
|| test_bit(ATH_OP_INVALID
, &common
->op_flags
))
519 /* shared irq, not for us */
520 if (!ath9k_hw_intrpend(ah
))
524 * Figure out the reason(s) for the interrupt. Note
525 * that the hal returns a pseudo-ISR that may include
526 * bits we haven't explicitly enabled so we mask the
527 * value to insure we only process bits we requested.
529 ath9k_hw_getisr(ah
, &status
, &sync_cause
); /* NB: clears ISR too */
530 ath9k_debug_sync_cause(sc
, sync_cause
);
531 status
&= ah
->imask
; /* discard unasked-for bits */
533 if (test_bit(ATH_OP_HW_RESET
, &common
->op_flags
))
537 * If there are no status bits set, then this interrupt was not
538 * for me (should have been caught above).
543 /* Cache the status */
544 sc
->intrstatus
= status
;
546 if (status
& SCHED_INTR
)
550 * If a FATAL interrupt is received, we have to reset the chip
553 if (status
& ATH9K_INT_FATAL
)
556 if ((ah
->config
.hw_hang_checks
& HW_BB_WATCHDOG
) &&
557 (status
& ATH9K_INT_BB_WATCHDOG
))
560 if (status
& ATH9K_INT_SWBA
)
561 tasklet_schedule(&sc
->bcon_tasklet
);
563 if (status
& ATH9K_INT_TXURN
)
564 ath9k_hw_updatetxtriglevel(ah
, true);
566 if (status
& ATH9K_INT_RXEOL
) {
567 ah
->imask
&= ~(ATH9K_INT_RXEOL
| ATH9K_INT_RXORN
);
568 ath9k_hw_set_interrupts(ah
);
571 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
572 if (status
& ATH9K_INT_TIM_TIMER
) {
573 if (ATH_DBG_WARN_ON_ONCE(sc
->ps_idle
))
575 /* Clear RxAbort bit so that we can
577 ath9k_setpower(sc
, ATH9K_PM_AWAKE
);
578 spin_lock(&sc
->sc_pm_lock
);
579 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
580 sc
->ps_flags
|= PS_WAIT_FOR_BEACON
;
581 spin_unlock(&sc
->sc_pm_lock
);
586 ath_debug_stat_interrupt(sc
, status
);
589 /* turn off every interrupt */
590 ath9k_hw_disable_interrupts(ah
);
591 tasklet_schedule(&sc
->intr_tq
);
600 * This function is called when a HW reset cannot be deferred
601 * and has to be immediate.
603 int ath_reset(struct ath_softc
*sc
, struct ath9k_channel
*hchan
)
605 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
608 ath9k_hw_kill_interrupts(sc
->sc_ah
);
609 set_bit(ATH_OP_HW_RESET
, &common
->op_flags
);
612 r
= ath_reset_internal(sc
, hchan
);
613 ath9k_ps_restore(sc
);
619 * When a HW reset can be deferred, it is added to the
620 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
623 void ath9k_queue_reset(struct ath_softc
*sc
, enum ath_reset_type type
)
625 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
626 #ifdef CONFIG_ATH9K_DEBUGFS
627 RESET_STAT_INC(sc
, type
);
629 ath9k_hw_kill_interrupts(sc
->sc_ah
);
630 set_bit(ATH_OP_HW_RESET
, &common
->op_flags
);
631 ieee80211_queue_work(sc
->hw
, &sc
->hw_reset_work
);
634 void ath_reset_work(struct work_struct
*work
)
636 struct ath_softc
*sc
= container_of(work
, struct ath_softc
, hw_reset_work
);
639 ath_reset_internal(sc
, NULL
);
640 ath9k_ps_restore(sc
);
643 /**********************/
644 /* mac80211 callbacks */
645 /**********************/
647 static int ath9k_start(struct ieee80211_hw
*hw
)
649 struct ath_softc
*sc
= hw
->priv
;
650 struct ath_hw
*ah
= sc
->sc_ah
;
651 struct ath_common
*common
= ath9k_hw_common(ah
);
652 struct ieee80211_channel
*curchan
= sc
->cur_chan
->chandef
.chan
;
653 struct ath_chanctx
*ctx
= sc
->cur_chan
;
654 struct ath9k_channel
*init_channel
;
657 ath_dbg(common
, CONFIG
,
658 "Starting driver with initial channel: %d MHz\n",
659 curchan
->center_freq
);
662 mutex_lock(&sc
->mutex
);
664 init_channel
= ath9k_cmn_get_channel(hw
, ah
, &ctx
->chandef
);
665 sc
->cur_chandef
= hw
->conf
.chandef
;
667 /* Reset SERDES registers */
668 ath9k_hw_configpcipowersave(ah
, false);
671 * The basic interface to setting the hardware in a good
672 * state is ``reset''. On return the hardware is known to
673 * be powered up and with interrupts disabled. This must
674 * be followed by initialization of the appropriate bits
675 * and then setup of the interrupt mask.
677 spin_lock_bh(&sc
->sc_pcu_lock
);
679 atomic_set(&ah
->intr_ref_cnt
, -1);
681 r
= ath9k_hw_reset(ah
, init_channel
, ah
->caldata
, false);
684 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
685 r
, curchan
->center_freq
);
686 ah
->reset_power_on
= false;
689 /* Setup our intr mask. */
690 ah
->imask
= ATH9K_INT_TX
| ATH9K_INT_RXEOL
|
691 ATH9K_INT_RXORN
| ATH9K_INT_FATAL
|
694 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
)
695 ah
->imask
|= ATH9K_INT_RXHP
|
698 ah
->imask
|= ATH9K_INT_RX
;
700 if (ah
->config
.hw_hang_checks
& HW_BB_WATCHDOG
)
701 ah
->imask
|= ATH9K_INT_BB_WATCHDOG
;
704 * Enable GTT interrupts only for AR9003/AR9004 chips
707 if (AR_SREV_9300_20_OR_LATER(ah
))
708 ah
->imask
|= ATH9K_INT_GTT
;
710 if (ah
->caps
.hw_caps
& ATH9K_HW_CAP_HT
)
711 ah
->imask
|= ATH9K_INT_CST
;
715 clear_bit(ATH_OP_INVALID
, &common
->op_flags
);
716 sc
->sc_ah
->is_monitoring
= false;
718 if (!ath_complete_reset(sc
, false))
719 ah
->reset_power_on
= false;
721 if (ah
->led_pin
>= 0) {
722 ath9k_hw_set_gpio(ah
, ah
->led_pin
,
723 (ah
->config
.led_active_high
) ? 1 : 0);
724 ath9k_hw_gpio_request_out(ah
, ah
->led_pin
, NULL
,
725 AR_GPIO_OUTPUT_MUX_AS_OUTPUT
);
729 * Reset key cache to sane defaults (all entries cleared) instead of
730 * semi-random values after suspend/resume.
732 ath9k_cmn_init_crypto(sc
->sc_ah
);
734 ath9k_hw_reset_tsf(ah
);
736 spin_unlock_bh(&sc
->sc_pcu_lock
);
738 mutex_unlock(&sc
->mutex
);
740 ath9k_ps_restore(sc
);
747 static void ath9k_tx(struct ieee80211_hw
*hw
,
748 struct ieee80211_tx_control
*control
,
751 struct ath_softc
*sc
= hw
->priv
;
752 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
753 struct ath_tx_control txctl
;
754 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
757 if (sc
->ps_enabled
) {
759 * mac80211 does not set PM field for normal data frames, so we
760 * need to update that based on the current PS mode.
762 if (ieee80211_is_data(hdr
->frame_control
) &&
763 !ieee80211_is_nullfunc(hdr
->frame_control
) &&
764 !ieee80211_has_pm(hdr
->frame_control
)) {
766 "Add PM=1 for a TX frame while in PS mode\n");
767 hdr
->frame_control
|= cpu_to_le16(IEEE80211_FCTL_PM
);
771 if (unlikely(sc
->sc_ah
->power_mode
== ATH9K_PM_NETWORK_SLEEP
)) {
773 * We are using PS-Poll and mac80211 can request TX while in
774 * power save mode. Need to wake up hardware for the TX to be
775 * completed and if needed, also for RX of buffered frames.
778 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
779 if (!(sc
->sc_ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
))
780 ath9k_hw_setrxabort(sc
->sc_ah
, 0);
781 if (ieee80211_is_pspoll(hdr
->frame_control
)) {
783 "Sending PS-Poll to pick a buffered frame\n");
784 sc
->ps_flags
|= PS_WAIT_FOR_PSPOLL_DATA
;
786 ath_dbg(common
, PS
, "Wake up to complete TX\n");
787 sc
->ps_flags
|= PS_WAIT_FOR_TX_ACK
;
790 * The actual restore operation will happen only after
791 * the ps_flags bit is cleared. We are just dropping
792 * the ps_usecount here.
794 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
795 ath9k_ps_restore(sc
);
799 * Cannot tx while the hardware is in full sleep, it first needs a full
800 * chip reset to recover from that
802 if (unlikely(sc
->sc_ah
->power_mode
== ATH9K_PM_FULL_SLEEP
)) {
803 ath_err(common
, "TX while HW is in FULL_SLEEP mode\n");
807 memset(&txctl
, 0, sizeof(struct ath_tx_control
));
808 txctl
.txq
= sc
->tx
.txq_map
[skb_get_queue_mapping(skb
)];
809 txctl
.sta
= control
->sta
;
811 ath_dbg(common
, XMIT
, "transmitting packet, skb: %p\n", skb
);
813 if (ath_tx_start(hw
, skb
, &txctl
) != 0) {
814 ath_dbg(common
, XMIT
, "TX failed\n");
815 TX_STAT_INC(txctl
.txq
->axq_qnum
, txfailed
);
821 ieee80211_free_txskb(hw
, skb
);
824 static void ath9k_stop(struct ieee80211_hw
*hw
)
826 struct ath_softc
*sc
= hw
->priv
;
827 struct ath_hw
*ah
= sc
->sc_ah
;
828 struct ath_common
*common
= ath9k_hw_common(ah
);
831 ath9k_deinit_channel_context(sc
);
835 mutex_lock(&sc
->mutex
);
839 if (test_bit(ATH_OP_INVALID
, &common
->op_flags
)) {
840 ath_dbg(common
, ANY
, "Device not present\n");
841 mutex_unlock(&sc
->mutex
);
845 /* Ensure HW is awake when we try to shut it down. */
848 spin_lock_bh(&sc
->sc_pcu_lock
);
850 /* prevent tasklets to enable interrupts once we disable them */
851 ah
->imask
&= ~ATH9K_INT_GLOBAL
;
853 /* make sure h/w will not generate any interrupt
854 * before setting the invalid flag. */
855 ath9k_hw_disable_interrupts(ah
);
857 spin_unlock_bh(&sc
->sc_pcu_lock
);
859 /* we can now sync irq and kill any running tasklets, since we already
860 * disabled interrupts and not holding a spin lock */
861 synchronize_irq(sc
->irq
);
862 tasklet_kill(&sc
->intr_tq
);
863 tasklet_kill(&sc
->bcon_tasklet
);
865 prev_idle
= sc
->ps_idle
;
868 spin_lock_bh(&sc
->sc_pcu_lock
);
870 if (ah
->led_pin
>= 0) {
871 ath9k_hw_set_gpio(ah
, ah
->led_pin
,
872 (ah
->config
.led_active_high
) ? 0 : 1);
873 ath9k_hw_gpio_request_in(ah
, ah
->led_pin
, NULL
);
876 ath_prepare_reset(sc
);
879 dev_kfree_skb_any(sc
->rx
.frag
);
884 ah
->curchan
= ath9k_cmn_get_channel(hw
, ah
,
885 &sc
->cur_chan
->chandef
);
887 ath9k_hw_reset(ah
, ah
->curchan
, ah
->caldata
, false);
889 set_bit(ATH_OP_INVALID
, &common
->op_flags
);
891 ath9k_hw_phy_disable(ah
);
893 ath9k_hw_configpcipowersave(ah
, true);
895 spin_unlock_bh(&sc
->sc_pcu_lock
);
897 ath9k_ps_restore(sc
);
899 sc
->ps_idle
= prev_idle
;
901 mutex_unlock(&sc
->mutex
);
903 ath_dbg(common
, CONFIG
, "Driver halt\n");
906 static bool ath9k_uses_beacons(int type
)
909 case NL80211_IFTYPE_AP
:
910 case NL80211_IFTYPE_ADHOC
:
911 case NL80211_IFTYPE_MESH_POINT
:
918 static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data
*iter_data
,
919 struct ieee80211_vif
*vif
)
921 /* Use the first (configured) interface, but prefering AP interfaces. */
922 if (!iter_data
->primary_beacon_vif
) {
923 iter_data
->primary_beacon_vif
= vif
;
925 if (iter_data
->primary_beacon_vif
->type
!= NL80211_IFTYPE_AP
&&
926 vif
->type
== NL80211_IFTYPE_AP
)
927 iter_data
->primary_beacon_vif
= vif
;
930 iter_data
->beacons
= true;
931 iter_data
->nbcnvifs
+= 1;
934 static void ath9k_vif_iter(struct ath9k_vif_iter_data
*iter_data
,
935 u8
*mac
, struct ieee80211_vif
*vif
)
937 struct ath_vif
*avp
= (struct ath_vif
*)vif
->drv_priv
;
940 if (iter_data
->has_hw_macaddr
) {
941 for (i
= 0; i
< ETH_ALEN
; i
++)
942 iter_data
->mask
[i
] &=
943 ~(iter_data
->hw_macaddr
[i
] ^ mac
[i
]);
945 memcpy(iter_data
->hw_macaddr
, mac
, ETH_ALEN
);
946 iter_data
->has_hw_macaddr
= true;
949 if (!vif
->bss_conf
.use_short_slot
)
950 iter_data
->slottime
= 20;
953 case NL80211_IFTYPE_AP
:
955 if (vif
->bss_conf
.enable_beacon
)
956 ath9k_vif_iter_set_beacon(iter_data
, vif
);
958 case NL80211_IFTYPE_STATION
:
959 iter_data
->nstations
++;
960 if (avp
->assoc
&& !iter_data
->primary_sta
)
961 iter_data
->primary_sta
= vif
;
963 case NL80211_IFTYPE_OCB
:
966 case NL80211_IFTYPE_ADHOC
:
967 iter_data
->nadhocs
++;
968 if (vif
->bss_conf
.enable_beacon
)
969 ath9k_vif_iter_set_beacon(iter_data
, vif
);
971 case NL80211_IFTYPE_MESH_POINT
:
972 iter_data
->nmeshes
++;
973 if (vif
->bss_conf
.enable_beacon
)
974 ath9k_vif_iter_set_beacon(iter_data
, vif
);
976 case NL80211_IFTYPE_WDS
:
984 static void ath9k_update_bssid_mask(struct ath_softc
*sc
,
985 struct ath_chanctx
*ctx
,
986 struct ath9k_vif_iter_data
*iter_data
)
988 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
992 if (!ath9k_is_chanctx_enabled())
995 list_for_each_entry(avp
, &ctx
->vifs
, list
) {
996 if (ctx
->nvifs_assigned
!= 1)
999 if (!iter_data
->has_hw_macaddr
)
1002 ether_addr_copy(common
->curbssid
, avp
->bssid
);
1004 /* perm_addr will be used as the p2p device address. */
1005 for (i
= 0; i
< ETH_ALEN
; i
++)
1006 iter_data
->mask
[i
] &=
1007 ~(iter_data
->hw_macaddr
[i
] ^
1008 sc
->hw
->wiphy
->perm_addr
[i
]);
1012 /* Called with sc->mutex held. */
1013 void ath9k_calculate_iter_data(struct ath_softc
*sc
,
1014 struct ath_chanctx
*ctx
,
1015 struct ath9k_vif_iter_data
*iter_data
)
1017 struct ath_vif
*avp
;
1020 * The hardware will use primary station addr together with the
1021 * BSSID mask when matching addresses.
1023 memset(iter_data
, 0, sizeof(*iter_data
));
1024 eth_broadcast_addr(iter_data
->mask
);
1025 iter_data
->slottime
= 9;
1027 list_for_each_entry(avp
, &ctx
->vifs
, list
)
1028 ath9k_vif_iter(iter_data
, avp
->vif
->addr
, avp
->vif
);
1030 ath9k_update_bssid_mask(sc
, ctx
, iter_data
);
1033 static void ath9k_set_assoc_state(struct ath_softc
*sc
,
1034 struct ieee80211_vif
*vif
, bool changed
)
1036 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1037 struct ath_vif
*avp
= (struct ath_vif
*)vif
->drv_priv
;
1038 unsigned long flags
;
1040 set_bit(ATH_OP_PRIM_STA_VIF
, &common
->op_flags
);
1042 ether_addr_copy(common
->curbssid
, avp
->bssid
);
1043 common
->curaid
= avp
->aid
;
1044 ath9k_hw_write_associd(sc
->sc_ah
);
1047 common
->last_rssi
= ATH_RSSI_DUMMY_MARKER
;
1048 sc
->sc_ah
->stats
.avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
1050 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1051 sc
->ps_flags
|= PS_BEACON_SYNC
| PS_WAIT_FOR_BEACON
;
1052 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1055 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
))
1056 ath9k_mci_update_wlan_channels(sc
, false);
1058 ath_dbg(common
, CONFIG
,
1059 "Primary Station interface: %pM, BSSID: %pM\n",
1060 vif
->addr
, common
->curbssid
);
1063 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1064 static void ath9k_set_offchannel_state(struct ath_softc
*sc
)
1066 struct ath_hw
*ah
= sc
->sc_ah
;
1067 struct ath_common
*common
= ath9k_hw_common(ah
);
1068 struct ieee80211_vif
*vif
= NULL
;
1070 ath9k_ps_wakeup(sc
);
1072 if (sc
->offchannel
.state
< ATH_OFFCHANNEL_ROC_START
)
1073 vif
= sc
->offchannel
.scan_vif
;
1075 vif
= sc
->offchannel
.roc_vif
;
1080 eth_zero_addr(common
->curbssid
);
1081 eth_broadcast_addr(common
->bssidmask
);
1082 memcpy(common
->macaddr
, vif
->addr
, ETH_ALEN
);
1084 ah
->opmode
= vif
->type
;
1085 ah
->imask
&= ~ATH9K_INT_SWBA
;
1086 ah
->imask
&= ~ATH9K_INT_TSFOOR
;
1089 ath_hw_setbssidmask(common
);
1090 ath9k_hw_setopmode(ah
);
1091 ath9k_hw_write_associd(sc
->sc_ah
);
1092 ath9k_hw_set_interrupts(ah
);
1093 ath9k_hw_init_global_settings(ah
);
1096 ath9k_ps_restore(sc
);
1100 /* Called with sc->mutex held. */
1101 void ath9k_calculate_summary_state(struct ath_softc
*sc
,
1102 struct ath_chanctx
*ctx
)
1104 struct ath_hw
*ah
= sc
->sc_ah
;
1105 struct ath_common
*common
= ath9k_hw_common(ah
);
1106 struct ath9k_vif_iter_data iter_data
;
1108 ath_chanctx_check_active(sc
, ctx
);
1110 if (ctx
!= sc
->cur_chan
)
1113 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1114 if (ctx
== &sc
->offchannel
.chan
)
1115 return ath9k_set_offchannel_state(sc
);
1118 ath9k_ps_wakeup(sc
);
1119 ath9k_calculate_iter_data(sc
, ctx
, &iter_data
);
1121 if (iter_data
.has_hw_macaddr
)
1122 memcpy(common
->macaddr
, iter_data
.hw_macaddr
, ETH_ALEN
);
1124 memcpy(common
->bssidmask
, iter_data
.mask
, ETH_ALEN
);
1125 ath_hw_setbssidmask(common
);
1127 if (iter_data
.naps
> 0) {
1128 ath9k_hw_set_tsfadjust(ah
, true);
1129 ah
->opmode
= NL80211_IFTYPE_AP
;
1131 ath9k_hw_set_tsfadjust(ah
, false);
1132 if (iter_data
.beacons
)
1133 ath9k_beacon_ensure_primary_slot(sc
);
1135 if (iter_data
.nmeshes
)
1136 ah
->opmode
= NL80211_IFTYPE_MESH_POINT
;
1137 else if (iter_data
.nocbs
)
1138 ah
->opmode
= NL80211_IFTYPE_OCB
;
1139 else if (iter_data
.nwds
)
1140 ah
->opmode
= NL80211_IFTYPE_AP
;
1141 else if (iter_data
.nadhocs
)
1142 ah
->opmode
= NL80211_IFTYPE_ADHOC
;
1144 ah
->opmode
= NL80211_IFTYPE_STATION
;
1147 ath9k_hw_setopmode(ah
);
1149 ctx
->switch_after_beacon
= false;
1150 if ((iter_data
.nstations
+ iter_data
.nadhocs
+ iter_data
.nmeshes
) > 0)
1151 ah
->imask
|= ATH9K_INT_TSFOOR
;
1153 ah
->imask
&= ~ATH9K_INT_TSFOOR
;
1154 if (iter_data
.naps
== 1 && iter_data
.beacons
)
1155 ctx
->switch_after_beacon
= true;
1158 if (ah
->opmode
== NL80211_IFTYPE_STATION
) {
1159 bool changed
= (iter_data
.primary_sta
!= ctx
->primary_sta
);
1161 if (iter_data
.primary_sta
) {
1162 iter_data
.primary_beacon_vif
= iter_data
.primary_sta
;
1163 iter_data
.beacons
= true;
1164 ath9k_set_assoc_state(sc
, iter_data
.primary_sta
,
1166 ctx
->primary_sta
= iter_data
.primary_sta
;
1168 ctx
->primary_sta
= NULL
;
1169 eth_zero_addr(common
->curbssid
);
1171 ath9k_hw_write_associd(sc
->sc_ah
);
1172 if (ath9k_hw_mci_is_enabled(sc
->sc_ah
))
1173 ath9k_mci_update_wlan_channels(sc
, true);
1176 sc
->nbcnvifs
= iter_data
.nbcnvifs
;
1177 ath9k_beacon_config(sc
, iter_data
.primary_beacon_vif
,
1179 ath9k_hw_set_interrupts(ah
);
1181 if (ah
->slottime
!= iter_data
.slottime
) {
1182 ah
->slottime
= iter_data
.slottime
;
1183 ath9k_hw_init_global_settings(ah
);
1186 if (iter_data
.primary_sta
)
1187 set_bit(ATH_OP_PRIM_STA_VIF
, &common
->op_flags
);
1189 clear_bit(ATH_OP_PRIM_STA_VIF
, &common
->op_flags
);
1191 ath_dbg(common
, CONFIG
,
1192 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1193 common
->macaddr
, common
->curbssid
, common
->bssidmask
);
1195 ath9k_ps_restore(sc
);
1198 static void ath9k_tpc_vif_iter(void *data
, u8
*mac
, struct ieee80211_vif
*vif
)
1200 int *power
= (int *)data
;
1202 if (*power
< vif
->bss_conf
.txpower
)
1203 *power
= vif
->bss_conf
.txpower
;
1206 /* Called with sc->mutex held. */
1207 void ath9k_set_txpower(struct ath_softc
*sc
, struct ieee80211_vif
*vif
)
1210 struct ath_hw
*ah
= sc
->sc_ah
;
1211 struct ath_regulatory
*reg
= ath9k_hw_regulatory(ah
);
1213 ath9k_ps_wakeup(sc
);
1214 if (ah
->tpc_enabled
) {
1215 power
= (vif
) ? vif
->bss_conf
.txpower
: -1;
1216 ieee80211_iterate_active_interfaces_atomic(
1217 sc
->hw
, IEEE80211_IFACE_ITER_RESUME_ALL
,
1218 ath9k_tpc_vif_iter
, &power
);
1220 power
= sc
->hw
->conf
.power_level
;
1222 power
= sc
->hw
->conf
.power_level
;
1224 sc
->cur_chan
->txpower
= 2 * power
;
1225 ath9k_hw_set_txpowerlimit(ah
, sc
->cur_chan
->txpower
, false);
1226 sc
->cur_chan
->cur_txpower
= reg
->max_power_level
;
1227 ath9k_ps_restore(sc
);
1230 static void ath9k_assign_hw_queues(struct ieee80211_hw
*hw
,
1231 struct ieee80211_vif
*vif
)
1235 if (!ath9k_is_chanctx_enabled())
1238 for (i
= 0; i
< IEEE80211_NUM_ACS
; i
++)
1239 vif
->hw_queue
[i
] = i
;
1241 if (vif
->type
== NL80211_IFTYPE_AP
||
1242 vif
->type
== NL80211_IFTYPE_MESH_POINT
)
1243 vif
->cab_queue
= hw
->queues
- 2;
1245 vif
->cab_queue
= IEEE80211_INVAL_HW_QUEUE
;
1248 static int ath9k_add_interface(struct ieee80211_hw
*hw
,
1249 struct ieee80211_vif
*vif
)
1251 struct ath_softc
*sc
= hw
->priv
;
1252 struct ath_hw
*ah
= sc
->sc_ah
;
1253 struct ath_common
*common
= ath9k_hw_common(ah
);
1254 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1255 struct ath_node
*an
= &avp
->mcast_node
;
1257 mutex_lock(&sc
->mutex
);
1259 if (IS_ENABLED(CONFIG_ATH9K_TX99
)) {
1260 if (sc
->cur_chan
->nvifs
>= 1) {
1261 mutex_unlock(&sc
->mutex
);
1267 ath_dbg(common
, CONFIG
, "Attach a VIF of type: %d\n", vif
->type
);
1268 sc
->cur_chan
->nvifs
++;
1270 if (vif
->type
== NL80211_IFTYPE_STATION
&& ath9k_is_chanctx_enabled())
1271 vif
->driver_flags
|= IEEE80211_VIF_GET_NOA_UPDATE
;
1273 if (ath9k_uses_beacons(vif
->type
))
1274 ath9k_beacon_assign_slot(sc
, vif
);
1277 if (!ath9k_is_chanctx_enabled()) {
1278 avp
->chanctx
= sc
->cur_chan
;
1279 list_add_tail(&avp
->list
, &avp
->chanctx
->vifs
);
1282 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1284 ath9k_assign_hw_queues(hw
, vif
);
1286 ath9k_set_txpower(sc
, vif
);
1291 an
->no_ps_filter
= true;
1292 ath_tx_node_init(sc
, an
);
1294 mutex_unlock(&sc
->mutex
);
1298 static int ath9k_change_interface(struct ieee80211_hw
*hw
,
1299 struct ieee80211_vif
*vif
,
1300 enum nl80211_iftype new_type
,
1303 struct ath_softc
*sc
= hw
->priv
;
1304 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1305 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1307 mutex_lock(&sc
->mutex
);
1309 if (IS_ENABLED(CONFIG_ATH9K_TX99
)) {
1310 mutex_unlock(&sc
->mutex
);
1314 ath_dbg(common
, CONFIG
, "Change Interface\n");
1316 if (ath9k_uses_beacons(vif
->type
))
1317 ath9k_beacon_remove_slot(sc
, vif
);
1319 vif
->type
= new_type
;
1322 if (ath9k_uses_beacons(vif
->type
))
1323 ath9k_beacon_assign_slot(sc
, vif
);
1325 ath9k_assign_hw_queues(hw
, vif
);
1326 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1328 ath9k_set_txpower(sc
, vif
);
1330 mutex_unlock(&sc
->mutex
);
1334 static void ath9k_remove_interface(struct ieee80211_hw
*hw
,
1335 struct ieee80211_vif
*vif
)
1337 struct ath_softc
*sc
= hw
->priv
;
1338 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1339 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1341 ath_dbg(common
, CONFIG
, "Detach Interface\n");
1343 mutex_lock(&sc
->mutex
);
1345 ath9k_p2p_remove_vif(sc
, vif
);
1347 sc
->cur_chan
->nvifs
--;
1348 sc
->tx99_vif
= NULL
;
1349 if (!ath9k_is_chanctx_enabled())
1350 list_del(&avp
->list
);
1352 if (ath9k_uses_beacons(vif
->type
))
1353 ath9k_beacon_remove_slot(sc
, vif
);
1355 ath_tx_node_cleanup(sc
, &avp
->mcast_node
);
1357 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1359 ath9k_set_txpower(sc
, NULL
);
1361 mutex_unlock(&sc
->mutex
);
1364 static void ath9k_enable_ps(struct ath_softc
*sc
)
1366 struct ath_hw
*ah
= sc
->sc_ah
;
1367 struct ath_common
*common
= ath9k_hw_common(ah
);
1369 if (IS_ENABLED(CONFIG_ATH9K_TX99
))
1372 sc
->ps_enabled
= true;
1373 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1374 if ((ah
->imask
& ATH9K_INT_TIM_TIMER
) == 0) {
1375 ah
->imask
|= ATH9K_INT_TIM_TIMER
;
1376 ath9k_hw_set_interrupts(ah
);
1378 ath9k_hw_setrxabort(ah
, 1);
1380 ath_dbg(common
, PS
, "PowerSave enabled\n");
1383 static void ath9k_disable_ps(struct ath_softc
*sc
)
1385 struct ath_hw
*ah
= sc
->sc_ah
;
1386 struct ath_common
*common
= ath9k_hw_common(ah
);
1388 if (IS_ENABLED(CONFIG_ATH9K_TX99
))
1391 sc
->ps_enabled
= false;
1392 ath9k_hw_setpower(ah
, ATH9K_PM_AWAKE
);
1393 if (!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_AUTOSLEEP
)) {
1394 ath9k_hw_setrxabort(ah
, 0);
1395 sc
->ps_flags
&= ~(PS_WAIT_FOR_BEACON
|
1397 PS_WAIT_FOR_PSPOLL_DATA
|
1398 PS_WAIT_FOR_TX_ACK
);
1399 if (ah
->imask
& ATH9K_INT_TIM_TIMER
) {
1400 ah
->imask
&= ~ATH9K_INT_TIM_TIMER
;
1401 ath9k_hw_set_interrupts(ah
);
1404 ath_dbg(common
, PS
, "PowerSave disabled\n");
1407 static int ath9k_config(struct ieee80211_hw
*hw
, u32 changed
)
1409 struct ath_softc
*sc
= hw
->priv
;
1410 struct ath_hw
*ah
= sc
->sc_ah
;
1411 struct ath_common
*common
= ath9k_hw_common(ah
);
1412 struct ieee80211_conf
*conf
= &hw
->conf
;
1413 struct ath_chanctx
*ctx
= sc
->cur_chan
;
1415 ath9k_ps_wakeup(sc
);
1416 mutex_lock(&sc
->mutex
);
1418 if (changed
& IEEE80211_CONF_CHANGE_IDLE
) {
1419 sc
->ps_idle
= !!(conf
->flags
& IEEE80211_CONF_IDLE
);
1421 ath_cancel_work(sc
);
1422 ath9k_stop_btcoex(sc
);
1424 ath9k_start_btcoex(sc
);
1426 * The chip needs a reset to properly wake up from
1429 ath_chanctx_set_channel(sc
, ctx
, &ctx
->chandef
);
1434 * We just prepare to enable PS. We have to wait until our AP has
1435 * ACK'd our null data frame to disable RX otherwise we'll ignore
1436 * those ACKs and end up retransmitting the same null data frames.
1437 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1439 if (changed
& IEEE80211_CONF_CHANGE_PS
) {
1440 unsigned long flags
;
1441 spin_lock_irqsave(&sc
->sc_pm_lock
, flags
);
1442 if (conf
->flags
& IEEE80211_CONF_PS
)
1443 ath9k_enable_ps(sc
);
1445 ath9k_disable_ps(sc
);
1446 spin_unlock_irqrestore(&sc
->sc_pm_lock
, flags
);
1449 if (changed
& IEEE80211_CONF_CHANGE_MONITOR
) {
1450 if (conf
->flags
& IEEE80211_CONF_MONITOR
) {
1451 ath_dbg(common
, CONFIG
, "Monitor mode is enabled\n");
1452 sc
->sc_ah
->is_monitoring
= true;
1454 ath_dbg(common
, CONFIG
, "Monitor mode is disabled\n");
1455 sc
->sc_ah
->is_monitoring
= false;
1459 if (!ath9k_is_chanctx_enabled() && (changed
& IEEE80211_CONF_CHANGE_CHANNEL
)) {
1460 ctx
->offchannel
= !!(conf
->flags
& IEEE80211_CONF_OFFCHANNEL
);
1461 ath_chanctx_set_channel(sc
, ctx
, &hw
->conf
.chandef
);
1464 mutex_unlock(&sc
->mutex
);
1465 ath9k_ps_restore(sc
);
1470 #define SUPPORTED_FILTERS \
1475 FIF_BCN_PRBRESP_PROMISC | \
1479 /* FIXME: sc->sc_full_reset ? */
1480 static void ath9k_configure_filter(struct ieee80211_hw
*hw
,
1481 unsigned int changed_flags
,
1482 unsigned int *total_flags
,
1485 struct ath_softc
*sc
= hw
->priv
;
1486 struct ath_chanctx
*ctx
;
1489 changed_flags
&= SUPPORTED_FILTERS
;
1490 *total_flags
&= SUPPORTED_FILTERS
;
1492 spin_lock_bh(&sc
->chan_lock
);
1493 ath_for_each_chanctx(sc
, ctx
)
1494 ctx
->rxfilter
= *total_flags
;
1495 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1496 sc
->offchannel
.chan
.rxfilter
= *total_flags
;
1498 spin_unlock_bh(&sc
->chan_lock
);
1500 ath9k_ps_wakeup(sc
);
1501 rfilt
= ath_calcrxfilter(sc
);
1502 ath9k_hw_setrxfilter(sc
->sc_ah
, rfilt
);
1503 ath9k_ps_restore(sc
);
1505 ath_dbg(ath9k_hw_common(sc
->sc_ah
), CONFIG
, "Set HW RX filter: 0x%x\n",
1509 static int ath9k_sta_add(struct ieee80211_hw
*hw
,
1510 struct ieee80211_vif
*vif
,
1511 struct ieee80211_sta
*sta
)
1513 struct ath_softc
*sc
= hw
->priv
;
1514 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1515 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1516 struct ieee80211_key_conf ps_key
= { };
1519 ath_node_attach(sc
, sta
, vif
);
1521 if (vif
->type
!= NL80211_IFTYPE_AP
&&
1522 vif
->type
!= NL80211_IFTYPE_AP_VLAN
)
1525 key
= ath_key_config(common
, vif
, sta
, &ps_key
);
1528 an
->key_idx
[0] = key
;
1534 static void ath9k_del_ps_key(struct ath_softc
*sc
,
1535 struct ieee80211_vif
*vif
,
1536 struct ieee80211_sta
*sta
)
1538 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1539 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1540 struct ieee80211_key_conf ps_key
= { .hw_key_idx
= an
->ps_key
};
1545 ath_key_delete(common
, &ps_key
);
1550 static int ath9k_sta_remove(struct ieee80211_hw
*hw
,
1551 struct ieee80211_vif
*vif
,
1552 struct ieee80211_sta
*sta
)
1554 struct ath_softc
*sc
= hw
->priv
;
1556 ath9k_del_ps_key(sc
, vif
, sta
);
1557 ath_node_detach(sc
, sta
);
1562 static int ath9k_sta_state(struct ieee80211_hw
*hw
,
1563 struct ieee80211_vif
*vif
,
1564 struct ieee80211_sta
*sta
,
1565 enum ieee80211_sta_state old_state
,
1566 enum ieee80211_sta_state new_state
)
1568 struct ath_softc
*sc
= hw
->priv
;
1569 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1572 if (old_state
== IEEE80211_STA_NOTEXIST
&&
1573 new_state
== IEEE80211_STA_NONE
) {
1574 ret
= ath9k_sta_add(hw
, vif
, sta
);
1575 ath_dbg(common
, CONFIG
,
1576 "Add station: %pM\n", sta
->addr
);
1577 } else if (old_state
== IEEE80211_STA_NONE
&&
1578 new_state
== IEEE80211_STA_NOTEXIST
) {
1579 ret
= ath9k_sta_remove(hw
, vif
, sta
);
1580 ath_dbg(common
, CONFIG
,
1581 "Remove station: %pM\n", sta
->addr
);
1584 if (ath9k_is_chanctx_enabled()) {
1585 if (vif
->type
== NL80211_IFTYPE_STATION
) {
1586 if (old_state
== IEEE80211_STA_ASSOC
&&
1587 new_state
== IEEE80211_STA_AUTHORIZED
)
1588 ath_chanctx_event(sc
, vif
,
1589 ATH_CHANCTX_EVENT_AUTHORIZED
);
1596 static void ath9k_sta_set_tx_filter(struct ath_hw
*ah
,
1597 struct ath_node
*an
,
1602 for (i
= 0; i
< ARRAY_SIZE(an
->key_idx
); i
++) {
1603 if (!an
->key_idx
[i
])
1605 ath9k_hw_set_tx_filter(ah
, an
->key_idx
[i
], set
);
1609 static void ath9k_sta_notify(struct ieee80211_hw
*hw
,
1610 struct ieee80211_vif
*vif
,
1611 enum sta_notify_cmd cmd
,
1612 struct ieee80211_sta
*sta
)
1614 struct ath_softc
*sc
= hw
->priv
;
1615 struct ath_node
*an
= (struct ath_node
*) sta
->drv_priv
;
1618 case STA_NOTIFY_SLEEP
:
1619 an
->sleeping
= true;
1620 ath_tx_aggr_sleep(sta
, sc
, an
);
1621 ath9k_sta_set_tx_filter(sc
->sc_ah
, an
, true);
1623 case STA_NOTIFY_AWAKE
:
1624 ath9k_sta_set_tx_filter(sc
->sc_ah
, an
, false);
1625 an
->sleeping
= false;
1626 ath_tx_aggr_wakeup(sc
, an
);
1631 static int ath9k_conf_tx(struct ieee80211_hw
*hw
,
1632 struct ieee80211_vif
*vif
, u16 queue
,
1633 const struct ieee80211_tx_queue_params
*params
)
1635 struct ath_softc
*sc
= hw
->priv
;
1636 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1637 struct ath_txq
*txq
;
1638 struct ath9k_tx_queue_info qi
;
1641 if (queue
>= IEEE80211_NUM_ACS
)
1644 txq
= sc
->tx
.txq_map
[queue
];
1646 ath9k_ps_wakeup(sc
);
1647 mutex_lock(&sc
->mutex
);
1649 memset(&qi
, 0, sizeof(struct ath9k_tx_queue_info
));
1651 qi
.tqi_aifs
= params
->aifs
;
1652 qi
.tqi_cwmin
= params
->cw_min
;
1653 qi
.tqi_cwmax
= params
->cw_max
;
1654 qi
.tqi_burstTime
= params
->txop
* 32;
1656 ath_dbg(common
, CONFIG
,
1657 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1658 queue
, txq
->axq_qnum
, params
->aifs
, params
->cw_min
,
1659 params
->cw_max
, params
->txop
);
1661 ath_update_max_aggr_framelen(sc
, queue
, qi
.tqi_burstTime
);
1662 ret
= ath_txq_update(sc
, txq
->axq_qnum
, &qi
);
1664 ath_err(common
, "TXQ Update failed\n");
1666 mutex_unlock(&sc
->mutex
);
1667 ath9k_ps_restore(sc
);
1672 static int ath9k_set_key(struct ieee80211_hw
*hw
,
1673 enum set_key_cmd cmd
,
1674 struct ieee80211_vif
*vif
,
1675 struct ieee80211_sta
*sta
,
1676 struct ieee80211_key_conf
*key
)
1678 struct ath_softc
*sc
= hw
->priv
;
1679 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1680 struct ath_node
*an
= NULL
;
1683 if (ath9k_modparam_nohwcrypt
)
1686 if ((vif
->type
== NL80211_IFTYPE_ADHOC
||
1687 vif
->type
== NL80211_IFTYPE_MESH_POINT
) &&
1688 (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
||
1689 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
) &&
1690 !(key
->flags
& IEEE80211_KEY_FLAG_PAIRWISE
)) {
1692 * For now, disable hw crypto for the RSN IBSS group keys. This
1693 * could be optimized in the future to use a modified key cache
1694 * design to support per-STA RX GTK, but until that gets
1695 * implemented, use of software crypto for group addressed
1696 * frames is a acceptable to allow RSN IBSS to be used.
1701 mutex_lock(&sc
->mutex
);
1702 ath9k_ps_wakeup(sc
);
1703 ath_dbg(common
, CONFIG
, "Set HW Key %d\n", cmd
);
1705 an
= (struct ath_node
*)sta
->drv_priv
;
1710 ath9k_del_ps_key(sc
, vif
, sta
);
1712 key
->hw_key_idx
= 0;
1713 ret
= ath_key_config(common
, vif
, sta
, key
);
1715 key
->hw_key_idx
= ret
;
1716 /* push IV and Michael MIC generation to stack */
1717 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
1718 if (key
->cipher
== WLAN_CIPHER_SUITE_TKIP
)
1719 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_MMIC
;
1720 if (sc
->sc_ah
->sw_mgmt_crypto_tx
&&
1721 key
->cipher
== WLAN_CIPHER_SUITE_CCMP
)
1722 key
->flags
|= IEEE80211_KEY_FLAG_SW_MGMT_TX
;
1725 if (an
&& key
->hw_key_idx
) {
1726 for (i
= 0; i
< ARRAY_SIZE(an
->key_idx
); i
++) {
1729 an
->key_idx
[i
] = key
->hw_key_idx
;
1732 WARN_ON(i
== ARRAY_SIZE(an
->key_idx
));
1736 ath_key_delete(common
, key
);
1738 for (i
= 0; i
< ARRAY_SIZE(an
->key_idx
); i
++) {
1739 if (an
->key_idx
[i
] != key
->hw_key_idx
)
1745 key
->hw_key_idx
= 0;
1751 ath9k_ps_restore(sc
);
1752 mutex_unlock(&sc
->mutex
);
1757 static void ath9k_bss_info_changed(struct ieee80211_hw
*hw
,
1758 struct ieee80211_vif
*vif
,
1759 struct ieee80211_bss_conf
*bss_conf
,
1763 (BSS_CHANGED_ASSOC | \
1764 BSS_CHANGED_IBSS | \
1765 BSS_CHANGED_BEACON_ENABLED)
1767 struct ath_softc
*sc
= hw
->priv
;
1768 struct ath_hw
*ah
= sc
->sc_ah
;
1769 struct ath_common
*common
= ath9k_hw_common(ah
);
1770 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1773 ath9k_ps_wakeup(sc
);
1774 mutex_lock(&sc
->mutex
);
1776 if (changed
& BSS_CHANGED_ASSOC
) {
1777 ath_dbg(common
, CONFIG
, "BSSID %pM Changed ASSOC %d\n",
1778 bss_conf
->bssid
, bss_conf
->assoc
);
1780 memcpy(avp
->bssid
, bss_conf
->bssid
, ETH_ALEN
);
1781 avp
->aid
= bss_conf
->aid
;
1782 avp
->assoc
= bss_conf
->assoc
;
1784 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1787 if ((changed
& BSS_CHANGED_IBSS
) ||
1788 (changed
& BSS_CHANGED_OCB
)) {
1789 memcpy(common
->curbssid
, bss_conf
->bssid
, ETH_ALEN
);
1790 common
->curaid
= bss_conf
->aid
;
1791 ath9k_hw_write_associd(sc
->sc_ah
);
1794 if ((changed
& BSS_CHANGED_BEACON_ENABLED
) ||
1795 (changed
& BSS_CHANGED_BEACON_INT
) ||
1796 (changed
& BSS_CHANGED_BEACON_INFO
)) {
1797 ath9k_calculate_summary_state(sc
, avp
->chanctx
);
1800 if ((avp
->chanctx
== sc
->cur_chan
) &&
1801 (changed
& BSS_CHANGED_ERP_SLOT
)) {
1802 if (bss_conf
->use_short_slot
)
1807 if (vif
->type
== NL80211_IFTYPE_AP
) {
1809 * Defer update, so that connected stations can adjust
1810 * their settings at the same time.
1811 * See beacon.c for more details
1813 sc
->beacon
.slottime
= slottime
;
1814 sc
->beacon
.updateslot
= UPDATE
;
1816 ah
->slottime
= slottime
;
1817 ath9k_hw_init_global_settings(ah
);
1821 if (changed
& BSS_CHANGED_P2P_PS
)
1822 ath9k_p2p_bss_info_changed(sc
, vif
);
1824 if (changed
& CHECK_ANI
)
1827 if (changed
& BSS_CHANGED_TXPOWER
) {
1828 ath_dbg(common
, CONFIG
, "vif %pM power %d dbm power_type %d\n",
1829 vif
->addr
, bss_conf
->txpower
, bss_conf
->txpower_type
);
1830 ath9k_set_txpower(sc
, vif
);
1833 mutex_unlock(&sc
->mutex
);
1834 ath9k_ps_restore(sc
);
1839 static u64
ath9k_get_tsf(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
)
1841 struct ath_softc
*sc
= hw
->priv
;
1842 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1845 mutex_lock(&sc
->mutex
);
1846 ath9k_ps_wakeup(sc
);
1847 /* Get current TSF either from HW or kernel time. */
1848 if (sc
->cur_chan
== avp
->chanctx
) {
1849 tsf
= ath9k_hw_gettsf64(sc
->sc_ah
);
1851 tsf
= sc
->cur_chan
->tsf_val
+
1852 ath9k_hw_get_tsf_offset(&sc
->cur_chan
->tsf_ts
, NULL
);
1854 tsf
+= le64_to_cpu(avp
->tsf_adjust
);
1855 ath9k_ps_restore(sc
);
1856 mutex_unlock(&sc
->mutex
);
1861 static void ath9k_set_tsf(struct ieee80211_hw
*hw
,
1862 struct ieee80211_vif
*vif
,
1865 struct ath_softc
*sc
= hw
->priv
;
1866 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1868 mutex_lock(&sc
->mutex
);
1869 ath9k_ps_wakeup(sc
);
1870 tsf
-= le64_to_cpu(avp
->tsf_adjust
);
1871 getrawmonotonic(&avp
->chanctx
->tsf_ts
);
1872 if (sc
->cur_chan
== avp
->chanctx
)
1873 ath9k_hw_settsf64(sc
->sc_ah
, tsf
);
1874 avp
->chanctx
->tsf_val
= tsf
;
1875 ath9k_ps_restore(sc
);
1876 mutex_unlock(&sc
->mutex
);
1879 static void ath9k_reset_tsf(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
)
1881 struct ath_softc
*sc
= hw
->priv
;
1882 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
1884 mutex_lock(&sc
->mutex
);
1886 ath9k_ps_wakeup(sc
);
1887 getrawmonotonic(&avp
->chanctx
->tsf_ts
);
1888 if (sc
->cur_chan
== avp
->chanctx
)
1889 ath9k_hw_reset_tsf(sc
->sc_ah
);
1890 avp
->chanctx
->tsf_val
= 0;
1891 ath9k_ps_restore(sc
);
1893 mutex_unlock(&sc
->mutex
);
1896 static int ath9k_ampdu_action(struct ieee80211_hw
*hw
,
1897 struct ieee80211_vif
*vif
,
1898 struct ieee80211_ampdu_params
*params
)
1900 struct ath_softc
*sc
= hw
->priv
;
1901 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1904 struct ieee80211_sta
*sta
= params
->sta
;
1905 enum ieee80211_ampdu_mlme_action action
= params
->action
;
1906 u16 tid
= params
->tid
;
1907 u16
*ssn
= ¶ms
->ssn
;
1909 mutex_lock(&sc
->mutex
);
1912 case IEEE80211_AMPDU_RX_START
:
1914 case IEEE80211_AMPDU_RX_STOP
:
1916 case IEEE80211_AMPDU_TX_START
:
1917 if (ath9k_is_chanctx_enabled()) {
1918 if (test_bit(ATH_OP_SCANNING
, &common
->op_flags
)) {
1923 ath9k_ps_wakeup(sc
);
1924 ret
= ath_tx_aggr_start(sc
, sta
, tid
, ssn
);
1926 ieee80211_start_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
1927 ath9k_ps_restore(sc
);
1929 case IEEE80211_AMPDU_TX_STOP_FLUSH
:
1930 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT
:
1932 case IEEE80211_AMPDU_TX_STOP_CONT
:
1933 ath9k_ps_wakeup(sc
);
1934 ath_tx_aggr_stop(sc
, sta
, tid
);
1936 ieee80211_stop_tx_ba_cb_irqsafe(vif
, sta
->addr
, tid
);
1937 ath9k_ps_restore(sc
);
1939 case IEEE80211_AMPDU_TX_OPERATIONAL
:
1940 ath9k_ps_wakeup(sc
);
1941 ath_tx_aggr_resume(sc
, sta
, tid
);
1942 ath9k_ps_restore(sc
);
1945 ath_err(ath9k_hw_common(sc
->sc_ah
), "Unknown AMPDU action\n");
1948 mutex_unlock(&sc
->mutex
);
1953 static int ath9k_get_survey(struct ieee80211_hw
*hw
, int idx
,
1954 struct survey_info
*survey
)
1956 struct ath_softc
*sc
= hw
->priv
;
1957 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
1958 struct ieee80211_supported_band
*sband
;
1959 struct ieee80211_channel
*chan
;
1962 if (IS_ENABLED(CONFIG_ATH9K_TX99
))
1965 spin_lock_bh(&common
->cc_lock
);
1967 ath_update_survey_stats(sc
);
1969 sband
= hw
->wiphy
->bands
[NL80211_BAND_2GHZ
];
1970 if (sband
&& idx
>= sband
->n_channels
) {
1971 idx
-= sband
->n_channels
;
1976 sband
= hw
->wiphy
->bands
[NL80211_BAND_5GHZ
];
1978 if (!sband
|| idx
>= sband
->n_channels
) {
1979 spin_unlock_bh(&common
->cc_lock
);
1983 chan
= &sband
->channels
[idx
];
1984 pos
= chan
->hw_value
;
1985 memcpy(survey
, &sc
->survey
[pos
], sizeof(*survey
));
1986 survey
->channel
= chan
;
1987 spin_unlock_bh(&common
->cc_lock
);
1992 static void ath9k_enable_dynack(struct ath_softc
*sc
)
1994 #ifdef CONFIG_ATH9K_DYNACK
1996 struct ath_hw
*ah
= sc
->sc_ah
;
1998 ath_dynack_reset(ah
);
2000 ah
->dynack
.enabled
= true;
2001 rfilt
= ath_calcrxfilter(sc
);
2002 ath9k_hw_setrxfilter(ah
, rfilt
);
2006 static void ath9k_set_coverage_class(struct ieee80211_hw
*hw
,
2009 struct ath_softc
*sc
= hw
->priv
;
2010 struct ath_hw
*ah
= sc
->sc_ah
;
2012 if (IS_ENABLED(CONFIG_ATH9K_TX99
))
2015 mutex_lock(&sc
->mutex
);
2017 if (coverage_class
>= 0) {
2018 ah
->coverage_class
= coverage_class
;
2019 if (ah
->dynack
.enabled
) {
2022 ah
->dynack
.enabled
= false;
2023 rfilt
= ath_calcrxfilter(sc
);
2024 ath9k_hw_setrxfilter(ah
, rfilt
);
2026 ath9k_ps_wakeup(sc
);
2027 ath9k_hw_init_global_settings(ah
);
2028 ath9k_ps_restore(sc
);
2029 } else if (!ah
->dynack
.enabled
) {
2030 ath9k_enable_dynack(sc
);
2033 mutex_unlock(&sc
->mutex
);
2036 static bool ath9k_has_tx_pending(struct ath_softc
*sc
,
2041 for (i
= 0; i
< ATH9K_NUM_TX_QUEUES
; i
++) {
2042 if (!ATH_TXQ_SETUP(sc
, i
))
2045 npend
= ath9k_has_pending_frames(sc
, &sc
->tx
.txq
[i
],
2054 static void ath9k_flush(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
2055 u32 queues
, bool drop
)
2057 struct ath_softc
*sc
= hw
->priv
;
2058 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2060 if (ath9k_is_chanctx_enabled()) {
2061 if (!test_bit(ATH_OP_MULTI_CHANNEL
, &common
->op_flags
))
2065 * If MCC is active, extend the flush timeout
2066 * and wait for the HW/SW queues to become
2067 * empty. This needs to be done outside the
2068 * sc->mutex lock to allow the channel scheduler
2069 * to switch channel contexts.
2071 * The vif queues have been stopped in mac80211,
2072 * so there won't be any incoming frames.
2074 __ath9k_flush(hw
, queues
, drop
, true, true);
2078 mutex_lock(&sc
->mutex
);
2079 __ath9k_flush(hw
, queues
, drop
, true, false);
2080 mutex_unlock(&sc
->mutex
);
2083 void __ath9k_flush(struct ieee80211_hw
*hw
, u32 queues
, bool drop
,
2084 bool sw_pending
, bool timeout_override
)
2086 struct ath_softc
*sc
= hw
->priv
;
2087 struct ath_hw
*ah
= sc
->sc_ah
;
2088 struct ath_common
*common
= ath9k_hw_common(ah
);
2092 cancel_delayed_work_sync(&sc
->tx_complete_work
);
2094 if (ah
->ah_flags
& AH_UNPLUGGED
) {
2095 ath_dbg(common
, ANY
, "Device has been unplugged!\n");
2099 if (test_bit(ATH_OP_INVALID
, &common
->op_flags
)) {
2100 ath_dbg(common
, ANY
, "Device not present\n");
2104 spin_lock_bh(&sc
->chan_lock
);
2105 if (timeout_override
)
2108 timeout
= sc
->cur_chan
->flush_timeout
;
2109 spin_unlock_bh(&sc
->chan_lock
);
2111 ath_dbg(common
, CHAN_CTX
,
2112 "Flush timeout: %d\n", jiffies_to_msecs(timeout
));
2114 if (wait_event_timeout(sc
->tx_wait
, !ath9k_has_tx_pending(sc
, sw_pending
),
2119 ath9k_ps_wakeup(sc
);
2120 spin_lock_bh(&sc
->sc_pcu_lock
);
2121 drain_txq
= ath_drain_all_txq(sc
);
2122 spin_unlock_bh(&sc
->sc_pcu_lock
);
2125 ath_reset(sc
, NULL
);
2127 ath9k_ps_restore(sc
);
2130 ieee80211_queue_delayed_work(hw
, &sc
->tx_complete_work
, 0);
2133 static bool ath9k_tx_frames_pending(struct ieee80211_hw
*hw
)
2135 struct ath_softc
*sc
= hw
->priv
;
2137 return ath9k_has_tx_pending(sc
, true);
2140 static int ath9k_tx_last_beacon(struct ieee80211_hw
*hw
)
2142 struct ath_softc
*sc
= hw
->priv
;
2143 struct ath_hw
*ah
= sc
->sc_ah
;
2144 struct ieee80211_vif
*vif
;
2145 struct ath_vif
*avp
;
2147 struct ath_tx_status ts
;
2148 bool edma
= !!(ah
->caps
.hw_caps
& ATH9K_HW_CAP_EDMA
);
2151 vif
= sc
->beacon
.bslot
[0];
2155 if (!vif
->bss_conf
.enable_beacon
)
2158 avp
= (void *)vif
->drv_priv
;
2160 if (!sc
->beacon
.tx_processed
&& !edma
) {
2161 tasklet_disable(&sc
->bcon_tasklet
);
2164 if (!bf
|| !bf
->bf_mpdu
)
2167 status
= ath9k_hw_txprocdesc(ah
, bf
->bf_desc
, &ts
);
2168 if (status
== -EINPROGRESS
)
2171 sc
->beacon
.tx_processed
= true;
2172 sc
->beacon
.tx_last
= !(ts
.ts_status
& ATH9K_TXERR_MASK
);
2175 tasklet_enable(&sc
->bcon_tasklet
);
2178 return sc
->beacon
.tx_last
;
2181 static int ath9k_get_stats(struct ieee80211_hw
*hw
,
2182 struct ieee80211_low_level_stats
*stats
)
2184 struct ath_softc
*sc
= hw
->priv
;
2185 struct ath_hw
*ah
= sc
->sc_ah
;
2186 struct ath9k_mib_stats
*mib_stats
= &ah
->ah_mibStats
;
2188 stats
->dot11ACKFailureCount
= mib_stats
->ackrcv_bad
;
2189 stats
->dot11RTSFailureCount
= mib_stats
->rts_bad
;
2190 stats
->dot11FCSErrorCount
= mib_stats
->fcs_bad
;
2191 stats
->dot11RTSSuccessCount
= mib_stats
->rts_good
;
2195 static u32
fill_chainmask(u32 cap
, u32
new)
2200 for (i
= 0; cap
&& new; i
++, cap
>>= 1) {
2201 if (!(cap
& BIT(0)))
2213 static bool validate_antenna_mask(struct ath_hw
*ah
, u32 val
)
2215 if (AR_SREV_9300_20_OR_LATER(ah
))
2218 switch (val
& 0x7) {
2224 return (ah
->caps
.rx_chainmask
== 1);
2230 static int ath9k_set_antenna(struct ieee80211_hw
*hw
, u32 tx_ant
, u32 rx_ant
)
2232 struct ath_softc
*sc
= hw
->priv
;
2233 struct ath_hw
*ah
= sc
->sc_ah
;
2235 if (ah
->caps
.rx_chainmask
!= 1)
2238 if (!validate_antenna_mask(ah
, rx_ant
) || !tx_ant
)
2241 sc
->ant_rx
= rx_ant
;
2242 sc
->ant_tx
= tx_ant
;
2244 if (ah
->caps
.rx_chainmask
== 1)
2247 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2248 if (AR_SREV_9100(ah
))
2249 ah
->rxchainmask
= 0x7;
2251 ah
->rxchainmask
= fill_chainmask(ah
->caps
.rx_chainmask
, rx_ant
);
2253 ah
->txchainmask
= fill_chainmask(ah
->caps
.tx_chainmask
, tx_ant
);
2254 ath9k_cmn_reload_chainmask(ah
);
2259 static int ath9k_get_antenna(struct ieee80211_hw
*hw
, u32
*tx_ant
, u32
*rx_ant
)
2261 struct ath_softc
*sc
= hw
->priv
;
2263 *tx_ant
= sc
->ant_tx
;
2264 *rx_ant
= sc
->ant_rx
;
2268 static void ath9k_sw_scan_start(struct ieee80211_hw
*hw
,
2269 struct ieee80211_vif
*vif
,
2272 struct ath_softc
*sc
= hw
->priv
;
2273 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2274 set_bit(ATH_OP_SCANNING
, &common
->op_flags
);
2277 static void ath9k_sw_scan_complete(struct ieee80211_hw
*hw
,
2278 struct ieee80211_vif
*vif
)
2280 struct ath_softc
*sc
= hw
->priv
;
2281 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2282 clear_bit(ATH_OP_SCANNING
, &common
->op_flags
);
2285 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2287 static void ath9k_cancel_pending_offchannel(struct ath_softc
*sc
)
2289 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2291 if (sc
->offchannel
.roc_vif
) {
2292 ath_dbg(common
, CHAN_CTX
,
2293 "%s: Aborting RoC\n", __func__
);
2295 del_timer_sync(&sc
->offchannel
.timer
);
2296 if (sc
->offchannel
.state
>= ATH_OFFCHANNEL_ROC_START
)
2297 ath_roc_complete(sc
, ATH_ROC_COMPLETE_ABORT
);
2300 if (test_bit(ATH_OP_SCANNING
, &common
->op_flags
)) {
2301 ath_dbg(common
, CHAN_CTX
,
2302 "%s: Aborting HW scan\n", __func__
);
2304 del_timer_sync(&sc
->offchannel
.timer
);
2305 ath_scan_complete(sc
, true);
2309 static int ath9k_hw_scan(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
2310 struct ieee80211_scan_request
*hw_req
)
2312 struct cfg80211_scan_request
*req
= &hw_req
->req
;
2313 struct ath_softc
*sc
= hw
->priv
;
2314 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2317 mutex_lock(&sc
->mutex
);
2319 if (WARN_ON(sc
->offchannel
.scan_req
)) {
2324 ath9k_ps_wakeup(sc
);
2325 set_bit(ATH_OP_SCANNING
, &common
->op_flags
);
2326 sc
->offchannel
.scan_vif
= vif
;
2327 sc
->offchannel
.scan_req
= req
;
2328 sc
->offchannel
.scan_idx
= 0;
2330 ath_dbg(common
, CHAN_CTX
, "HW scan request received on vif: %pM\n",
2333 if (sc
->offchannel
.state
== ATH_OFFCHANNEL_IDLE
) {
2334 ath_dbg(common
, CHAN_CTX
, "Starting HW scan\n");
2335 ath_offchannel_next(sc
);
2339 mutex_unlock(&sc
->mutex
);
2344 static void ath9k_cancel_hw_scan(struct ieee80211_hw
*hw
,
2345 struct ieee80211_vif
*vif
)
2347 struct ath_softc
*sc
= hw
->priv
;
2348 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2350 ath_dbg(common
, CHAN_CTX
, "Cancel HW scan on vif: %pM\n", vif
->addr
);
2352 mutex_lock(&sc
->mutex
);
2353 del_timer_sync(&sc
->offchannel
.timer
);
2354 ath_scan_complete(sc
, true);
2355 mutex_unlock(&sc
->mutex
);
2358 static int ath9k_remain_on_channel(struct ieee80211_hw
*hw
,
2359 struct ieee80211_vif
*vif
,
2360 struct ieee80211_channel
*chan
, int duration
,
2361 enum ieee80211_roc_type type
)
2363 struct ath_softc
*sc
= hw
->priv
;
2364 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2367 mutex_lock(&sc
->mutex
);
2369 if (WARN_ON(sc
->offchannel
.roc_vif
)) {
2374 ath9k_ps_wakeup(sc
);
2375 sc
->offchannel
.roc_vif
= vif
;
2376 sc
->offchannel
.roc_chan
= chan
;
2377 sc
->offchannel
.roc_duration
= duration
;
2379 ath_dbg(common
, CHAN_CTX
,
2380 "RoC request on vif: %pM, type: %d duration: %d\n",
2381 vif
->addr
, type
, duration
);
2383 if (sc
->offchannel
.state
== ATH_OFFCHANNEL_IDLE
) {
2384 ath_dbg(common
, CHAN_CTX
, "Starting RoC period\n");
2385 ath_offchannel_next(sc
);
2389 mutex_unlock(&sc
->mutex
);
2394 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw
*hw
)
2396 struct ath_softc
*sc
= hw
->priv
;
2397 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2399 mutex_lock(&sc
->mutex
);
2401 ath_dbg(common
, CHAN_CTX
, "Cancel RoC\n");
2402 del_timer_sync(&sc
->offchannel
.timer
);
2404 if (sc
->offchannel
.roc_vif
) {
2405 if (sc
->offchannel
.state
>= ATH_OFFCHANNEL_ROC_START
)
2406 ath_roc_complete(sc
, ATH_ROC_COMPLETE_CANCEL
);
2409 mutex_unlock(&sc
->mutex
);
2414 static int ath9k_add_chanctx(struct ieee80211_hw
*hw
,
2415 struct ieee80211_chanctx_conf
*conf
)
2417 struct ath_softc
*sc
= hw
->priv
;
2418 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2419 struct ath_chanctx
*ctx
, **ptr
;
2422 mutex_lock(&sc
->mutex
);
2424 ath_for_each_chanctx(sc
, ctx
) {
2428 ptr
= (void *) conf
->drv_priv
;
2430 ctx
->assigned
= true;
2431 pos
= ctx
- &sc
->chanctx
[0];
2432 ctx
->hw_queue_base
= pos
* IEEE80211_NUM_ACS
;
2434 ath_dbg(common
, CHAN_CTX
,
2435 "Add channel context: %d MHz\n",
2436 conf
->def
.chan
->center_freq
);
2438 ath_chanctx_set_channel(sc
, ctx
, &conf
->def
);
2440 mutex_unlock(&sc
->mutex
);
2444 mutex_unlock(&sc
->mutex
);
2449 static void ath9k_remove_chanctx(struct ieee80211_hw
*hw
,
2450 struct ieee80211_chanctx_conf
*conf
)
2452 struct ath_softc
*sc
= hw
->priv
;
2453 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2454 struct ath_chanctx
*ctx
= ath_chanctx_get(conf
);
2456 mutex_lock(&sc
->mutex
);
2458 ath_dbg(common
, CHAN_CTX
,
2459 "Remove channel context: %d MHz\n",
2460 conf
->def
.chan
->center_freq
);
2462 ctx
->assigned
= false;
2463 ctx
->hw_queue_base
= 0;
2464 ath_chanctx_event(sc
, NULL
, ATH_CHANCTX_EVENT_UNASSIGN
);
2466 mutex_unlock(&sc
->mutex
);
2469 static void ath9k_change_chanctx(struct ieee80211_hw
*hw
,
2470 struct ieee80211_chanctx_conf
*conf
,
2473 struct ath_softc
*sc
= hw
->priv
;
2474 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2475 struct ath_chanctx
*ctx
= ath_chanctx_get(conf
);
2477 mutex_lock(&sc
->mutex
);
2478 ath_dbg(common
, CHAN_CTX
,
2479 "Change channel context: %d MHz\n",
2480 conf
->def
.chan
->center_freq
);
2481 ath_chanctx_set_channel(sc
, ctx
, &conf
->def
);
2482 mutex_unlock(&sc
->mutex
);
2485 static int ath9k_assign_vif_chanctx(struct ieee80211_hw
*hw
,
2486 struct ieee80211_vif
*vif
,
2487 struct ieee80211_chanctx_conf
*conf
)
2489 struct ath_softc
*sc
= hw
->priv
;
2490 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2491 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
2492 struct ath_chanctx
*ctx
= ath_chanctx_get(conf
);
2495 ath9k_cancel_pending_offchannel(sc
);
2497 mutex_lock(&sc
->mutex
);
2499 ath_dbg(common
, CHAN_CTX
,
2500 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2501 vif
->addr
, vif
->type
, vif
->p2p
,
2502 conf
->def
.chan
->center_freq
);
2505 ctx
->nvifs_assigned
++;
2506 list_add_tail(&avp
->list
, &ctx
->vifs
);
2507 ath9k_calculate_summary_state(sc
, ctx
);
2508 for (i
= 0; i
< IEEE80211_NUM_ACS
; i
++)
2509 vif
->hw_queue
[i
] = ctx
->hw_queue_base
+ i
;
2511 mutex_unlock(&sc
->mutex
);
2516 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw
*hw
,
2517 struct ieee80211_vif
*vif
,
2518 struct ieee80211_chanctx_conf
*conf
)
2520 struct ath_softc
*sc
= hw
->priv
;
2521 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2522 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
2523 struct ath_chanctx
*ctx
= ath_chanctx_get(conf
);
2526 ath9k_cancel_pending_offchannel(sc
);
2528 mutex_lock(&sc
->mutex
);
2530 ath_dbg(common
, CHAN_CTX
,
2531 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2532 vif
->addr
, vif
->type
, vif
->p2p
,
2533 conf
->def
.chan
->center_freq
);
2535 avp
->chanctx
= NULL
;
2536 ctx
->nvifs_assigned
--;
2537 list_del(&avp
->list
);
2538 ath9k_calculate_summary_state(sc
, ctx
);
2539 for (ac
= 0; ac
< IEEE80211_NUM_ACS
; ac
++)
2540 vif
->hw_queue
[ac
] = IEEE80211_INVAL_HW_QUEUE
;
2542 mutex_unlock(&sc
->mutex
);
2545 static void ath9k_mgd_prepare_tx(struct ieee80211_hw
*hw
,
2546 struct ieee80211_vif
*vif
)
2548 struct ath_softc
*sc
= hw
->priv
;
2549 struct ath_common
*common
= ath9k_hw_common(sc
->sc_ah
);
2550 struct ath_vif
*avp
= (struct ath_vif
*) vif
->drv_priv
;
2551 struct ath_beacon_config
*cur_conf
;
2552 struct ath_chanctx
*go_ctx
;
2553 unsigned long timeout
;
2554 bool changed
= false;
2557 if (!test_bit(ATH_OP_MULTI_CHANNEL
, &common
->op_flags
))
2563 mutex_lock(&sc
->mutex
);
2565 spin_lock_bh(&sc
->chan_lock
);
2566 if (sc
->next_chan
|| (sc
->cur_chan
!= avp
->chanctx
))
2568 spin_unlock_bh(&sc
->chan_lock
);
2573 ath9k_cancel_pending_offchannel(sc
);
2575 go_ctx
= ath_is_go_chanctx_present(sc
);
2579 * Wait till the GO interface gets a chance
2580 * to send out an NoA.
2582 spin_lock_bh(&sc
->chan_lock
);
2583 sc
->sched
.mgd_prepare_tx
= true;
2584 cur_conf
= &go_ctx
->beacon
;
2585 beacon_int
= TU_TO_USEC(cur_conf
->beacon_interval
);
2586 spin_unlock_bh(&sc
->chan_lock
);
2588 timeout
= usecs_to_jiffies(beacon_int
* 2);
2589 init_completion(&sc
->go_beacon
);
2591 mutex_unlock(&sc
->mutex
);
2593 if (wait_for_completion_timeout(&sc
->go_beacon
,
2595 ath_dbg(common
, CHAN_CTX
,
2596 "Failed to send new NoA\n");
2598 spin_lock_bh(&sc
->chan_lock
);
2599 sc
->sched
.mgd_prepare_tx
= false;
2600 spin_unlock_bh(&sc
->chan_lock
);
2603 mutex_lock(&sc
->mutex
);
2606 ath_dbg(common
, CHAN_CTX
,
2607 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2608 __func__
, vif
->addr
);
2610 spin_lock_bh(&sc
->chan_lock
);
2611 sc
->next_chan
= avp
->chanctx
;
2612 sc
->sched
.state
= ATH_CHANCTX_STATE_FORCE_ACTIVE
;
2613 spin_unlock_bh(&sc
->chan_lock
);
2615 ath_chanctx_set_next(sc
, true);
2617 mutex_unlock(&sc
->mutex
);
2620 void ath9k_fill_chanctx_ops(void)
2622 if (!ath9k_is_chanctx_enabled())
2625 ath9k_ops
.hw_scan
= ath9k_hw_scan
;
2626 ath9k_ops
.cancel_hw_scan
= ath9k_cancel_hw_scan
;
2627 ath9k_ops
.remain_on_channel
= ath9k_remain_on_channel
;
2628 ath9k_ops
.cancel_remain_on_channel
= ath9k_cancel_remain_on_channel
;
2629 ath9k_ops
.add_chanctx
= ath9k_add_chanctx
;
2630 ath9k_ops
.remove_chanctx
= ath9k_remove_chanctx
;
2631 ath9k_ops
.change_chanctx
= ath9k_change_chanctx
;
2632 ath9k_ops
.assign_vif_chanctx
= ath9k_assign_vif_chanctx
;
2633 ath9k_ops
.unassign_vif_chanctx
= ath9k_unassign_vif_chanctx
;
2634 ath9k_ops
.mgd_prepare_tx
= ath9k_mgd_prepare_tx
;
2639 static int ath9k_get_txpower(struct ieee80211_hw
*hw
, struct ieee80211_vif
*vif
,
2642 struct ath_softc
*sc
= hw
->priv
;
2643 struct ath_vif
*avp
= (void *)vif
->drv_priv
;
2645 mutex_lock(&sc
->mutex
);
2647 *dbm
= avp
->chanctx
->cur_txpower
;
2649 *dbm
= sc
->cur_chan
->cur_txpower
;
2650 mutex_unlock(&sc
->mutex
);
2657 struct ieee80211_ops ath9k_ops
= {
2659 .start
= ath9k_start
,
2661 .add_interface
= ath9k_add_interface
,
2662 .change_interface
= ath9k_change_interface
,
2663 .remove_interface
= ath9k_remove_interface
,
2664 .config
= ath9k_config
,
2665 .configure_filter
= ath9k_configure_filter
,
2666 .sta_state
= ath9k_sta_state
,
2667 .sta_notify
= ath9k_sta_notify
,
2668 .conf_tx
= ath9k_conf_tx
,
2669 .bss_info_changed
= ath9k_bss_info_changed
,
2670 .set_key
= ath9k_set_key
,
2671 .get_tsf
= ath9k_get_tsf
,
2672 .set_tsf
= ath9k_set_tsf
,
2673 .reset_tsf
= ath9k_reset_tsf
,
2674 .ampdu_action
= ath9k_ampdu_action
,
2675 .get_survey
= ath9k_get_survey
,
2676 .rfkill_poll
= ath9k_rfkill_poll_state
,
2677 .set_coverage_class
= ath9k_set_coverage_class
,
2678 .flush
= ath9k_flush
,
2679 .tx_frames_pending
= ath9k_tx_frames_pending
,
2680 .tx_last_beacon
= ath9k_tx_last_beacon
,
2681 .release_buffered_frames
= ath9k_release_buffered_frames
,
2682 .get_stats
= ath9k_get_stats
,
2683 .set_antenna
= ath9k_set_antenna
,
2684 .get_antenna
= ath9k_get_antenna
,
2686 #ifdef CONFIG_ATH9K_WOW
2687 .suspend
= ath9k_suspend
,
2688 .resume
= ath9k_resume
,
2689 .set_wakeup
= ath9k_set_wakeup
,
2692 #ifdef CONFIG_ATH9K_DEBUGFS
2693 .get_et_sset_count
= ath9k_get_et_sset_count
,
2694 .get_et_stats
= ath9k_get_et_stats
,
2695 .get_et_strings
= ath9k_get_et_strings
,
2698 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2699 .sta_add_debugfs
= ath9k_sta_add_debugfs
,
2701 .sw_scan_start
= ath9k_sw_scan_start
,
2702 .sw_scan_complete
= ath9k_sw_scan_complete
,
2703 .get_txpower
= ath9k_get_txpower
,