?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[cris-mirror.git] / drivers / net / wireless / realtek / rtlwifi / rtl8192de / dm.c
blob7c1db7e7572dc3fa44d6f7849250f537206475e1
1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30 #include "../wifi.h"
31 #include "../base.h"
32 #include "../core.h"
33 #include "reg.h"
34 #include "def.h"
35 #include "phy.h"
36 #include "dm.h"
37 #include "fw.h"
38
39 #define UNDEC_SM_PWDB entry_min_undec_sm_pwdb
40
41 static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
42 0x7f8001fe, /* 0, +6.0dB */
43 0x788001e2, /* 1, +5.5dB */
44 0x71c001c7, /* 2, +5.0dB */
45 0x6b8001ae, /* 3, +4.5dB */
46 0x65400195, /* 4, +4.0dB */
47 0x5fc0017f, /* 5, +3.5dB */
48 0x5a400169, /* 6, +3.0dB */
49 0x55400155, /* 7, +2.5dB */
50 0x50800142, /* 8, +2.0dB */
51 0x4c000130, /* 9, +1.5dB */
52 0x47c0011f, /* 10, +1.0dB */
53 0x43c0010f, /* 11, +0.5dB */
54 0x40000100, /* 12, +0dB */
55 0x3c8000f2, /* 13, -0.5dB */
56 0x390000e4, /* 14, -1.0dB */
57 0x35c000d7, /* 15, -1.5dB */
58 0x32c000cb, /* 16, -2.0dB */
59 0x300000c0, /* 17, -2.5dB */
60 0x2d4000b5, /* 18, -3.0dB */
61 0x2ac000ab, /* 19, -3.5dB */
62 0x288000a2, /* 20, -4.0dB */
63 0x26000098, /* 21, -4.5dB */
64 0x24000090, /* 22, -5.0dB */
65 0x22000088, /* 23, -5.5dB */
66 0x20000080, /* 24, -6.0dB */
67 0x1e400079, /* 25, -6.5dB */
68 0x1c800072, /* 26, -7.0dB */
69 0x1b00006c, /* 27. -7.5dB */
70 0x19800066, /* 28, -8.0dB */
71 0x18000060, /* 29, -8.5dB */
72 0x16c0005b, /* 30, -9.0dB */
73 0x15800056, /* 31, -9.5dB */
74 0x14400051, /* 32, -10.0dB */
75 0x1300004c, /* 33, -10.5dB */
76 0x12000048, /* 34, -11.0dB */
77 0x11000044, /* 35, -11.5dB */
78 0x10000040, /* 36, -12.0dB */
79 0x0f00003c, /* 37, -12.5dB */
80 0x0e400039, /* 38, -13.0dB */
81 0x0d800036, /* 39, -13.5dB */
82 0x0cc00033, /* 40, -14.0dB */
83 0x0c000030, /* 41, -14.5dB */
84 0x0b40002d, /* 42, -15.0dB */
85 };
86
87 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
88 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
89 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
90 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
91 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
92 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
93 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
94 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
95 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
96 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
97 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
98 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
99 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
100 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
101 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
102 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
103 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
104 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
105 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
106 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
107 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
108 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
109 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
110 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
111 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
112 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
113 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
114 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
115 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
116 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
117 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
118 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
119 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
120 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
121 };
122
123 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
124 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
125 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
126 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
127 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
128 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
129 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
130 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
131 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
132 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
133 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
134 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
135 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
136 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
137 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
138 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
139 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
140 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
141 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
142 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
143 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
144 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
145 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
146 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
147 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
148 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
149 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
150 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
151 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
152 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
153 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
154 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
155 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
156 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
157 };
158
159 static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
160 {
161 u32 ret_value;
162 struct rtl_priv *rtlpriv = rtl_priv(hw);
163 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
164 unsigned long flag = 0;
165
166 /* hold ofdm counter */
167 rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
168 rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
169
170 ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, MASKDWORD);
171 falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
172 falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
173 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
174 falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
175 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
176 falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
177 falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
178 ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
179 falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
180 falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
181 falsealm_cnt->cnt_rate_illegal +
182 falsealm_cnt->cnt_crc8_fail +
183 falsealm_cnt->cnt_mcs_fail +
184 falsealm_cnt->cnt_fast_fsync_fail +
185 falsealm_cnt->cnt_sb_search_fail;
186
187 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
188 /* hold cck counter */
189 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
190 ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
191 falsealm_cnt->cnt_cck_fail = ret_value;
192 ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
193 falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
194 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
195 } else {
196 falsealm_cnt->cnt_cck_fail = 0;
197 }
198
199 /* reset false alarm counter registers */
200 falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
201 falsealm_cnt->cnt_sb_search_fail +
202 falsealm_cnt->cnt_parity_fail +
203 falsealm_cnt->cnt_rate_illegal +
204 falsealm_cnt->cnt_crc8_fail +
205 falsealm_cnt->cnt_mcs_fail +
206 falsealm_cnt->cnt_cck_fail;
207
208 rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
209 /* update ofdm counter */
210 rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
211 /* update page C counter */
212 rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
213 /* update page D counter */
214 rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
215 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
216 /* reset cck counter */
217 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
218 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
219 /* enable cck counter */
220 rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
221 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
222 }
223 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
224 "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n",
225 falsealm_cnt->cnt_fast_fsync_fail,
226 falsealm_cnt->cnt_sb_search_fail);
227 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
228 "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n",
229 falsealm_cnt->cnt_parity_fail,
230 falsealm_cnt->cnt_rate_illegal,
231 falsealm_cnt->cnt_crc8_fail,
232 falsealm_cnt->cnt_mcs_fail);
233 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
234 "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n",
235 falsealm_cnt->cnt_ofdm_fail,
236 falsealm_cnt->cnt_cck_fail,
237 falsealm_cnt->cnt_all);
238 }
239
240 static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
241 {
242 struct rtl_priv *rtlpriv = rtl_priv(hw);
243 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
244 struct rtl_mac *mac = rtl_mac(rtlpriv);
245
246 /* Determine the minimum RSSI */
247 if ((mac->link_state < MAC80211_LINKED) &&
248 (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
249 de_digtable->min_undec_pwdb_for_dm = 0;
250 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
251 "Not connected to any\n");
252 }
253 if (mac->link_state >= MAC80211_LINKED) {
254 if (mac->opmode == NL80211_IFTYPE_AP ||
255 mac->opmode == NL80211_IFTYPE_ADHOC) {
256 de_digtable->min_undec_pwdb_for_dm =
257 rtlpriv->dm.UNDEC_SM_PWDB;
258 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
259 "AP Client PWDB = 0x%lx\n",
260 rtlpriv->dm.UNDEC_SM_PWDB);
261 } else {
262 de_digtable->min_undec_pwdb_for_dm =
263 rtlpriv->dm.undec_sm_pwdb;
264 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
265 "STA Default Port PWDB = 0x%x\n",
266 de_digtable->min_undec_pwdb_for_dm);
267 }
268 } else {
269 de_digtable->min_undec_pwdb_for_dm = rtlpriv->dm.UNDEC_SM_PWDB;
270 RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
271 "AP Ext Port or disconnect PWDB = 0x%x\n",
272 de_digtable->min_undec_pwdb_for_dm);
273 }
274
275 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
276 de_digtable->min_undec_pwdb_for_dm);
277 }
278
279 static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
280 {
281 struct rtl_priv *rtlpriv = rtl_priv(hw);
282 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
283 unsigned long flag = 0;
284
285 if (de_digtable->cursta_cstate == DIG_STA_CONNECT) {
286 if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
287 if (de_digtable->min_undec_pwdb_for_dm <= 25)
288 de_digtable->cur_cck_pd_state =
289 CCK_PD_STAGE_LOWRSSI;
290 else
291 de_digtable->cur_cck_pd_state =
292 CCK_PD_STAGE_HIGHRSSI;
293 } else {
294 if (de_digtable->min_undec_pwdb_for_dm <= 20)
295 de_digtable->cur_cck_pd_state =
296 CCK_PD_STAGE_LOWRSSI;
297 else
298 de_digtable->cur_cck_pd_state =
299 CCK_PD_STAGE_HIGHRSSI;
300 }
301 } else {
302 de_digtable->cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
303 }
304 if (de_digtable->pre_cck_pd_state != de_digtable->cur_cck_pd_state) {
305 if (de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
306 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
307 rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0x83);
308 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
309 } else {
310 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
311 rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
312 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
313 }
314 de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state;
315 }
316 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",
317 de_digtable->cursta_cstate == DIG_STA_CONNECT ?
318 "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");
319 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",
320 de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
321 "Low RSSI " : "High RSSI ");
322 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",
323 IS_92D_SINGLEPHY(rtlpriv->rtlhal.version));
324
325 }
326
327 void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
328 {
329 struct rtl_priv *rtlpriv = rtl_priv(hw);
330 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
331
332 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
333 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n",
334 de_digtable->cur_igvalue, de_digtable->pre_igvalue,
335 de_digtable->back_val);
336 if (de_digtable->dig_enable_flag == false) {
337 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");
338 de_digtable->pre_igvalue = 0x17;
339 return;
340 }
341 if (de_digtable->pre_igvalue != de_digtable->cur_igvalue) {
342 rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
343 de_digtable->cur_igvalue);
344 rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
345 de_digtable->cur_igvalue);
346 de_digtable->pre_igvalue = de_digtable->cur_igvalue;
347 }
348 }
349
350 static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
351 {
352 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
353
354 if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
355 (rtlpriv->mac80211.vendor == PEER_CISCO)) {
356 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");
357 if (de_digtable->last_min_undec_pwdb_for_dm >= 50
358 && de_digtable->min_undec_pwdb_for_dm < 50) {
359 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
360 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
361 "Early Mode Off\n");
362 } else if (de_digtable->last_min_undec_pwdb_for_dm <= 55 &&
363 de_digtable->min_undec_pwdb_for_dm > 55) {
364 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
365 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
366 "Early Mode On\n");
367 }
368 } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
369 rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
370 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n");
371 }
372 }
373
374 static void rtl92d_dm_dig(struct ieee80211_hw *hw)
375 {
376 struct rtl_priv *rtlpriv = rtl_priv(hw);
377 struct dig_t *de_digtable = &rtlpriv->dm_digtable;
378 u8 value_igi = de_digtable->cur_igvalue;
379 struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
380
381 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n");
382 if (rtlpriv->rtlhal.earlymode_enable) {
383 rtl92d_early_mode_enabled(rtlpriv);
384 de_digtable->last_min_undec_pwdb_for_dm =
385 de_digtable->min_undec_pwdb_for_dm;
386 }
387 if (!rtlpriv->dm.dm_initialgain_enable)
388 return;
389
390 /* because we will send data pkt when scanning
391 * this will cause some ap like gear-3700 wep TP
392 * lower if we return here, this is the diff of
393 * mac80211 driver vs ieee80211 driver */
394 /* if (rtlpriv->mac80211.act_scanning)
395 * return; */
396
397 /* Not STA mode return tmp */
398 if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
399 return;
400 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");
401 /* Decide the current status and if modify initial gain or not */
402 if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
403 de_digtable->cursta_cstate = DIG_STA_CONNECT;
404 else
405 de_digtable->cursta_cstate = DIG_STA_DISCONNECT;
406
407 /* adjust initial gain according to false alarm counter */
408 if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
409 value_igi--;
410 else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
411 value_igi += 0;
412 else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
413 value_igi++;
414 else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
415 value_igi += 2;
416 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
417 "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
418 de_digtable->large_fa_hit, de_digtable->forbidden_igi);
419 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
420 "dm_DIG() Before: Recover_cnt=%d, rx_gain_min=%x\n",
421 de_digtable->recover_cnt, de_digtable->rx_gain_min);
422
423 /* deal with abnormally large false alarm */
424 if (falsealm_cnt->cnt_all > 10000) {
425 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
426 "dm_DIG(): Abnormally false alarm case\n");
427
428 de_digtable->large_fa_hit++;
429 if (de_digtable->forbidden_igi < de_digtable->cur_igvalue) {
430 de_digtable->forbidden_igi = de_digtable->cur_igvalue;
431 de_digtable->large_fa_hit = 1;
432 }
433 if (de_digtable->large_fa_hit >= 3) {
434 if ((de_digtable->forbidden_igi + 1) > DM_DIG_MAX)
435 de_digtable->rx_gain_min = DM_DIG_MAX;
436 else
437 de_digtable->rx_gain_min =
438 (de_digtable->forbidden_igi + 1);
439 de_digtable->recover_cnt = 3600; /* 3600=2hr */
440 }
441 } else {
442 /* Recovery mechanism for IGI lower bound */
443 if (de_digtable->recover_cnt != 0) {
444 de_digtable->recover_cnt--;
445 } else {
446 if (de_digtable->large_fa_hit == 0) {
447 if ((de_digtable->forbidden_igi - 1) <
448 DM_DIG_FA_LOWER) {
449 de_digtable->forbidden_igi =
450 DM_DIG_FA_LOWER;
451 de_digtable->rx_gain_min =
452 DM_DIG_FA_LOWER;
453
454 } else {
455 de_digtable->forbidden_igi--;
456 de_digtable->rx_gain_min =
457 (de_digtable->forbidden_igi + 1);
458 }
459 } else if (de_digtable->large_fa_hit == 3) {
460 de_digtable->large_fa_hit = 0;
461 }
462 }
463 }
464 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
465 "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
466 de_digtable->large_fa_hit, de_digtable->forbidden_igi);
467 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
468 "dm_DIG() After: recover_cnt=%d, rx_gain_min=%x\n",
469 de_digtable->recover_cnt, de_digtable->rx_gain_min);
470
471 if (value_igi > DM_DIG_MAX)
472 value_igi = DM_DIG_MAX;
473 else if (value_igi < de_digtable->rx_gain_min)
474 value_igi = de_digtable->rx_gain_min;
475 de_digtable->cur_igvalue = value_igi;
476 rtl92d_dm_write_dig(hw);
477 if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
478 rtl92d_dm_cck_packet_detection_thresh(hw);
479 RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n");
480 }
481
482 static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
483 {
484 struct rtl_priv *rtlpriv = rtl_priv(hw);
485
486 rtlpriv->dm.dynamic_txpower_enable = true;
487 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
488 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
489 }
490
491 static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
492 {
493 struct rtl_priv *rtlpriv = rtl_priv(hw);
494 struct rtl_phy *rtlphy = &(rtlpriv->phy);
495 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
496 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
497 long undec_sm_pwdb;
498
499 if ((!rtlpriv->dm.dynamic_txpower_enable)
500 || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
501 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
502 return;
503 }
504 if ((mac->link_state < MAC80211_LINKED) &&
505 (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
506 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
507 "Not connected to any\n");
508 rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
509 rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
510 return;
511 }
512 if (mac->link_state >= MAC80211_LINKED) {
513 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
514 undec_sm_pwdb =
515 rtlpriv->dm.UNDEC_SM_PWDB;
516 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
517 "IBSS Client PWDB = 0x%lx\n",
518 undec_sm_pwdb);
519 } else {
520 undec_sm_pwdb =
521 rtlpriv->dm.undec_sm_pwdb;
522 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
523 "STA Default Port PWDB = 0x%lx\n",
524 undec_sm_pwdb);
525 }
526 } else {
527 undec_sm_pwdb =
528 rtlpriv->dm.UNDEC_SM_PWDB;
529
530 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
531 "AP Ext Port PWDB = 0x%lx\n",
532 undec_sm_pwdb);
533 }
534 if (rtlhal->current_bandtype == BAND_ON_5G) {
535 if (undec_sm_pwdb >= 0x33) {
536 rtlpriv->dm.dynamic_txhighpower_lvl =
537 TXHIGHPWRLEVEL_LEVEL2;
538 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
539 "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
540 } else if ((undec_sm_pwdb < 0x33)
541 && (undec_sm_pwdb >= 0x2b)) {
542 rtlpriv->dm.dynamic_txhighpower_lvl =
543 TXHIGHPWRLEVEL_LEVEL1;
544 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
545 "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
546 } else if (undec_sm_pwdb < 0x2b) {
547 rtlpriv->dm.dynamic_txhighpower_lvl =
548 TXHIGHPWRLEVEL_NORMAL;
549 RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
550 "5G:TxHighPwrLevel_Normal\n");
551 }
552 } else {
553 if (undec_sm_pwdb >=
554 TX_POWER_NEAR_FIELD_THRESH_LVL2) {
555 rtlpriv->dm.dynamic_txhighpower_lvl =
556 TXHIGHPWRLEVEL_LEVEL2;
557 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
558 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
559 } else
560 if ((undec_sm_pwdb <
561 (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
562 && (undec_sm_pwdb >=
563 TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
564
565 rtlpriv->dm.dynamic_txhighpower_lvl =
566 TXHIGHPWRLEVEL_LEVEL1;
567 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
568 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
569 } else if (undec_sm_pwdb <
570 (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
571 rtlpriv->dm.dynamic_txhighpower_lvl =
572 TXHIGHPWRLEVEL_NORMAL;
573 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
574 "TXHIGHPWRLEVEL_NORMAL\n");
575 }
576 }
577 if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
578 RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
579 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
580 rtlphy->current_channel);
581 rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
582 }
583 rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
584 }
585
586 static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
587 {
588 struct rtl_priv *rtlpriv = rtl_priv(hw);
589
590 /* AP & ADHOC & MESH will return tmp */
591 if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
592 return;
593 /* Indicate Rx signal strength to FW. */
594 if (rtlpriv->dm.useramask) {
595 u32 temp = rtlpriv->dm.undec_sm_pwdb;
596
597 temp <<= 16;
598 temp |= 0x100;
599 /* fw v12 cmdid 5:use max macid ,for nic ,
600 * default macid is 0 ,max macid is 1 */
601 rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
602 } else {
603 rtl_write_byte(rtlpriv, 0x4fe,
604 (u8) rtlpriv->dm.undec_sm_pwdb);
605 }
606 }
607
608 void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
609 {
610 struct rtl_priv *rtlpriv = rtl_priv(hw);
611
612 rtlpriv->dm.current_turbo_edca = false;
613 rtlpriv->dm.is_any_nonbepkts = false;
614 rtlpriv->dm.is_cur_rdlstate = false;
615 }
616
617 static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
618 {
619 struct rtl_priv *rtlpriv = rtl_priv(hw);
620 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
621 static u64 last_txok_cnt;
622 static u64 last_rxok_cnt;
623 u64 cur_txok_cnt;
624 u64 cur_rxok_cnt;
625 u32 edca_be_ul = 0x5ea42b;
626 u32 edca_be_dl = 0x5ea42b;
627
628 if (mac->link_state != MAC80211_LINKED) {
629 rtlpriv->dm.current_turbo_edca = false;
630 goto exit;
631 }
632
633 /* Enable BEQ TxOP limit configuration in wireless G-mode. */
634 /* To check whether we shall force turn on TXOP configuration. */
635 if ((!rtlpriv->dm.disable_framebursting) &&
636 (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
637 rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
638 rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
639 /* Force TxOP limit to 0x005e for UL. */
640 if (!(edca_be_ul & 0xffff0000))
641 edca_be_ul |= 0x005e0000;
642 /* Force TxOP limit to 0x005e for DL. */
643 if (!(edca_be_dl & 0xffff0000))
644 edca_be_dl |= 0x005e0000;
645 }
646
647 if ((!rtlpriv->dm.is_any_nonbepkts) &&
648 (!rtlpriv->dm.disable_framebursting)) {
649 cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
650 cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
651 if (cur_rxok_cnt > 4 * cur_txok_cnt) {
652 if (!rtlpriv->dm.is_cur_rdlstate ||
653 !rtlpriv->dm.current_turbo_edca) {
654 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
655 edca_be_dl);
656 rtlpriv->dm.is_cur_rdlstate = true;
657 }
658 } else {
659 if (rtlpriv->dm.is_cur_rdlstate ||
660 !rtlpriv->dm.current_turbo_edca) {
661 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
662 edca_be_ul);
663 rtlpriv->dm.is_cur_rdlstate = false;
664 }
665 }
666 rtlpriv->dm.current_turbo_edca = true;
667 } else {
668 if (rtlpriv->dm.current_turbo_edca) {
669 u8 tmp = AC0_BE;
670 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
671 &tmp);
672 rtlpriv->dm.current_turbo_edca = false;
673 }
674 }
675
676 exit:
677 rtlpriv->dm.is_any_nonbepkts = false;
678 last_txok_cnt = rtlpriv->stats.txbytesunicast;
679 last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
680 }
681
682 static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
683 {
684 struct rtl_priv *rtlpriv = rtl_priv(hw);
685 u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
686 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
687 0x0a, 0x09, 0x08, 0x07, 0x06,
688 0x05, 0x04, 0x04, 0x03, 0x02
689 };
690 int i;
691 u32 u4tmp;
692
693 u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
694 rtlpriv->dm.thermalvalue_rxgain)]) << 12;
695 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
696 "===> Rx Gain %x\n", u4tmp);
697 for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
698 rtl_set_rfreg(hw, i, 0x3C, RFREG_OFFSET_MASK,
699 (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
700 }
701
702 static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
703 u8 *cck_index_old)
704 {
705 struct rtl_priv *rtlpriv = rtl_priv(hw);
706 int i;
707 unsigned long flag = 0;
708 long temp_cck;
709
710 /* Query CCK default setting From 0xa24 */
711 rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
712 temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
713 MASKDWORD) & MASKCCK;
714 rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
715 for (i = 0; i < CCK_TABLE_LENGTH; i++) {
716 if (rtlpriv->dm.cck_inch14) {
717 if (!memcmp((void *)&temp_cck,
718 (void *)&cckswing_table_ch14[i][2], 4)) {
719 *cck_index_old = (u8) i;
720 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
721 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
722 RCCK0_TXFILTER2, temp_cck,
723 *cck_index_old,
724 rtlpriv->dm.cck_inch14);
725 break;
726 }
727 } else {
728 if (!memcmp((void *) &temp_cck,
729 &cckswing_table_ch1ch13[i][2], 4)) {
730 *cck_index_old = (u8) i;
731 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
732 "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
733 RCCK0_TXFILTER2, temp_cck,
734 *cck_index_old,
735 rtlpriv->dm.cck_inch14);
736 break;
737 }
738 }
739 }
740 *temp_cckg = temp_cck;
741 }
742
743 static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
744 bool *internal_pa, u8 thermalvalue, u8 delta,
745 u8 rf, struct rtl_efuse *rtlefuse,
746 struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
747 u8 index_mapping[5][INDEX_MAPPING_NUM],
748 u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
749 {
750 int i;
751 u8 index;
752 u8 offset = 0;
753
754 for (i = 0; i < rf; i++) {
755 if (rtlhal->macphymode == DUALMAC_DUALPHY &&
756 rtlhal->interfaceindex == 1) /* MAC 1 5G */
757 *internal_pa = rtlefuse->internal_pa_5g[1];
758 else
759 *internal_pa = rtlefuse->internal_pa_5g[i];
760 if (*internal_pa) {
761 if (rtlhal->interfaceindex == 1 || i == rf)
762 offset = 4;
763 else
764 offset = 0;
765 if (rtlphy->current_channel >= 100 &&
766 rtlphy->current_channel <= 165)
767 offset += 2;
768 } else {
769 if (rtlhal->interfaceindex == 1 || i == rf)
770 offset = 2;
771 else
772 offset = 0;
773 }
774 if (thermalvalue > rtlefuse->eeprom_thermalmeter)
775 offset++;
776 if (*internal_pa) {
777 if (delta > INDEX_MAPPING_NUM - 1)
778 index = index_mapping_pa[offset]
779 [INDEX_MAPPING_NUM - 1];
780 else
781 index =
782 index_mapping_pa[offset][delta];
783 } else {
784 if (delta > INDEX_MAPPING_NUM - 1)
785 index =
786 index_mapping[offset][INDEX_MAPPING_NUM - 1];
787 else
788 index = index_mapping[offset][delta];
789 }
790 if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
791 if (*internal_pa && thermalvalue > 0x12) {
792 ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
793 ((delta / 2) * 3 + (delta % 2));
794 } else {
795 ofdm_index[i] -= index;
796 }
797 } else {
798 ofdm_index[i] += index;
799 }
800 }
801 }
802
803 static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
804 struct ieee80211_hw *hw)
805 {
806 struct rtl_priv *rtlpriv = rtl_priv(hw);
807 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
808 struct rtl_phy *rtlphy = &(rtlpriv->phy);
809 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
810 u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
811 u8 offset, thermalvalue_avg_count = 0;
812 u32 thermalvalue_avg = 0;
813 bool internal_pa = false;
814 long ele_a = 0, ele_d, temp_cck, val_x, value32;
815 long val_y, ele_c = 0;
816 u8 ofdm_index[3];
817 s8 cck_index = 0;
818 u8 ofdm_index_old[3] = {0, 0, 0};
819 s8 cck_index_old = 0;
820 u8 index;
821 int i;
822 bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
823 u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
824 u8 indexforchannel =
825 rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
826 u8 index_mapping[5][INDEX_MAPPING_NUM] = {
827 /* 5G, path A/MAC 0, decrease power */
828 {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
829 /* 5G, path A/MAC 0, increase power */
830 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
831 /* 5G, path B/MAC 1, decrease power */
832 {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
833 /* 5G, path B/MAC 1, increase power */
834 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
835 /* 2.4G, for decreas power */
836 {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
837 };
838 u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
839 /* 5G, path A/MAC 0, ch36-64, decrease power */
840 {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
841 /* 5G, path A/MAC 0, ch36-64, increase power */
842 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
843 /* 5G, path A/MAC 0, ch100-165, decrease power */
844 {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
845 /* 5G, path A/MAC 0, ch100-165, increase power */
846 {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
847 /* 5G, path B/MAC 1, ch36-64, decrease power */
848 {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
849 /* 5G, path B/MAC 1, ch36-64, increase power */
850 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
851 /* 5G, path B/MAC 1, ch100-165, decrease power */
852 {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
853 /* 5G, path B/MAC 1, ch100-165, increase power */
854 {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
855 };
856
857 rtlpriv->dm.txpower_trackinginit = true;
858 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
859 thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
860 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
861 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
862 thermalvalue,
863 rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
864 rtl92d_phy_ap_calibrate(hw, (thermalvalue -
865 rtlefuse->eeprom_thermalmeter));
866 if (is2t)
867 rf = 2;
868 else
869 rf = 1;
870 if (thermalvalue) {
871 ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
872 MASKDWORD) & MASKOFDM_D;
873 for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
874 if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
875 ofdm_index_old[0] = (u8) i;
876
877 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
878 "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
879 ROFDM0_XATxIQIMBALANCE,
880 ele_d, ofdm_index_old[0]);
881 break;
882 }
883 }
884 if (is2t) {
885 ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
886 MASKDWORD) & MASKOFDM_D;
887 for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
888 if (ele_d ==
889 (ofdmswing_table[i] & MASKOFDM_D)) {
890 ofdm_index_old[1] = (u8) i;
891 RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
892 DBG_LOUD,
893 "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
894 ROFDM0_XBTxIQIMBALANCE, ele_d,
895 ofdm_index_old[1]);
896 break;
897 }
898 }
899 }
900 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
901 rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
902 } else {
903 temp_cck = 0x090e1317;
904 cck_index_old = 12;
905 }
906
907 if (!rtlpriv->dm.thermalvalue) {
908 rtlpriv->dm.thermalvalue =
909 rtlefuse->eeprom_thermalmeter;
910 rtlpriv->dm.thermalvalue_lck = thermalvalue;
911 rtlpriv->dm.thermalvalue_iqk = thermalvalue;
912 rtlpriv->dm.thermalvalue_rxgain =
913 rtlefuse->eeprom_thermalmeter;
914 for (i = 0; i < rf; i++)
915 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
916 rtlpriv->dm.cck_index = cck_index_old;
917 }
918 if (rtlhal->reloadtxpowerindex) {
919 for (i = 0; i < rf; i++)
920 rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
921 rtlpriv->dm.cck_index = cck_index_old;
922 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
923 "reload ofdm index for band switch\n");
924 }
925 rtlpriv->dm.thermalvalue_avg
926 [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
927 rtlpriv->dm.thermalvalue_avg_index++;
928 if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
929 rtlpriv->dm.thermalvalue_avg_index = 0;
930 for (i = 0; i < AVG_THERMAL_NUM; i++) {
931 if (rtlpriv->dm.thermalvalue_avg[i]) {
932 thermalvalue_avg +=
933 rtlpriv->dm.thermalvalue_avg[i];
934 thermalvalue_avg_count++;
935 }
936 }
937 if (thermalvalue_avg_count)
938 thermalvalue = (u8) (thermalvalue_avg /
939 thermalvalue_avg_count);
940 if (rtlhal->reloadtxpowerindex) {
941 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
942 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
943 (rtlefuse->eeprom_thermalmeter - thermalvalue);
944 rtlhal->reloadtxpowerindex = false;
945 rtlpriv->dm.done_txpower = false;
946 } else if (rtlpriv->dm.done_txpower) {
947 delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
948 (thermalvalue - rtlpriv->dm.thermalvalue) :
949 (rtlpriv->dm.thermalvalue - thermalvalue);
950 } else {
951 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
952 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
953 (rtlefuse->eeprom_thermalmeter - thermalvalue);
954 }
955 delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
956 (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
957 (rtlpriv->dm.thermalvalue_lck - thermalvalue);
958 delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
959 (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
960 (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
961 delta_rxgain =
962 (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
963 (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
964 (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
965 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
966 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
967 thermalvalue, rtlpriv->dm.thermalvalue,
968 rtlefuse->eeprom_thermalmeter, delta, delta_lck,
969 delta_iqk);
970 if ((delta_lck > rtlefuse->delta_lck) &&
971 (rtlefuse->delta_lck != 0)) {
972 rtlpriv->dm.thermalvalue_lck = thermalvalue;
973 rtl92d_phy_lc_calibrate(hw);
974 }
975 if (delta > 0 && rtlpriv->dm.txpower_track_control) {
976 rtlpriv->dm.done_txpower = true;
977 delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
978 (thermalvalue - rtlefuse->eeprom_thermalmeter) :
979 (rtlefuse->eeprom_thermalmeter - thermalvalue);
980 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
981 offset = 4;
982 if (delta > INDEX_MAPPING_NUM - 1)
983 index = index_mapping[offset]
984 [INDEX_MAPPING_NUM - 1];
985 else
986 index = index_mapping[offset][delta];
987 if (thermalvalue > rtlpriv->dm.thermalvalue) {
988 for (i = 0; i < rf; i++)
989 ofdm_index[i] -= delta;
990 cck_index -= delta;
991 } else {
992 for (i = 0; i < rf; i++)
993 ofdm_index[i] += index;
994 cck_index += index;
995 }
996 } else if (rtlhal->current_bandtype == BAND_ON_5G) {
997 rtl92d_bandtype_5G(rtlhal, ofdm_index,
998 &internal_pa, thermalvalue,
999 delta, rf, rtlefuse, rtlpriv,
1000 rtlphy, index_mapping,
1001 index_mapping_internal_pa);
1002 }
1003 if (is2t) {
1004 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1005 "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
1006 rtlpriv->dm.ofdm_index[0],
1007 rtlpriv->dm.ofdm_index[1],
1008 rtlpriv->dm.cck_index);
1009 } else {
1010 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1011 "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
1012 rtlpriv->dm.ofdm_index[0],
1013 rtlpriv->dm.cck_index);
1014 }
1015 for (i = 0; i < rf; i++) {
1016 if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
1017 ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
1018 else if (ofdm_index[i] < ofdm_min_index)
1019 ofdm_index[i] = ofdm_min_index;
1020 }
1021 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1022 if (cck_index > CCK_TABLE_SIZE - 1) {
1023 cck_index = CCK_TABLE_SIZE - 1;
1024 } else if (internal_pa ||
1025 rtlhal->current_bandtype ==
1026 BAND_ON_2_4G) {
1027 if (ofdm_index[i] <
1028 ofdm_min_index_internal_pa)
1029 ofdm_index[i] =
1030 ofdm_min_index_internal_pa;
1031 } else if (cck_index < 0) {
1032 cck_index = 0;
1033 }
1034 }
1035 if (is2t) {
1036 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1037 "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
1038 ofdm_index[0], ofdm_index[1],
1039 cck_index);
1040 } else {
1041 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1042 "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
1043 ofdm_index[0], cck_index);
1044 }
1045 ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
1046 0xFFC00000) >> 22;
1047 val_x = rtlphy->iqk_matrix
1048 [indexforchannel].value[0][0];
1049 val_y = rtlphy->iqk_matrix
1050 [indexforchannel].value[0][1];
1051 if (val_x != 0) {
1052 if ((val_x & 0x00000200) != 0)
1053 val_x = val_x | 0xFFFFFC00;
1054 ele_a =
1055 ((val_x * ele_d) >> 8) & 0x000003FF;
1056
1057 /* new element C = element D x Y */
1058 if ((val_y & 0x00000200) != 0)
1059 val_y = val_y | 0xFFFFFC00;
1060 ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
1061
1062 /* wirte new elements A, C, D to regC80 and
1063 * regC94, element B is always 0 */
1064 value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
1065 16) | ele_a;
1066 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1067 MASKDWORD, value32);
1068
1069 value32 = (ele_c & 0x000003C0) >> 6;
1070 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, MASKH4BITS,
1071 value32);
1072
1073 value32 = ((val_x * ele_d) >> 7) & 0x01;
1074 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
1075 value32);
1076
1077 } else {
1078 rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1079 MASKDWORD,
1080 ofdmswing_table
1081 [(u8)ofdm_index[0]]);
1082 rtl_set_bbreg(hw, ROFDM0_XCTxAFE, MASKH4BITS,
1083 0x00);
1084 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1085 BIT(24), 0x00);
1086 }
1087
1088 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1089 "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n",
1090 rtlhal->interfaceindex,
1091 val_x, val_y, ele_a, ele_c, ele_d,
1092 val_x, val_y);
1093
1094 if (cck_index >= CCK_TABLE_SIZE)
1095 cck_index = CCK_TABLE_SIZE - 1;
1096 if (cck_index < 0)
1097 cck_index = 0;
1098 if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1099 /* Adjust CCK according to IQK result */
1100 if (!rtlpriv->dm.cck_inch14) {
1101 rtl_write_byte(rtlpriv, 0xa22,
1102 cckswing_table_ch1ch13
1103 [(u8)cck_index][0]);
1104 rtl_write_byte(rtlpriv, 0xa23,
1105 cckswing_table_ch1ch13
1106 [(u8)cck_index][1]);
1107 rtl_write_byte(rtlpriv, 0xa24,
1108 cckswing_table_ch1ch13
1109 [(u8)cck_index][2]);
1110 rtl_write_byte(rtlpriv, 0xa25,
1111 cckswing_table_ch1ch13
1112 [(u8)cck_index][3]);
1113 rtl_write_byte(rtlpriv, 0xa26,
1114 cckswing_table_ch1ch13
1115 [(u8)cck_index][4]);
1116 rtl_write_byte(rtlpriv, 0xa27,
1117 cckswing_table_ch1ch13
1118 [(u8)cck_index][5]);
1119 rtl_write_byte(rtlpriv, 0xa28,
1120 cckswing_table_ch1ch13
1121 [(u8)cck_index][6]);
1122 rtl_write_byte(rtlpriv, 0xa29,
1123 cckswing_table_ch1ch13
1124 [(u8)cck_index][7]);
1125 } else {
1126 rtl_write_byte(rtlpriv, 0xa22,
1127 cckswing_table_ch14
1128 [(u8)cck_index][0]);
1129 rtl_write_byte(rtlpriv, 0xa23,
1130 cckswing_table_ch14
1131 [(u8)cck_index][1]);
1132 rtl_write_byte(rtlpriv, 0xa24,
1133 cckswing_table_ch14
1134 [(u8)cck_index][2]);
1135 rtl_write_byte(rtlpriv, 0xa25,
1136 cckswing_table_ch14
1137 [(u8)cck_index][3]);
1138 rtl_write_byte(rtlpriv, 0xa26,
1139 cckswing_table_ch14
1140 [(u8)cck_index][4]);
1141 rtl_write_byte(rtlpriv, 0xa27,
1142 cckswing_table_ch14
1143 [(u8)cck_index][5]);
1144 rtl_write_byte(rtlpriv, 0xa28,
1145 cckswing_table_ch14
1146 [(u8)cck_index][6]);
1147 rtl_write_byte(rtlpriv, 0xa29,
1148 cckswing_table_ch14
1149 [(u8)cck_index][7]);
1150 }
1151 }
1152 if (is2t) {
1153 ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
1154 0xFFC00000) >> 22;
1155 val_x = rtlphy->iqk_matrix
1156 [indexforchannel].value[0][4];
1157 val_y = rtlphy->iqk_matrix
1158 [indexforchannel].value[0][5];
1159 if (val_x != 0) {
1160 if ((val_x & 0x00000200) != 0)
1161 /* consider minus */
1162 val_x = val_x | 0xFFFFFC00;
1163 ele_a = ((val_x * ele_d) >> 8) &
1164 0x000003FF;
1165 /* new element C = element D x Y */
1166 if ((val_y & 0x00000200) != 0)
1167 val_y =
1168 val_y | 0xFFFFFC00;
1169 ele_c =
1170 ((val_y *
1171 ele_d) >> 8) & 0x00003FF;
1172 /* write new elements A, C, D to regC88
1173 * and regC9C, element B is always 0
1174 */
1175 value32 = (ele_d << 22) |
1176 ((ele_c & 0x3F) << 16) |
1177 ele_a;
1178 rtl_set_bbreg(hw,
1179 ROFDM0_XBTxIQIMBALANCE,
1180 MASKDWORD, value32);
1181 value32 = (ele_c & 0x000003C0) >> 6;
1182 rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1183 MASKH4BITS, value32);
1184 value32 = ((val_x * ele_d) >> 7) & 0x01;
1185 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1186 BIT(28), value32);
1187 } else {
1188 rtl_set_bbreg(hw,
1189 ROFDM0_XBTxIQIMBALANCE,
1190 MASKDWORD,
1191 ofdmswing_table
1192 [(u8) ofdm_index[1]]);
1193 rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1194 MASKH4BITS, 0x00);
1195 rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1196 BIT(28), 0x00);
1197 }
1198 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1199 "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n",
1200 val_x, val_y, ele_a, ele_c,
1201 ele_d, val_x, val_y);
1202 }
1203 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1204 "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n",
1205 rtl_get_bbreg(hw, 0xc80, MASKDWORD),
1206 rtl_get_bbreg(hw, 0xc94, MASKDWORD),
1207 rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
1208 RFREG_OFFSET_MASK));
1209 }
1210 if ((delta_iqk > rtlefuse->delta_iqk) &&
1211 (rtlefuse->delta_iqk != 0)) {
1212 rtl92d_phy_reset_iqk_result(hw);
1213 rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1214 rtl92d_phy_iq_calibrate(hw);
1215 }
1216 if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
1217 && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
1218 rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
1219 rtl92d_dm_rxgain_tracking_thermalmeter(hw);
1220 }
1221 if (rtlpriv->dm.txpower_track_control)
1222 rtlpriv->dm.thermalvalue = thermalvalue;
1223 }
1224
1225 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
1226 }
1227
1228 static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1229 {
1230 struct rtl_priv *rtlpriv = rtl_priv(hw);
1231
1232 rtlpriv->dm.txpower_tracking = true;
1233 rtlpriv->dm.txpower_trackinginit = false;
1234 rtlpriv->dm.txpower_track_control = true;
1235 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1236 "pMgntInfo->txpower_tracking = %d\n",
1237 rtlpriv->dm.txpower_tracking);
1238 }
1239
1240 void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
1241 {
1242 struct rtl_priv *rtlpriv = rtl_priv(hw);
1243
1244 if (!rtlpriv->dm.txpower_tracking)
1245 return;
1246
1247 if (!rtlpriv->dm.tm_trigger) {
1248 rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
1249 BIT(16), 0x03);
1250 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1251 "Trigger 92S Thermal Meter!!\n");
1252 rtlpriv->dm.tm_trigger = 1;
1253 return;
1254 } else {
1255 RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1256 "Schedule TxPowerTracking direct call!!\n");
1257 rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
1258 rtlpriv->dm.tm_trigger = 0;
1259 }
1260 }
1261
1262 void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1263 {
1264 struct rtl_priv *rtlpriv = rtl_priv(hw);
1265 struct rate_adaptive *ra = &(rtlpriv->ra);
1266
1267 ra->ratr_state = DM_RATR_STA_INIT;
1268 ra->pre_ratr_state = DM_RATR_STA_INIT;
1269 if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1270 rtlpriv->dm.useramask = true;
1271 else
1272 rtlpriv->dm.useramask = false;
1273 }
1274
1275 void rtl92d_dm_init(struct ieee80211_hw *hw)
1276 {
1277 struct rtl_priv *rtlpriv = rtl_priv(hw);
1278
1279 rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1280 rtl_dm_diginit(hw, 0x20);
1281 rtlpriv->dm_digtable.rx_gain_max = DM_DIG_FA_UPPER;
1282 rtlpriv->dm_digtable.rx_gain_min = DM_DIG_FA_LOWER;
1283 rtl92d_dm_init_dynamic_txpower(hw);
1284 rtl92d_dm_init_edca_turbo(hw);
1285 rtl92d_dm_init_rate_adaptive_mask(hw);
1286 rtl92d_dm_initialize_txpower_tracking(hw);
1287 }
1288
1289 void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
1290 {
1291 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1292 bool fw_current_inpsmode = false;
1293 bool fwps_awake = true;
1294
1295 /* 1. RF is OFF. (No need to do DM.)
1296 * 2. Fw is under power saving mode for FwLPS.
1297 * (Prevent from SW/FW I/O racing.)
1298 * 3. IPS workitem is scheduled. (Prevent from IPS sequence
1299 * to be swapped with DM.
1300 * 4. RFChangeInProgress is TRUE.
1301 * (Prevent from broken by IPS/HW/SW Rf off.) */
1302
1303 if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
1304 fwps_awake) && (!ppsc->rfchange_inprogress)) {
1305 rtl92d_dm_pwdb_monitor(hw);
1306 rtl92d_dm_false_alarm_counter_statistics(hw);
1307 rtl92d_dm_find_minimum_rssi(hw);
1308 rtl92d_dm_dig(hw);
1309 /* rtl92d_dm_dynamic_bb_powersaving(hw); */
1310 rtl92d_dm_dynamic_txpower(hw);
1311 /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
1312 /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
1313 /* rtl92d_dm_interrupt_migration(hw); */
1314 rtl92d_dm_check_edca_turbo(hw);
1315 }
1316 }
CRIS linux kernel tree