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Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[cris-mirror.git] / drivers / staging / slicoss / slicoss.c
blobac126d4f31172983fcdec97de13de8ff5e6ce161
1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was actually tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57 #define KLUDGE_FOR_4GB_BOUNDARY 1
58 #define DEBUG_MICROCODE 1
59 #define DBG 1
60 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
61 #define SLIC_OFFLOAD_IP_CHECKSUM 1
62 #define STATS_TIMER_INTERVAL 2
63 #define PING_TIMER_INTERVAL 1
64 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
65
66 #include <linux/kernel.h>
67 #include <linux/string.h>
68 #include <linux/errno.h>
69 #include <linux/ioport.h>
70 #include <linux/slab.h>
71 #include <linux/interrupt.h>
72 #include <linux/timer.h>
73 #include <linux/pci.h>
74 #include <linux/spinlock.h>
75 #include <linux/init.h>
76 #include <linux/bitops.h>
77 #include <linux/io.h>
78 #include <linux/netdevice.h>
79 #include <linux/crc32.h>
80 #include <linux/etherdevice.h>
81 #include <linux/skbuff.h>
82 #include <linux/delay.h>
83 #include <linux/seq_file.h>
84 #include <linux/kthread.h>
85 #include <linux/module.h>
86
87 #include <linux/firmware.h>
88 #include <linux/types.h>
89 #include <linux/dma-mapping.h>
90 #include <linux/mii.h>
91 #include <linux/if_vlan.h>
92 #include <asm/unaligned.h>
93
94 #include <linux/ethtool.h>
95 #include <linux/uaccess.h>
96 #include "slichw.h"
97 #include "slic.h"
98
99 static uint slic_first_init = 1;
100 static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
101
102 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
103
104 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
105 #define DEFAULT_INTAGG_DELAY 100
106 static unsigned int rcv_count;
107
108 #define DRV_NAME "slicoss"
109 #define DRV_VERSION "2.0.1"
110 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
111 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
112 "Non-Accelerated Driver"
113 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
114 "All rights reserved."
115 #define PFX DRV_NAME " "
116
117 MODULE_AUTHOR(DRV_AUTHOR);
118 MODULE_DESCRIPTION(DRV_DESCRIPTION);
119 MODULE_LICENSE("Dual BSD/GPL");
120
121 static const struct pci_device_id slic_pci_tbl[] = {
122 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
123 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
124 { 0 }
125 };
126
127 static struct ethtool_ops slic_ethtool_ops;
128
129 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
130
131 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
132 {
133 writel(value, reg);
134 if (flush)
135 mb();
136 }
137
138 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
139 u32 value, void __iomem *regh, u32 paddrh,
140 bool flush)
141 {
142 unsigned long flags;
143
144 spin_lock_irqsave(&adapter->bit64reglock, flags);
145 writel(paddrh, regh);
146 writel(value, reg);
147 if (flush)
148 mb();
149 spin_unlock_irqrestore(&adapter->bit64reglock, flags);
150 }
151
152 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
153 {
154 unsigned char crcpoly;
155
156 /* Get the CRC polynomial for the mac address */
157 /*
158 * we use bits 1-8 (lsb), bitwise reversed,
159 * msb (= lsb bit 0 before bitrev) is automatically discarded
160 */
161 crcpoly = ether_crc(ETH_ALEN, address) >> 23;
162
163 /*
164 * We only have space on the SLIC for 64 entries. Lop
165 * off the top two bits. (2^6 = 64)
166 */
167 crcpoly &= 0x3F;
168
169 /* OR in the new bit into our 64 bit mask. */
170 adapter->mcastmask |= (u64)1 << crcpoly;
171 }
172
173 static void slic_mcast_set_mask(struct adapter *adapter)
174 {
175 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
176
177 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
178 /*
179 * Turn on all multicast addresses. We have to do this for
180 * promiscuous mode as well as ALLMCAST mode. It saves the
181 * Microcode from having to keep state about the MAC
182 * configuration.
183 */
184 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
185 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
186 FLUSH);
187 } else {
188 /*
189 * Commit our multicast mast to the SLIC by writing to the
190 * multicast address mask registers
191 */
192 slic_reg32_write(&slic_regs->slic_mcastlow,
193 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
194 slic_reg32_write(&slic_regs->slic_mcasthigh,
195 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
196 }
197 }
198
199 static void slic_timer_ping(ulong dev)
200 {
201 struct adapter *adapter;
202 struct sliccard *card;
203
204 adapter = netdev_priv((struct net_device *)dev);
205 card = adapter->card;
206
207 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
208 add_timer(&adapter->pingtimer);
209 }
210
211 static void slic_unmap_mmio_space(struct adapter *adapter)
212 {
213 if (adapter->slic_regs)
214 iounmap(adapter->slic_regs);
215 adapter->slic_regs = NULL;
216 }
217
218 /*
219 * slic_link_config
220 *
221 * Write phy control to configure link duplex/speed
222 *
223 */
224 static void slic_link_config(struct adapter *adapter,
225 u32 linkspeed, u32 linkduplex)
226 {
227 u32 __iomem *wphy;
228 u32 speed;
229 u32 duplex;
230 u32 phy_config;
231 u32 phy_advreg;
232 u32 phy_gctlreg;
233
234 if (adapter->state != ADAPT_UP)
235 return;
236
237 if (linkspeed > LINK_1000MB)
238 linkspeed = LINK_AUTOSPEED;
239 if (linkduplex > LINK_AUTOD)
240 linkduplex = LINK_AUTOD;
241
242 wphy = &adapter->slic_regs->slic_wphy;
243
244 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
245 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
246 /*
247 * We've got a fiber gigabit interface, and register
248 * 4 is different in fiber mode than in copper mode
249 */
250
251 /* advertise FD only @1000 Mb */
252 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
253 /* enable PAUSE frames */
254 phy_advreg |= PAR_ASYMPAUSE_FIBER;
255 slic_reg32_write(wphy, phy_advreg, FLUSH);
256
257 if (linkspeed == LINK_AUTOSPEED) {
258 /* reset phy, enable auto-neg */
259 phy_config =
260 (MIICR_REG_PCR |
261 (PCR_RESET | PCR_AUTONEG |
262 PCR_AUTONEG_RST));
263 slic_reg32_write(wphy, phy_config, FLUSH);
264 } else { /* forced 1000 Mb FD*/
265 /*
266 * power down phy to break link
267 * this may not work)
268 */
269 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
270 slic_reg32_write(wphy, phy_config, FLUSH);
271 /*
272 * wait, Marvell says 1 sec,
273 * try to get away with 10 ms
274 */
275 mdelay(10);
276
277 /*
278 * disable auto-neg, set speed/duplex,
279 * soft reset phy, powerup
280 */
281 phy_config =
282 (MIICR_REG_PCR |
283 (PCR_RESET | PCR_SPEED_1000 |
284 PCR_DUPLEX_FULL));
285 slic_reg32_write(wphy, phy_config, FLUSH);
286 }
287 } else { /* copper gigabit */
288
289 /*
290 * Auto-Negotiate or 1000 Mb must be auto negotiated
291 * We've got a copper gigabit interface, and
292 * register 4 is different in copper mode than
293 * in fiber mode
294 */
295 if (linkspeed == LINK_AUTOSPEED) {
296 /* advertise 10/100 Mb modes */
297 phy_advreg =
298 (MIICR_REG_4 |
299 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
300 | PAR_ADV10HD));
301 } else {
302 /*
303 * linkspeed == LINK_1000MB -
304 * don't advertise 10/100 Mb modes
305 */
306 phy_advreg = MIICR_REG_4;
307 }
308 /* enable PAUSE frames */
309 phy_advreg |= PAR_ASYMPAUSE;
310 /* required by the Cicada PHY */
311 phy_advreg |= PAR_802_3;
312 slic_reg32_write(wphy, phy_advreg, FLUSH);
313 /* advertise FD only @1000 Mb */
314 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
315 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
316
317 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
318 /*
319 * if a Marvell PHY
320 * enable auto crossover
321 */
322 phy_config =
323 (MIICR_REG_16 | (MRV_REG16_XOVERON));
324 slic_reg32_write(wphy, phy_config, FLUSH);
325
326 /* reset phy, enable auto-neg */
327 phy_config =
328 (MIICR_REG_PCR |
329 (PCR_RESET | PCR_AUTONEG |
330 PCR_AUTONEG_RST));
331 slic_reg32_write(wphy, phy_config, FLUSH);
332 } else { /* it's a Cicada PHY */
333 /* enable and restart auto-neg (don't reset) */
334 phy_config =
335 (MIICR_REG_PCR |
336 (PCR_AUTONEG | PCR_AUTONEG_RST));
337 slic_reg32_write(wphy, phy_config, FLUSH);
338 }
339 }
340 } else {
341 /* Forced 10/100 */
342 if (linkspeed == LINK_10MB)
343 speed = 0;
344 else
345 speed = PCR_SPEED_100;
346 if (linkduplex == LINK_HALFD)
347 duplex = 0;
348 else
349 duplex = PCR_DUPLEX_FULL;
350
351 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
352 /*
353 * if a Marvell PHY
354 * disable auto crossover
355 */
356 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
357 slic_reg32_write(wphy, phy_config, FLUSH);
358 }
359
360 /* power down phy to break link (this may not work) */
361 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
362 slic_reg32_write(wphy, phy_config, FLUSH);
363
364 /* wait, Marvell says 1 sec, try to get away with 10 ms */
365 mdelay(10);
366
367 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
368 /*
369 * if a Marvell PHY
370 * disable auto-neg, set speed,
371 * soft reset phy, powerup
372 */
373 phy_config =
374 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
375 slic_reg32_write(wphy, phy_config, FLUSH);
376 } else { /* it's a Cicada PHY */
377 /* disable auto-neg, set speed, powerup */
378 phy_config = (MIICR_REG_PCR | (speed | duplex));
379 slic_reg32_write(wphy, phy_config, FLUSH);
380 }
381 }
382 }
383
384 static int slic_card_download_gbrcv(struct adapter *adapter)
385 {
386 const struct firmware *fw;
387 const char *file = "";
388 int ret;
389 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
390 u32 codeaddr;
391 u32 instruction;
392 int index = 0;
393 u32 rcvucodelen = 0;
394
395 switch (adapter->devid) {
396 case SLIC_2GB_DEVICE_ID:
397 file = "slicoss/oasisrcvucode.sys";
398 break;
399 case SLIC_1GB_DEVICE_ID:
400 file = "slicoss/gbrcvucode.sys";
401 break;
402 default:
403 return -ENOENT;
404 }
405
406 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
407 if (ret) {
408 dev_err(&adapter->pcidev->dev,
409 "Failed to load firmware %s\n", file);
410 return ret;
411 }
412
413 rcvucodelen = *(u32 *)(fw->data + index);
414 index += 4;
415 switch (adapter->devid) {
416 case SLIC_2GB_DEVICE_ID:
417 if (rcvucodelen != OasisRcvUCodeLen) {
418 release_firmware(fw);
419 return -EINVAL;
420 }
421 break;
422 case SLIC_1GB_DEVICE_ID:
423 if (rcvucodelen != GBRcvUCodeLen) {
424 release_firmware(fw);
425 return -EINVAL;
426 }
427 break;
428 }
429 /* start download */
430 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
431 /* download the rcv sequencer ucode */
432 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
433 /* write out instruction address */
434 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
435
436 instruction = *(u32 *)(fw->data + index);
437 index += 4;
438 /* write out the instruction data low addr */
439 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
440
441 instruction = *(u8 *)(fw->data + index);
442 index++;
443 /* write out the instruction data high addr */
444 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
445 FLUSH);
446 }
447
448 /* download finished */
449 release_firmware(fw);
450 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
451 return 0;
452 }
453
454 MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
455 MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
456
457 static int slic_card_download(struct adapter *adapter)
458 {
459 const struct firmware *fw;
460 const char *file = "";
461 int ret;
462 u32 section;
463 int thissectionsize;
464 int codeaddr;
465 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
466 u32 instruction;
467 u32 baseaddress;
468 u32 i;
469 u32 numsects = 0;
470 u32 sectsize[3];
471 u32 sectstart[3];
472 int ucode_start, index = 0;
473
474 switch (adapter->devid) {
475 case SLIC_2GB_DEVICE_ID:
476 file = "slicoss/oasisdownload.sys";
477 break;
478 case SLIC_1GB_DEVICE_ID:
479 file = "slicoss/gbdownload.sys";
480 break;
481 default:
482 return -ENOENT;
483 }
484 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
485 if (ret) {
486 dev_err(&adapter->pcidev->dev,
487 "Failed to load firmware %s\n", file);
488 return ret;
489 }
490 numsects = *(u32 *)(fw->data + index);
491 index += 4;
492 for (i = 0; i < numsects; i++) {
493 sectsize[i] = *(u32 *)(fw->data + index);
494 index += 4;
495 }
496 for (i = 0; i < numsects; i++) {
497 sectstart[i] = *(u32 *)(fw->data + index);
498 index += 4;
499 }
500 ucode_start = index;
501 instruction = *(u32 *)(fw->data + index);
502 index += 4;
503 for (section = 0; section < numsects; section++) {
504 baseaddress = sectstart[section];
505 thissectionsize = sectsize[section] >> 3;
506
507 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
508 /* Write out instruction address */
509 slic_reg32_write(&slic_regs->slic_wcs,
510 baseaddress + codeaddr, FLUSH);
511 /* Write out instruction to low addr */
512 slic_reg32_write(&slic_regs->slic_wcs,
513 instruction, FLUSH);
514 instruction = *(u32 *)(fw->data + index);
515 index += 4;
516
517 /* Write out instruction to high addr */
518 slic_reg32_write(&slic_regs->slic_wcs,
519 instruction, FLUSH);
520 instruction = *(u32 *)(fw->data + index);
521 index += 4;
522 }
523 }
524 index = ucode_start;
525 for (section = 0; section < numsects; section++) {
526 instruction = *(u32 *)(fw->data + index);
527 baseaddress = sectstart[section];
528 if (baseaddress < 0x8000)
529 continue;
530 thissectionsize = sectsize[section] >> 3;
531
532 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
533 /* Write out instruction address */
534 slic_reg32_write(&slic_regs->slic_wcs,
535 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
536 FLUSH);
537 /* Write out instruction to low addr */
538 slic_reg32_write(&slic_regs->slic_wcs, instruction,
539 FLUSH);
540 instruction = *(u32 *)(fw->data + index);
541 index += 4;
542 /* Write out instruction to high addr */
543 slic_reg32_write(&slic_regs->slic_wcs, instruction,
544 FLUSH);
545 instruction = *(u32 *)(fw->data + index);
546 index += 4;
547
548 }
549 }
550 release_firmware(fw);
551 /* Everything OK, kick off the card */
552 mdelay(10);
553 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
554
555 /*
556 * stall for 20 ms, long enough for ucode to init card
557 * and reach mainloop
558 */
559 mdelay(20);
560
561 return 0;
562 }
563
564 MODULE_FIRMWARE("slicoss/oasisdownload.sys");
565 MODULE_FIRMWARE("slicoss/gbdownload.sys");
566
567 static void slic_adapter_set_hwaddr(struct adapter *adapter)
568 {
569 struct sliccard *card = adapter->card;
570
571 if ((adapter->card) && (card->config_set)) {
572 memcpy(adapter->macaddr,
573 card->config.MacInfo[adapter->functionnumber].macaddrA,
574 sizeof(struct slic_config_mac));
575 if (is_zero_ether_addr(adapter->currmacaddr))
576 memcpy(adapter->currmacaddr, adapter->macaddr,
577 ETH_ALEN);
578 if (adapter->netdev)
579 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
580 ETH_ALEN);
581 }
582 }
583
584 static void slic_intagg_set(struct adapter *adapter, u32 value)
585 {
586 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
587 adapter->card->loadlevel_current = value;
588 }
589
590 static void slic_soft_reset(struct adapter *adapter)
591 {
592 if (adapter->card->state == CARD_UP) {
593 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
594 mdelay(1);
595 }
596
597 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
598 FLUSH);
599 mdelay(1);
600 }
601
602 static void slic_mac_address_config(struct adapter *adapter)
603 {
604 u32 value;
605 u32 value2;
606 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
607
608 value = ntohl(*(__be32 *)&adapter->currmacaddr[2]);
609 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
610 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
611
612 value2 = (u32)((adapter->currmacaddr[0] << 8 |
613 adapter->currmacaddr[1]) & 0xFFFF);
614
615 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
616 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
617
618 /*
619 * Write our multicast mask out to the card. This is done
620 * here in addition to the slic_mcast_addr_set routine
621 * because ALL_MCAST may have been enabled or disabled
622 */
623 slic_mcast_set_mask(adapter);
624 }
625
626 static void slic_mac_config(struct adapter *adapter)
627 {
628 u32 value;
629 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
630
631 /* Setup GMAC gaps */
632 if (adapter->linkspeed == LINK_1000MB) {
633 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
634 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
635 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
636 } else {
637 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
638 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
639 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
640 }
641
642 /* enable GMII */
643 if (adapter->linkspeed == LINK_1000MB)
644 value |= GMCR_GBIT;
645
646 /* enable fullduplex */
647 if ((adapter->linkduplex == LINK_FULLD)
648 || (adapter->macopts & MAC_LOOPBACK)) {
649 value |= GMCR_FULLD;
650 }
651
652 /* write mac config */
653 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
654
655 /* setup mac addresses */
656 slic_mac_address_config(adapter);
657 }
658
659 static void slic_config_set(struct adapter *adapter, bool linkchange)
660 {
661 u32 value;
662 u32 RcrReset;
663 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
664
665 if (linkchange) {
666 /* Setup MAC */
667 slic_mac_config(adapter);
668 RcrReset = GRCR_RESET;
669 } else {
670 slic_mac_address_config(adapter);
671 RcrReset = 0;
672 }
673
674 if (adapter->linkduplex == LINK_FULLD) {
675 /* setup xmtcfg */
676 value = (GXCR_RESET | /* Always reset */
677 GXCR_XMTEN | /* Enable transmit */
678 GXCR_PAUSEEN); /* Enable pause */
679
680 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
681
682 /* Setup rcvcfg last */
683 value = (RcrReset | /* Reset, if linkchange */
684 GRCR_CTLEN | /* Enable CTL frames */
685 GRCR_ADDRAEN | /* Address A enable */
686 GRCR_RCVBAD | /* Rcv bad frames */
687 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
688 } else {
689 /* setup xmtcfg */
690 value = (GXCR_RESET | /* Always reset */
691 GXCR_XMTEN); /* Enable transmit */
692
693 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
694
695 /* Setup rcvcfg last */
696 value = (RcrReset | /* Reset, if linkchange */
697 GRCR_ADDRAEN | /* Address A enable */
698 GRCR_RCVBAD | /* Rcv bad frames */
699 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
700 }
701
702 if (adapter->state != ADAPT_DOWN) {
703 /* Only enable receive if we are restarting or running */
704 value |= GRCR_RCVEN;
705 }
706
707 if (adapter->macopts & MAC_PROMISC)
708 value |= GRCR_RCVALL;
709
710 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
711 }
712
713 /*
714 * Turn off RCV and XMT, power down PHY
715 */
716 static void slic_config_clear(struct adapter *adapter)
717 {
718 u32 value;
719 u32 phy_config;
720 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
721
722 /* Setup xmtcfg */
723 value = (GXCR_RESET | /* Always reset */
724 GXCR_PAUSEEN); /* Enable pause */
725
726 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
727
728 value = (GRCR_RESET | /* Always reset */
729 GRCR_CTLEN | /* Enable CTL frames */
730 GRCR_ADDRAEN | /* Address A enable */
731 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
732
733 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
734
735 /* power down phy */
736 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
737 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
738 }
739
740 static bool slic_mac_filter(struct adapter *adapter,
741 struct ether_header *ether_frame)
742 {
743 struct net_device *netdev = adapter->netdev;
744 u32 opts = adapter->macopts;
745
746 if (opts & MAC_PROMISC)
747 return true;
748
749 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
750 if (opts & MAC_BCAST) {
751 adapter->rcv_broadcasts++;
752 return true;
753 }
754
755 return false;
756 }
757
758 if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
759 if (opts & MAC_ALLMCAST) {
760 adapter->rcv_multicasts++;
761 netdev->stats.multicast++;
762 return true;
763 }
764 if (opts & MAC_MCAST) {
765 struct mcast_address *mcaddr = adapter->mcastaddrs;
766
767 while (mcaddr) {
768 if (ether_addr_equal(mcaddr->address,
769 ether_frame->ether_dhost)) {
770 adapter->rcv_multicasts++;
771 netdev->stats.multicast++;
772 return true;
773 }
774 mcaddr = mcaddr->next;
775 }
776
777 return false;
778 }
779
780 return false;
781 }
782 if (opts & MAC_DIRECTED) {
783 adapter->rcv_unicasts++;
784 return true;
785 }
786 return false;
787 }
788
789 static int slic_mac_set_address(struct net_device *dev, void *ptr)
790 {
791 struct adapter *adapter = netdev_priv(dev);
792 struct sockaddr *addr = ptr;
793
794 if (netif_running(dev))
795 return -EBUSY;
796 if (!adapter)
797 return -EBUSY;
798
799 if (!is_valid_ether_addr(addr->sa_data))
800 return -EINVAL;
801
802 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
803 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
804
805 slic_config_set(adapter, true);
806 return 0;
807 }
808
809 static void slic_timer_load_check(ulong cardaddr)
810 {
811 struct sliccard *card = (struct sliccard *)cardaddr;
812 struct adapter *adapter = card->master;
813 u32 __iomem *intagg;
814 u32 load = card->events;
815 u32 level = 0;
816
817 if ((adapter) && (adapter->state == ADAPT_UP) &&
818 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
819 intagg = &adapter->slic_regs->slic_intagg;
820 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
821 if (adapter->linkspeed == LINK_1000MB)
822 level = 100;
823 else {
824 if (load > SLIC_LOAD_5)
825 level = SLIC_INTAGG_5;
826 else if (load > SLIC_LOAD_4)
827 level = SLIC_INTAGG_4;
828 else if (load > SLIC_LOAD_3)
829 level = SLIC_INTAGG_3;
830 else if (load > SLIC_LOAD_2)
831 level = SLIC_INTAGG_2;
832 else if (load > SLIC_LOAD_1)
833 level = SLIC_INTAGG_1;
834 else
835 level = SLIC_INTAGG_0;
836 }
837 if (card->loadlevel_current != level) {
838 card->loadlevel_current = level;
839 slic_reg32_write(intagg, level, FLUSH);
840 }
841 } else {
842 if (load > SLIC_LOAD_5)
843 level = SLIC_INTAGG_5;
844 else if (load > SLIC_LOAD_4)
845 level = SLIC_INTAGG_4;
846 else if (load > SLIC_LOAD_3)
847 level = SLIC_INTAGG_3;
848 else if (load > SLIC_LOAD_2)
849 level = SLIC_INTAGG_2;
850 else if (load > SLIC_LOAD_1)
851 level = SLIC_INTAGG_1;
852 else
853 level = SLIC_INTAGG_0;
854 if (card->loadlevel_current != level) {
855 card->loadlevel_current = level;
856 slic_reg32_write(intagg, level, FLUSH);
857 }
858 }
859 }
860 card->events = 0;
861 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
862 add_timer(&card->loadtimer);
863 }
864
865 static int slic_upr_queue_request(struct adapter *adapter,
866 u32 upr_request,
867 u32 upr_data,
868 u32 upr_data_h,
869 u32 upr_buffer, u32 upr_buffer_h)
870 {
871 struct slic_upr *upr;
872 struct slic_upr *uprqueue;
873
874 upr = kmalloc(sizeof(*upr), GFP_ATOMIC);
875 if (!upr)
876 return -ENOMEM;
877
878 upr->adapter = adapter->port;
879 upr->upr_request = upr_request;
880 upr->upr_data = upr_data;
881 upr->upr_buffer = upr_buffer;
882 upr->upr_data_h = upr_data_h;
883 upr->upr_buffer_h = upr_buffer_h;
884 upr->next = NULL;
885 if (adapter->upr_list) {
886 uprqueue = adapter->upr_list;
887
888 while (uprqueue->next)
889 uprqueue = uprqueue->next;
890 uprqueue->next = upr;
891 } else {
892 adapter->upr_list = upr;
893 }
894 return 0;
895 }
896
897 static void slic_upr_start(struct adapter *adapter)
898 {
899 struct slic_upr *upr;
900 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
901
902 upr = adapter->upr_list;
903 if (!upr)
904 return;
905 if (adapter->upr_busy)
906 return;
907 adapter->upr_busy = 1;
908
909 switch (upr->upr_request) {
910 case SLIC_UPR_STATS:
911 if (upr->upr_data_h == 0) {
912 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
913 FLUSH);
914 } else {
915 slic_reg64_write(adapter, &slic_regs->slic_stats64,
916 upr->upr_data,
917 &slic_regs->slic_addr_upper,
918 upr->upr_data_h, FLUSH);
919 }
920 break;
921
922 case SLIC_UPR_RLSR:
923 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
924 &slic_regs->slic_addr_upper, upr->upr_data_h,
925 FLUSH);
926 break;
927
928 case SLIC_UPR_RCONFIG:
929 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
930 upr->upr_data, &slic_regs->slic_addr_upper,
931 upr->upr_data_h, FLUSH);
932 break;
933 case SLIC_UPR_PING:
934 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
935 break;
936 }
937 }
938
939 static int slic_upr_request(struct adapter *adapter,
940 u32 upr_request,
941 u32 upr_data,
942 u32 upr_data_h,
943 u32 upr_buffer, u32 upr_buffer_h)
944 {
945 unsigned long flags;
946 int rc;
947
948 spin_lock_irqsave(&adapter->upr_lock, flags);
949 rc = slic_upr_queue_request(adapter,
950 upr_request,
951 upr_data,
952 upr_data_h, upr_buffer, upr_buffer_h);
953 if (rc)
954 goto err_unlock_irq;
955
956 slic_upr_start(adapter);
957 err_unlock_irq:
958 spin_unlock_irqrestore(&adapter->upr_lock, flags);
959 return rc;
960 }
961
962 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
963 {
964 u32 linkstatus = adapter->pshmem->linkstatus;
965 uint linkup;
966 unsigned char linkspeed;
967 unsigned char linkduplex;
968
969 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
970 struct slic_shmem *pshmem;
971
972 pshmem = (struct slic_shmem *)(unsigned long)
973 adapter->phys_shmem;
974 #if BITS_PER_LONG == 64
975 slic_upr_queue_request(adapter,
976 SLIC_UPR_RLSR,
977 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
978 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
979 0, 0);
980 #else
981 slic_upr_queue_request(adapter,
982 SLIC_UPR_RLSR,
983 (u32)&pshmem->linkstatus,
984 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
985 #endif
986 return;
987 }
988 if (adapter->state != ADAPT_UP)
989 return;
990
991 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
992 if (linkstatus & GIG_SPEED_1000)
993 linkspeed = LINK_1000MB;
994 else if (linkstatus & GIG_SPEED_100)
995 linkspeed = LINK_100MB;
996 else
997 linkspeed = LINK_10MB;
998
999 if (linkstatus & GIG_FULLDUPLEX)
1000 linkduplex = LINK_FULLD;
1001 else
1002 linkduplex = LINK_HALFD;
1003
1004 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1005 return;
1006
1007 /* link up event, but nothing has changed */
1008 if ((adapter->linkstate == LINK_UP) &&
1009 (linkup == LINK_UP) &&
1010 (adapter->linkspeed == linkspeed) &&
1011 (adapter->linkduplex == linkduplex))
1012 return;
1013
1014 /* link has changed at this point */
1015
1016 /* link has gone from up to down */
1017 if (linkup == LINK_DOWN) {
1018 adapter->linkstate = LINK_DOWN;
1019 return;
1020 }
1021
1022 /* link has gone from down to up */
1023 adapter->linkspeed = linkspeed;
1024 adapter->linkduplex = linkduplex;
1025
1026 if (adapter->linkstate != LINK_UP) {
1027 /* setup the mac */
1028 slic_config_set(adapter, true);
1029 adapter->linkstate = LINK_UP;
1030 netif_start_queue(adapter->netdev);
1031 }
1032 }
1033
1034 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1035 {
1036 struct sliccard *card = adapter->card;
1037 struct slic_upr *upr;
1038 unsigned long flags;
1039
1040 spin_lock_irqsave(&adapter->upr_lock, flags);
1041 upr = adapter->upr_list;
1042 if (!upr) {
1043 spin_unlock_irqrestore(&adapter->upr_lock, flags);
1044 return;
1045 }
1046 adapter->upr_list = upr->next;
1047 upr->next = NULL;
1048 adapter->upr_busy = 0;
1049 switch (upr->upr_request) {
1050 case SLIC_UPR_STATS:
1051 {
1052 struct slic_stats *slicstats =
1053 (struct slic_stats *)&adapter->pshmem->inicstats;
1054 struct slic_stats *newstats = slicstats;
1055 struct slic_stats *old = &adapter->inicstats_prev;
1056 struct slicnet_stats *stst = &adapter->slic_stats;
1057
1058 if (isr & ISR_UPCERR) {
1059 dev_err(&adapter->netdev->dev,
1060 "SLIC_UPR_STATS command failed isr[%x]\n",
1061 isr);
1062
1063 break;
1064 }
1065 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1066 newstats->xmit_tcp_segs_gb,
1067 old->xmit_tcp_segs_gb);
1068
1069 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1070 newstats->xmit_tcp_bytes_gb,
1071 old->xmit_tcp_bytes_gb);
1072
1073 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1074 newstats->rcv_tcp_segs_gb,
1075 old->rcv_tcp_segs_gb);
1076
1077 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1078 newstats->rcv_tcp_bytes_gb,
1079 old->rcv_tcp_bytes_gb);
1080
1081 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1082 newstats->xmit_bytes_gb,
1083 old->xmit_bytes_gb);
1084
1085 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1086 newstats->xmit_unicasts_gb,
1087 old->xmit_unicasts_gb);
1088
1089 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1090 newstats->rcv_bytes_gb,
1091 old->rcv_bytes_gb);
1092
1093 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1094 newstats->rcv_unicasts_gb,
1095 old->rcv_unicasts_gb);
1096
1097 UPDATE_STATS_GB(stst->iface.xmt_errors,
1098 newstats->xmit_collisions_gb,
1099 old->xmit_collisions_gb);
1100
1101 UPDATE_STATS_GB(stst->iface.xmt_errors,
1102 newstats->xmit_excess_collisions_gb,
1103 old->xmit_excess_collisions_gb);
1104
1105 UPDATE_STATS_GB(stst->iface.xmt_errors,
1106 newstats->xmit_other_error_gb,
1107 old->xmit_other_error_gb);
1108
1109 UPDATE_STATS_GB(stst->iface.rcv_errors,
1110 newstats->rcv_other_error_gb,
1111 old->rcv_other_error_gb);
1112
1113 UPDATE_STATS_GB(stst->iface.rcv_discards,
1114 newstats->rcv_drops_gb,
1115 old->rcv_drops_gb);
1116
1117 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1118 adapter->rcv_drops +=
1119 (newstats->rcv_drops_gb -
1120 old->rcv_drops_gb);
1121 }
1122 memcpy(old, newstats, sizeof(struct slic_stats));
1123 break;
1124 }
1125 case SLIC_UPR_RLSR:
1126 slic_link_upr_complete(adapter, isr);
1127 break;
1128 case SLIC_UPR_RCONFIG:
1129 break;
1130 case SLIC_UPR_PING:
1131 card->pingstatus |= (isr & ISR_PINGDSMASK);
1132 break;
1133 }
1134 kfree(upr);
1135 slic_upr_start(adapter);
1136 spin_unlock_irqrestore(&adapter->upr_lock, flags);
1137 }
1138
1139 static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h)
1140 {
1141 return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h,
1142 0, 0);
1143 }
1144
1145 /*
1146 * Compute a checksum of the EEPROM according to RFC 1071.
1147 */
1148 static u16 slic_eeprom_cksum(void *eeprom, unsigned int len)
1149 {
1150 u16 *wp = eeprom;
1151 u32 checksum = 0;
1152
1153 while (len > 1) {
1154 checksum += *(wp++);
1155 len -= 2;
1156 }
1157
1158 if (len > 0)
1159 checksum += *(u8 *)wp;
1160
1161 while (checksum >> 16)
1162 checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
1163
1164 return ~checksum;
1165 }
1166
1167 static void slic_rspqueue_free(struct adapter *adapter)
1168 {
1169 int i;
1170 struct slic_rspqueue *rspq = &adapter->rspqueue;
1171
1172 for (i = 0; i < rspq->num_pages; i++) {
1173 if (rspq->vaddr[i]) {
1174 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1175 rspq->vaddr[i], rspq->paddr[i]);
1176 }
1177 rspq->vaddr[i] = NULL;
1178 rspq->paddr[i] = 0;
1179 }
1180 rspq->offset = 0;
1181 rspq->pageindex = 0;
1182 rspq->rspbuf = NULL;
1183 }
1184
1185 static int slic_rspqueue_init(struct adapter *adapter)
1186 {
1187 int i;
1188 struct slic_rspqueue *rspq = &adapter->rspqueue;
1189 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1190 u32 paddrh = 0;
1191
1192 memset(rspq, 0, sizeof(struct slic_rspqueue));
1193
1194 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1195
1196 for (i = 0; i < rspq->num_pages; i++) {
1197 rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev,
1198 PAGE_SIZE,
1199 &rspq->paddr[i]);
1200 if (!rspq->vaddr[i]) {
1201 dev_err(&adapter->pcidev->dev,
1202 "pci_alloc_consistent failed\n");
1203 slic_rspqueue_free(adapter);
1204 return -ENOMEM;
1205 }
1206
1207 if (paddrh == 0) {
1208 slic_reg32_write(&slic_regs->slic_rbar,
1209 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1210 DONT_FLUSH);
1211 } else {
1212 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1213 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1214 &slic_regs->slic_addr_upper,
1215 paddrh, DONT_FLUSH);
1216 }
1217 }
1218 rspq->offset = 0;
1219 rspq->pageindex = 0;
1220 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1221 return 0;
1222 }
1223
1224 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1225 {
1226 struct slic_rspqueue *rspq = &adapter->rspqueue;
1227 struct slic_rspbuf *buf;
1228
1229 if (!(rspq->rspbuf->status))
1230 return NULL;
1231
1232 buf = rspq->rspbuf;
1233 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1234 rspq->rspbuf++;
1235 } else {
1236 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1237 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1238 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1239 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
1240 rspq->offset = 0;
1241 rspq->rspbuf = (struct slic_rspbuf *)
1242 rspq->vaddr[rspq->pageindex];
1243 }
1244
1245 return buf;
1246 }
1247
1248 static void slic_cmdqmem_free(struct adapter *adapter)
1249 {
1250 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1251 int i;
1252
1253 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1254 if (cmdqmem->pages[i]) {
1255 pci_free_consistent(adapter->pcidev,
1256 PAGE_SIZE,
1257 (void *)cmdqmem->pages[i],
1258 cmdqmem->dma_pages[i]);
1259 }
1260 }
1261 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1262 }
1263
1264 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1265 {
1266 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1267 u32 *pageaddr;
1268
1269 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1270 return NULL;
1271 pageaddr = pci_alloc_consistent(adapter->pcidev,
1272 PAGE_SIZE,
1273 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1274 if (!pageaddr)
1275 return NULL;
1276
1277 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1278 cmdqmem->pagecnt++;
1279 return pageaddr;
1280 }
1281
1282 static void slic_cmdq_free(struct adapter *adapter)
1283 {
1284 struct slic_hostcmd *cmd;
1285
1286 cmd = adapter->cmdq_all.head;
1287 while (cmd) {
1288 if (cmd->busy) {
1289 struct sk_buff *tempskb;
1290
1291 tempskb = cmd->skb;
1292 if (tempskb) {
1293 cmd->skb = NULL;
1294 dev_kfree_skb_irq(tempskb);
1295 }
1296 }
1297 cmd = cmd->next_all;
1298 }
1299 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1300 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1301 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1302 slic_cmdqmem_free(adapter);
1303 }
1304
1305 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1306 {
1307 struct slic_hostcmd *cmd;
1308 struct slic_hostcmd *prev;
1309 struct slic_hostcmd *tail;
1310 struct slic_cmdqueue *cmdq;
1311 int cmdcnt;
1312 void *cmdaddr;
1313 ulong phys_addr;
1314 u32 phys_addrl;
1315 u32 phys_addrh;
1316 struct slic_handle *pslic_handle;
1317 unsigned long flags;
1318
1319 cmdaddr = page;
1320 cmd = cmdaddr;
1321 cmdcnt = 0;
1322
1323 phys_addr = virt_to_bus((void *)page);
1324 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1325 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1326
1327 prev = NULL;
1328 tail = cmd;
1329 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1330 (adapter->slic_handle_ix < 256)) {
1331 /* Allocate and initialize a SLIC_HANDLE for this command */
1332 spin_lock_irqsave(&adapter->handle_lock, flags);
1333 pslic_handle = adapter->pfree_slic_handles;
1334 adapter->pfree_slic_handles = pslic_handle->next;
1335 spin_unlock_irqrestore(&adapter->handle_lock, flags);
1336 pslic_handle->type = SLIC_HANDLE_CMD;
1337 pslic_handle->address = (void *)cmd;
1338 pslic_handle->offset = (ushort)adapter->slic_handle_ix++;
1339 pslic_handle->other_handle = NULL;
1340 pslic_handle->next = NULL;
1341
1342 cmd->pslic_handle = pslic_handle;
1343 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1344 cmd->busy = false;
1345 cmd->paddrl = phys_addrl;
1346 cmd->paddrh = phys_addrh;
1347 cmd->next_all = prev;
1348 cmd->next = prev;
1349 prev = cmd;
1350 phys_addrl += SLIC_HOSTCMD_SIZE;
1351 cmdaddr += SLIC_HOSTCMD_SIZE;
1352
1353 cmd = cmdaddr;
1354 cmdcnt++;
1355 }
1356
1357 cmdq = &adapter->cmdq_all;
1358 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1359 tail->next_all = cmdq->head;
1360 cmdq->head = prev;
1361 cmdq = &adapter->cmdq_free;
1362 spin_lock_irqsave(&cmdq->lock, flags);
1363 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1364 tail->next = cmdq->head;
1365 cmdq->head = prev;
1366 spin_unlock_irqrestore(&cmdq->lock, flags);
1367 }
1368
1369 static int slic_cmdq_init(struct adapter *adapter)
1370 {
1371 int i;
1372 u32 *pageaddr;
1373
1374 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1375 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1376 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1377 spin_lock_init(&adapter->cmdq_all.lock);
1378 spin_lock_init(&adapter->cmdq_free.lock);
1379 spin_lock_init(&adapter->cmdq_done.lock);
1380 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
1381 adapter->slic_handle_ix = 1;
1382 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1383 pageaddr = slic_cmdqmem_addpage(adapter);
1384 if (!pageaddr) {
1385 slic_cmdq_free(adapter);
1386 return -ENOMEM;
1387 }
1388 slic_cmdq_addcmdpage(adapter, pageaddr);
1389 }
1390 adapter->slic_handle_ix = 1;
1391
1392 return 0;
1393 }
1394
1395 static void slic_cmdq_reset(struct adapter *adapter)
1396 {
1397 struct slic_hostcmd *hcmd;
1398 struct sk_buff *skb;
1399 u32 outstanding;
1400 unsigned long flags;
1401
1402 spin_lock_irqsave(&adapter->cmdq_free.lock, flags);
1403 spin_lock(&adapter->cmdq_done.lock);
1404 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1405 outstanding -= adapter->cmdq_free.count;
1406 hcmd = adapter->cmdq_all.head;
1407 while (hcmd) {
1408 if (hcmd->busy) {
1409 skb = hcmd->skb;
1410 hcmd->busy = 0;
1411 hcmd->skb = NULL;
1412 dev_kfree_skb_irq(skb);
1413 }
1414 hcmd = hcmd->next_all;
1415 }
1416 adapter->cmdq_free.count = 0;
1417 adapter->cmdq_free.head = NULL;
1418 adapter->cmdq_free.tail = NULL;
1419 adapter->cmdq_done.count = 0;
1420 adapter->cmdq_done.head = NULL;
1421 adapter->cmdq_done.tail = NULL;
1422 adapter->cmdq_free.head = adapter->cmdq_all.head;
1423 hcmd = adapter->cmdq_all.head;
1424 while (hcmd) {
1425 adapter->cmdq_free.count++;
1426 hcmd->next = hcmd->next_all;
1427 hcmd = hcmd->next_all;
1428 }
1429 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1430 dev_err(&adapter->netdev->dev,
1431 "free_count %d != all count %d\n",
1432 adapter->cmdq_free.count, adapter->cmdq_all.count);
1433 }
1434 spin_unlock(&adapter->cmdq_done.lock);
1435 spin_unlock_irqrestore(&adapter->cmdq_free.lock, flags);
1436 }
1437
1438 static void slic_cmdq_getdone(struct adapter *adapter)
1439 {
1440 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1441 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1442 unsigned long flags;
1443
1444 spin_lock_irqsave(&done_cmdq->lock, flags);
1445
1446 free_cmdq->head = done_cmdq->head;
1447 free_cmdq->count = done_cmdq->count;
1448 done_cmdq->head = NULL;
1449 done_cmdq->tail = NULL;
1450 done_cmdq->count = 0;
1451 spin_unlock_irqrestore(&done_cmdq->lock, flags);
1452 }
1453
1454 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1455 {
1456 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1457 struct slic_hostcmd *cmd = NULL;
1458 unsigned long flags;
1459
1460 lock_and_retry:
1461 spin_lock_irqsave(&cmdq->lock, flags);
1462 retry:
1463 cmd = cmdq->head;
1464 if (cmd) {
1465 cmdq->head = cmd->next;
1466 cmdq->count--;
1467 spin_unlock_irqrestore(&cmdq->lock, flags);
1468 } else {
1469 slic_cmdq_getdone(adapter);
1470 cmd = cmdq->head;
1471 if (cmd) {
1472 goto retry;
1473 } else {
1474 u32 *pageaddr;
1475
1476 spin_unlock_irqrestore(&cmdq->lock, flags);
1477 pageaddr = slic_cmdqmem_addpage(adapter);
1478 if (pageaddr) {
1479 slic_cmdq_addcmdpage(adapter, pageaddr);
1480 goto lock_and_retry;
1481 }
1482 }
1483 }
1484 return cmd;
1485 }
1486
1487 static void slic_cmdq_putdone_irq(struct adapter *adapter,
1488 struct slic_hostcmd *cmd)
1489 {
1490 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1491
1492 spin_lock(&cmdq->lock);
1493 cmd->busy = 0;
1494 cmd->next = cmdq->head;
1495 cmdq->head = cmd;
1496 cmdq->count++;
1497 if ((adapter->xmitq_full) && (cmdq->count > 10))
1498 netif_wake_queue(adapter->netdev);
1499 spin_unlock(&cmdq->lock);
1500 }
1501
1502 static int slic_rcvqueue_fill(struct adapter *adapter)
1503 {
1504 void *paddr;
1505 u32 paddrl;
1506 u32 paddrh;
1507 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1508 int i = 0;
1509 struct device *dev = &adapter->netdev->dev;
1510
1511 while (i < SLIC_RCVQ_FILLENTRIES) {
1512 struct slic_rcvbuf *rcvbuf;
1513 struct sk_buff *skb;
1514 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1515 retry_rcvqfill:
1516 #endif
1517 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1518 if (skb) {
1519 paddr = (void *)(unsigned long)
1520 pci_map_single(adapter->pcidev,
1521 skb->data,
1522 SLIC_RCVQ_RCVBUFSIZE,
1523 PCI_DMA_FROMDEVICE);
1524 paddrl = SLIC_GET_ADDR_LOW(paddr);
1525 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1526
1527 skb->len = SLIC_RCVBUF_HEADSIZE;
1528 rcvbuf = (struct slic_rcvbuf *)skb->head;
1529 rcvbuf->status = 0;
1530 skb->next = NULL;
1531 #ifdef KLUDGE_FOR_4GB_BOUNDARY
1532 if (paddrl == 0) {
1533 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1534 __func__);
1535 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1536 dev_err(dev, " skbdata[%p]\n",
1537 skb->data);
1538 dev_err(dev, " skblen[%x]\n", skb->len);
1539 dev_err(dev, " paddr[%p]\n", paddr);
1540 dev_err(dev, " paddrl[%x]\n", paddrl);
1541 dev_err(dev, " paddrh[%x]\n", paddrh);
1542 dev_err(dev, " rcvq->head[%p]\n",
1543 rcvq->head);
1544 dev_err(dev, " rcvq->tail[%p]\n",
1545 rcvq->tail);
1546 dev_err(dev, " rcvq->count[%x]\n",
1547 rcvq->count);
1548 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1549 goto retry_rcvqfill;
1550 }
1551 #else
1552 if (paddrl == 0) {
1553 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1554 __func__);
1555 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1556 dev_err(dev, " skbdata[%p]\n",
1557 skb->data);
1558 dev_err(dev, " skblen[%x]\n", skb->len);
1559 dev_err(dev, " paddr[%p]\n", paddr);
1560 dev_err(dev, " paddrl[%x]\n", paddrl);
1561 dev_err(dev, " paddrh[%x]\n", paddrh);
1562 dev_err(dev, " rcvq->head[%p]\n",
1563 rcvq->head);
1564 dev_err(dev, " rcvq->tail[%p]\n",
1565 rcvq->tail);
1566 dev_err(dev, " rcvq->count[%x]\n",
1567 rcvq->count);
1568 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1569 }
1570 #endif
1571 if (paddrh == 0) {
1572 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1573 (u32)paddrl, DONT_FLUSH);
1574 } else {
1575 slic_reg64_write(adapter,
1576 &adapter->slic_regs->slic_hbar64,
1577 paddrl,
1578 &adapter->slic_regs->slic_addr_upper,
1579 paddrh, DONT_FLUSH);
1580 }
1581 if (rcvq->head)
1582 rcvq->tail->next = skb;
1583 else
1584 rcvq->head = skb;
1585 rcvq->tail = skb;
1586 rcvq->count++;
1587 i++;
1588 } else {
1589 dev_err(&adapter->netdev->dev,
1590 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1591 i);
1592 break;
1593 }
1594 }
1595 return i;
1596 }
1597
1598 static void slic_rcvqueue_free(struct adapter *adapter)
1599 {
1600 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1601 struct sk_buff *skb;
1602
1603 while (rcvq->head) {
1604 skb = rcvq->head;
1605 rcvq->head = rcvq->head->next;
1606 dev_kfree_skb(skb);
1607 }
1608 rcvq->tail = NULL;
1609 rcvq->head = NULL;
1610 rcvq->count = 0;
1611 }
1612
1613 static int slic_rcvqueue_init(struct adapter *adapter)
1614 {
1615 int i, count;
1616 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1617
1618 rcvq->tail = NULL;
1619 rcvq->head = NULL;
1620 rcvq->size = SLIC_RCVQ_ENTRIES;
1621 rcvq->errors = 0;
1622 rcvq->count = 0;
1623 i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES;
1624 count = 0;
1625 while (i) {
1626 count += slic_rcvqueue_fill(adapter);
1627 i--;
1628 }
1629 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1630 slic_rcvqueue_free(adapter);
1631 return -ENOMEM;
1632 }
1633 return 0;
1634 }
1635
1636 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1637 {
1638 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1639 struct sk_buff *skb;
1640 struct slic_rcvbuf *rcvbuf;
1641 int count;
1642
1643 if (rcvq->count) {
1644 skb = rcvq->head;
1645 rcvbuf = (struct slic_rcvbuf *)skb->head;
1646
1647 if (rcvbuf->status & IRHDDR_SVALID) {
1648 rcvq->head = rcvq->head->next;
1649 skb->next = NULL;
1650 rcvq->count--;
1651 } else {
1652 skb = NULL;
1653 }
1654 } else {
1655 dev_err(&adapter->netdev->dev,
1656 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1657 skb = NULL;
1658 }
1659 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1660 count = slic_rcvqueue_fill(adapter);
1661 if (!count)
1662 break;
1663 }
1664 if (skb)
1665 rcvq->errors = 0;
1666 return skb;
1667 }
1668
1669 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1670 {
1671 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1672 void *paddr;
1673 u32 paddrl;
1674 u32 paddrh;
1675 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1676 struct device *dev;
1677
1678 paddr = (void *)(unsigned long)
1679 pci_map_single(adapter->pcidev, skb->head,
1680 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
1681 rcvbuf->status = 0;
1682 skb->next = NULL;
1683
1684 paddrl = SLIC_GET_ADDR_LOW(paddr);
1685 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1686
1687 if (paddrl == 0) {
1688 dev = &adapter->netdev->dev;
1689 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1690 __func__);
1691 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1692 dev_err(dev, " skbdata[%p]\n", skb->data);
1693 dev_err(dev, " skblen[%x]\n", skb->len);
1694 dev_err(dev, " paddr[%p]\n", paddr);
1695 dev_err(dev, " paddrl[%x]\n", paddrl);
1696 dev_err(dev, " paddrh[%x]\n", paddrh);
1697 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1698 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1699 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
1700 }
1701 if (paddrh == 0) {
1702 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1703 DONT_FLUSH);
1704 } else {
1705 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1706 paddrl, &adapter->slic_regs->slic_addr_upper,
1707 paddrh, DONT_FLUSH);
1708 }
1709 if (rcvq->head)
1710 rcvq->tail->next = skb;
1711 else
1712 rcvq->head = skb;
1713 rcvq->tail = skb;
1714 rcvq->count++;
1715 return rcvq->count;
1716 }
1717
1718 /*
1719 * slic_link_event_handler -
1720 *
1721 * Initiate a link configuration sequence. The link configuration begins
1722 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1723 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1724 * routine will follow it up witha UP configuration write command, which
1725 * will also complete asynchronously.
1726 *
1727 */
1728 static int slic_link_event_handler(struct adapter *adapter)
1729 {
1730 int status;
1731 struct slic_shmem *pshmem;
1732
1733 if (adapter->state != ADAPT_UP) {
1734 /* Adapter is not operational. Ignore. */
1735 return -ENODEV;
1736 }
1737
1738 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
1739
1740 #if BITS_PER_LONG == 64
1741 status = slic_upr_request(adapter,
1742 SLIC_UPR_RLSR,
1743 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1744 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1745 0, 0);
1746 #else
1747 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1748 (u32)&pshmem->linkstatus, /* no 4GB wrap guaranteed */
1749 0, 0, 0);
1750 #endif
1751 return status;
1752 }
1753
1754 static void slic_init_cleanup(struct adapter *adapter)
1755 {
1756 if (adapter->intrregistered) {
1757 adapter->intrregistered = 0;
1758 free_irq(adapter->netdev->irq, adapter->netdev);
1759 }
1760 if (adapter->pshmem) {
1761 pci_free_consistent(adapter->pcidev,
1762 sizeof(struct slic_shmem),
1763 adapter->pshmem, adapter->phys_shmem);
1764 adapter->pshmem = NULL;
1765 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
1766 }
1767
1768 if (adapter->pingtimerset) {
1769 adapter->pingtimerset = 0;
1770 del_timer(&adapter->pingtimer);
1771 }
1772
1773 slic_rspqueue_free(adapter);
1774 slic_cmdq_free(adapter);
1775 slic_rcvqueue_free(adapter);
1776 }
1777
1778 /*
1779 * Allocate a mcast_address structure to hold the multicast address.
1780 * Link it in.
1781 */
1782 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1783 {
1784 struct mcast_address *mcaddr, *mlist;
1785
1786 /* Check to see if it already exists */
1787 mlist = adapter->mcastaddrs;
1788 while (mlist) {
1789 if (ether_addr_equal(mlist->address, address))
1790 return 0;
1791 mlist = mlist->next;
1792 }
1793
1794 /* Doesn't already exist. Allocate a structure to hold it */
1795 mcaddr = kmalloc(sizeof(*mcaddr), GFP_ATOMIC);
1796 if (!mcaddr)
1797 return 1;
1798
1799 ether_addr_copy(mcaddr->address, address);
1800
1801 mcaddr->next = adapter->mcastaddrs;
1802 adapter->mcastaddrs = mcaddr;
1803
1804 return 0;
1805 }
1806
1807 static void slic_mcast_set_list(struct net_device *dev)
1808 {
1809 struct adapter *adapter = netdev_priv(dev);
1810 int status = 0;
1811 char *addresses;
1812 struct netdev_hw_addr *ha;
1813
1814 netdev_for_each_mc_addr(ha, dev) {
1815 addresses = (char *)&ha->addr;
1816 status = slic_mcast_add_list(adapter, addresses);
1817 if (status != 0)
1818 break;
1819 slic_mcast_set_bit(adapter, addresses);
1820 }
1821
1822 if (adapter->devflags_prev != dev->flags) {
1823 adapter->macopts = MAC_DIRECTED;
1824 if (dev->flags) {
1825 if (dev->flags & IFF_BROADCAST)
1826 adapter->macopts |= MAC_BCAST;
1827 if (dev->flags & IFF_PROMISC)
1828 adapter->macopts |= MAC_PROMISC;
1829 if (dev->flags & IFF_ALLMULTI)
1830 adapter->macopts |= MAC_ALLMCAST;
1831 if (dev->flags & IFF_MULTICAST)
1832 adapter->macopts |= MAC_MCAST;
1833 }
1834 adapter->devflags_prev = dev->flags;
1835 slic_config_set(adapter, true);
1836 } else {
1837 if (status == 0)
1838 slic_mcast_set_mask(adapter);
1839 }
1840 }
1841
1842 #define XMIT_FAIL_LINK_STATE 1
1843 #define XMIT_FAIL_ZERO_LENGTH 2
1844 #define XMIT_FAIL_HOSTCMD_FAIL 3
1845
1846 static void slic_xmit_build_request(struct adapter *adapter,
1847 struct slic_hostcmd *hcmd, struct sk_buff *skb)
1848 {
1849 struct slic_host64_cmd *ihcmd;
1850 ulong phys_addr;
1851
1852 ihcmd = &hcmd->cmd64;
1853
1854 ihcmd->flags = adapter->port << IHFLG_IFSHFT;
1855 ihcmd->command = IHCMD_XMT_REQ;
1856 ihcmd->u.slic_buffers.totlen = skb->len;
1857 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
1858 PCI_DMA_TODEVICE);
1859 if (pci_dma_mapping_error(adapter->pcidev, phys_addr)) {
1860 kfree_skb(skb);
1861 dev_err(&adapter->pcidev->dev, "DMA mapping error\n");
1862 return;
1863 }
1864 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
1865 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
1866 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1867 #if BITS_PER_LONG == 64
1868 hcmd->cmdsize = (u32)((((u64)&ihcmd->u.slic_buffers.bufs[1] -
1869 (u64)hcmd) + 31) >> 5);
1870 #else
1871 hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
1872 (u32)hcmd) + 31) >> 5;
1873 #endif
1874 }
1875
1876 static void slic_xmit_fail(struct adapter *adapter,
1877 struct sk_buff *skb,
1878 void *cmd, u32 skbtype, u32 status)
1879 {
1880 if (adapter->xmitq_full)
1881 netif_stop_queue(adapter->netdev);
1882 if ((!cmd) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1883 switch (status) {
1884 case XMIT_FAIL_LINK_STATE:
1885 dev_err(&adapter->netdev->dev,
1886 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
1887 skb, skb->pkt_type,
1888 SLIC_LINKSTATE(adapter->linkstate),
1889 SLIC_ADAPTER_STATE(adapter->state),
1890 adapter->state,
1891 SLIC_CARD_STATE(adapter->card->state),
1892 adapter->card->state);
1893 break;
1894 case XMIT_FAIL_ZERO_LENGTH:
1895 dev_err(&adapter->netdev->dev,
1896 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
1897 skb, skb->pkt_type);
1898 break;
1899 case XMIT_FAIL_HOSTCMD_FAIL:
1900 dev_err(&adapter->netdev->dev,
1901 "xmit_start skb[%p] type[%x] No host commands available\n",
1902 skb, skb->pkt_type);
1903 break;
1904 }
1905 }
1906 dev_kfree_skb(skb);
1907 adapter->netdev->stats.tx_dropped++;
1908 }
1909
1910 static void slic_rcv_handle_error(struct adapter *adapter,
1911 struct slic_rcvbuf *rcvbuf)
1912 {
1913 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1914 struct net_device *netdev = adapter->netdev;
1915
1916 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1917 if (hdr->frame_status14 & VRHSTAT_802OE)
1918 adapter->if_events.oflow802++;
1919 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1920 adapter->if_events.Tprtoflow++;
1921 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1922 adapter->if_events.uflow802++;
1923 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1924 adapter->if_events.rcvearly++;
1925 netdev->stats.rx_fifo_errors++;
1926 }
1927 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1928 adapter->if_events.Bufov++;
1929 netdev->stats.rx_over_errors++;
1930 }
1931 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1932 adapter->if_events.Carre++;
1933 netdev->stats.tx_carrier_errors++;
1934 }
1935 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1936 adapter->if_events.Longe++;
1937 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1938 adapter->if_events.Invp++;
1939 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1940 adapter->if_events.Crc++;
1941 netdev->stats.rx_crc_errors++;
1942 }
1943 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1944 adapter->if_events.Drbl++;
1945 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1946 adapter->if_events.Code++;
1947 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1948 adapter->if_events.TpCsum++;
1949 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1950 adapter->if_events.TpHlen++;
1951 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1952 adapter->if_events.IpCsum++;
1953 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1954 adapter->if_events.IpLen++;
1955 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1956 adapter->if_events.IpHlen++;
1957 } else {
1958 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1959 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1960
1961 if (xerr == VGBSTAT_XCSERR)
1962 adapter->if_events.TpCsum++;
1963 if (xerr == VGBSTAT_XUFLOW)
1964 adapter->if_events.Tprtoflow++;
1965 if (xerr == VGBSTAT_XHLEN)
1966 adapter->if_events.TpHlen++;
1967 }
1968 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1969 u32 nerr =
1970 (hdr->
1971 frame_statusGB >> VGBSTAT_NERRSHFT) &
1972 VGBSTAT_NERRMSK;
1973 if (nerr == VGBSTAT_NCSERR)
1974 adapter->if_events.IpCsum++;
1975 if (nerr == VGBSTAT_NUFLOW)
1976 adapter->if_events.IpLen++;
1977 if (nerr == VGBSTAT_NHLEN)
1978 adapter->if_events.IpHlen++;
1979 }
1980 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1981 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1982
1983 if (lerr == VGBSTAT_LDEARLY)
1984 adapter->if_events.rcvearly++;
1985 if (lerr == VGBSTAT_LBOFLO)
1986 adapter->if_events.Bufov++;
1987 if (lerr == VGBSTAT_LCODERR)
1988 adapter->if_events.Code++;
1989 if (lerr == VGBSTAT_LDBLNBL)
1990 adapter->if_events.Drbl++;
1991 if (lerr == VGBSTAT_LCRCERR)
1992 adapter->if_events.Crc++;
1993 if (lerr == VGBSTAT_LOFLO)
1994 adapter->if_events.oflow802++;
1995 if (lerr == VGBSTAT_LUFLO)
1996 adapter->if_events.uflow802++;
1997 }
1998 }
1999 }
2000
2001 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
2002 #define M_FAST_PATH 0x0040
2003
2004 static void slic_rcv_handler(struct adapter *adapter)
2005 {
2006 struct net_device *netdev = adapter->netdev;
2007 struct sk_buff *skb;
2008 struct slic_rcvbuf *rcvbuf;
2009 u32 frames = 0;
2010
2011 while ((skb = slic_rcvqueue_getnext(adapter))) {
2012 u32 rx_bytes;
2013
2014 rcvbuf = (struct slic_rcvbuf *)skb->head;
2015 adapter->card->events++;
2016 if (rcvbuf->status & IRHDDR_ERR) {
2017 adapter->rx_errors++;
2018 slic_rcv_handle_error(adapter, rcvbuf);
2019 slic_rcvqueue_reinsert(adapter, skb);
2020 continue;
2021 }
2022
2023 if (!slic_mac_filter(adapter, (struct ether_header *)
2024 rcvbuf->data)) {
2025 slic_rcvqueue_reinsert(adapter, skb);
2026 continue;
2027 }
2028 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2029 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2030 skb_put(skb, rx_bytes);
2031 netdev->stats.rx_packets++;
2032 netdev->stats.rx_bytes += rx_bytes;
2033 #if SLIC_OFFLOAD_IP_CHECKSUM
2034 skb->ip_summed = CHECKSUM_UNNECESSARY;
2035 #endif
2036
2037 skb->dev = adapter->netdev;
2038 skb->protocol = eth_type_trans(skb, skb->dev);
2039 netif_rx(skb);
2040
2041 ++frames;
2042 #if SLIC_INTERRUPT_PROCESS_LIMIT
2043 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2044 adapter->rcv_interrupt_yields++;
2045 break;
2046 }
2047 #endif
2048 }
2049 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
2050 }
2051
2052 static void slic_xmit_complete(struct adapter *adapter)
2053 {
2054 struct slic_hostcmd *hcmd;
2055 struct slic_rspbuf *rspbuf;
2056 u32 frames = 0;
2057 struct slic_handle_word slic_handle_word;
2058
2059 do {
2060 rspbuf = slic_rspqueue_getnext(adapter);
2061 if (!rspbuf)
2062 break;
2063 adapter->xmit_completes++;
2064 adapter->card->events++;
2065 /*
2066 * Get the complete host command buffer
2067 */
2068 slic_handle_word.handle_token = rspbuf->hosthandle;
2069 hcmd =
2070 adapter->slic_handles[slic_handle_word.handle_index].
2071 address;
2072 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
2073 if (hcmd->type == SLIC_CMD_DUMB) {
2074 if (hcmd->skb)
2075 dev_kfree_skb_irq(hcmd->skb);
2076 slic_cmdq_putdone_irq(adapter, hcmd);
2077 }
2078 rspbuf->status = 0;
2079 rspbuf->hosthandle = 0;
2080 frames++;
2081 } while (1);
2082 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
2083 }
2084
2085 static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2086 struct net_device *dev)
2087 {
2088 if (isr & ~ISR_IO) {
2089 if (isr & ISR_ERR) {
2090 adapter->error_interrupts++;
2091 if (isr & ISR_RMISS) {
2092 int count;
2093 int pre_count;
2094 int errors;
2095
2096 struct slic_rcvqueue *rcvq =
2097 &adapter->rcvqueue;
2098
2099 adapter->error_rmiss_interrupts++;
2100
2101 if (!rcvq->errors)
2102 rcv_count = rcvq->count;
2103 pre_count = rcvq->count;
2104 errors = rcvq->errors;
2105
2106 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2107 count = slic_rcvqueue_fill(adapter);
2108 if (!count)
2109 break;
2110 }
2111 } else if (isr & ISR_XDROP) {
2112 dev_err(&dev->dev,
2113 "isr & ISR_ERR [%x] ISR_XDROP\n",
2114 isr);
2115 } else {
2116 dev_err(&dev->dev,
2117 "isr & ISR_ERR [%x]\n",
2118 isr);
2119 }
2120 }
2121
2122 if (isr & ISR_LEVENT) {
2123 adapter->linkevent_interrupts++;
2124 if (slic_link_event_handler(adapter))
2125 adapter->linkevent_interrupts--;
2126 }
2127
2128 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2129 (isr & ISR_UPCBSY)) {
2130 adapter->upr_interrupts++;
2131 slic_upr_request_complete(adapter, isr);
2132 }
2133 }
2134
2135 if (isr & ISR_RCV) {
2136 adapter->rcv_interrupts++;
2137 slic_rcv_handler(adapter);
2138 }
2139
2140 if (isr & ISR_CMD) {
2141 adapter->xmit_interrupts++;
2142 slic_xmit_complete(adapter);
2143 }
2144 }
2145
2146 static irqreturn_t slic_interrupt(int irq, void *dev_id)
2147 {
2148 struct net_device *dev = dev_id;
2149 struct adapter *adapter = netdev_priv(dev);
2150 u32 isr;
2151
2152 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2153 slic_reg32_write(&adapter->slic_regs->slic_icr,
2154 ICR_INT_MASK, FLUSH);
2155 isr = adapter->isrcopy = adapter->pshmem->isr;
2156 adapter->pshmem->isr = 0;
2157 adapter->num_isrs++;
2158 switch (adapter->card->state) {
2159 case CARD_UP:
2160 slic_interrupt_card_up(isr, adapter, dev);
2161 break;
2162
2163 case CARD_DOWN:
2164 if ((isr & ISR_UPC) ||
2165 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2166 adapter->upr_interrupts++;
2167 slic_upr_request_complete(adapter, isr);
2168 }
2169 break;
2170 }
2171
2172 adapter->isrcopy = 0;
2173 adapter->all_reg_writes += 2;
2174 adapter->isr_reg_writes++;
2175 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2176 } else {
2177 adapter->false_interrupts++;
2178 }
2179 return IRQ_HANDLED;
2180 }
2181
2182 #define NORMAL_ETHFRAME 0
2183
2184 static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2185 {
2186 struct sliccard *card;
2187 struct adapter *adapter = netdev_priv(dev);
2188 struct slic_hostcmd *hcmd = NULL;
2189 u32 status = 0;
2190 void *offloadcmd = NULL;
2191
2192 card = adapter->card;
2193 if ((adapter->linkstate != LINK_UP) ||
2194 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2195 status = XMIT_FAIL_LINK_STATE;
2196 goto xmit_fail;
2197
2198 } else if (skb->len == 0) {
2199 status = XMIT_FAIL_ZERO_LENGTH;
2200 goto xmit_fail;
2201 }
2202
2203 hcmd = slic_cmdq_getfree(adapter);
2204 if (!hcmd) {
2205 adapter->xmitq_full = 1;
2206 status = XMIT_FAIL_HOSTCMD_FAIL;
2207 goto xmit_fail;
2208 }
2209 hcmd->skb = skb;
2210 hcmd->busy = 1;
2211 hcmd->type = SLIC_CMD_DUMB;
2212 slic_xmit_build_request(adapter, hcmd, skb);
2213 dev->stats.tx_packets++;
2214 dev->stats.tx_bytes += skb->len;
2215
2216 #ifdef DEBUG_DUMP
2217 if (adapter->kill_card) {
2218 struct slic_host64_cmd ihcmd;
2219
2220 ihcmd = &hcmd->cmd64;
2221
2222 ihcmd->flags |= 0x40;
2223 adapter->kill_card = 0; /* only do this once */
2224 }
2225 #endif
2226 if (hcmd->paddrh == 0) {
2227 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2228 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2229 } else {
2230 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2231 (hcmd->paddrl | hcmd->cmdsize),
2232 &adapter->slic_regs->slic_addr_upper,
2233 hcmd->paddrh, DONT_FLUSH);
2234 }
2235 xmit_done:
2236 return NETDEV_TX_OK;
2237 xmit_fail:
2238 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
2239 goto xmit_done;
2240 }
2241
2242 static void slic_adapter_freeresources(struct adapter *adapter)
2243 {
2244 slic_init_cleanup(adapter);
2245 adapter->error_interrupts = 0;
2246 adapter->rcv_interrupts = 0;
2247 adapter->xmit_interrupts = 0;
2248 adapter->linkevent_interrupts = 0;
2249 adapter->upr_interrupts = 0;
2250 adapter->num_isrs = 0;
2251 adapter->xmit_completes = 0;
2252 adapter->rcv_broadcasts = 0;
2253 adapter->rcv_multicasts = 0;
2254 adapter->rcv_unicasts = 0;
2255 }
2256
2257 static int slic_adapter_allocresources(struct adapter *adapter,
2258 unsigned long *flags)
2259 {
2260 if (!adapter->intrregistered) {
2261 int retval;
2262
2263 spin_unlock_irqrestore(&slic_global.driver_lock, *flags);
2264
2265 retval = request_irq(adapter->netdev->irq,
2266 &slic_interrupt,
2267 IRQF_SHARED,
2268 adapter->netdev->name, adapter->netdev);
2269
2270 spin_lock_irqsave(&slic_global.driver_lock, *flags);
2271
2272 if (retval) {
2273 dev_err(&adapter->netdev->dev,
2274 "request_irq (%s) FAILED [%x]\n",
2275 adapter->netdev->name, retval);
2276 return retval;
2277 }
2278 adapter->intrregistered = 1;
2279 }
2280 return 0;
2281 }
2282
2283 /*
2284 * slic_if_init
2285 *
2286 * Perform initialization of our slic interface.
2287 *
2288 */
2289 static int slic_if_init(struct adapter *adapter, unsigned long *flags)
2290 {
2291 struct sliccard *card = adapter->card;
2292 struct net_device *dev = adapter->netdev;
2293 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2294 struct slic_shmem *pshmem;
2295 int rc;
2296
2297 /* adapter should be down at this point */
2298 if (adapter->state != ADAPT_DOWN) {
2299 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2300 __func__);
2301 rc = -EIO;
2302 goto err;
2303 }
2304
2305 adapter->devflags_prev = dev->flags;
2306 adapter->macopts = MAC_DIRECTED;
2307 if (dev->flags) {
2308 if (dev->flags & IFF_BROADCAST)
2309 adapter->macopts |= MAC_BCAST;
2310 if (dev->flags & IFF_PROMISC)
2311 adapter->macopts |= MAC_PROMISC;
2312 if (dev->flags & IFF_ALLMULTI)
2313 adapter->macopts |= MAC_ALLMCAST;
2314 if (dev->flags & IFF_MULTICAST)
2315 adapter->macopts |= MAC_MCAST;
2316 }
2317 rc = slic_adapter_allocresources(adapter, flags);
2318 if (rc) {
2319 dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n",
2320 rc);
2321 slic_adapter_freeresources(adapter);
2322 goto err;
2323 }
2324
2325 if (!adapter->queues_initialized) {
2326 rc = slic_rspqueue_init(adapter);
2327 if (rc)
2328 goto err;
2329 rc = slic_cmdq_init(adapter);
2330 if (rc)
2331 goto err;
2332 rc = slic_rcvqueue_init(adapter);
2333 if (rc)
2334 goto err;
2335 adapter->queues_initialized = 1;
2336 }
2337
2338 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2339 mdelay(1);
2340
2341 if (!adapter->isp_initialized) {
2342 unsigned long flags;
2343
2344 pshmem = (struct slic_shmem *)(unsigned long)
2345 adapter->phys_shmem;
2346
2347 spin_lock_irqsave(&adapter->bit64reglock, flags);
2348
2349 #if BITS_PER_LONG == 64
2350 slic_reg32_write(&slic_regs->slic_addr_upper,
2351 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2352 slic_reg32_write(&slic_regs->slic_isp,
2353 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2354 #else
2355 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2356 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr,
2357 FLUSH);
2358 #endif
2359 spin_unlock_irqrestore(&adapter->bit64reglock, flags);
2360 adapter->isp_initialized = 1;
2361 }
2362
2363 adapter->state = ADAPT_UP;
2364 if (!card->loadtimerset) {
2365 setup_timer(&card->loadtimer, &slic_timer_load_check,
2366 (ulong)card);
2367 card->loadtimer.expires =
2368 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2369 add_timer(&card->loadtimer);
2370
2371 card->loadtimerset = 1;
2372 }
2373
2374 if (!adapter->pingtimerset) {
2375 setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
2376 adapter->pingtimer.expires =
2377 jiffies + (PING_TIMER_INTERVAL * HZ);
2378 add_timer(&adapter->pingtimer);
2379 adapter->pingtimerset = 1;
2380 adapter->card->pingstatus = ISR_PINGMASK;
2381 }
2382
2383 /*
2384 * clear any pending events, then enable interrupts
2385 */
2386 adapter->isrcopy = 0;
2387 adapter->pshmem->isr = 0;
2388 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2389 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2390
2391 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2392 rc = slic_link_event_handler(adapter);
2393 if (rc) {
2394 /* disable interrupts then clear pending events */
2395 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2396 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2397 if (adapter->pingtimerset) {
2398 del_timer(&adapter->pingtimer);
2399 adapter->pingtimerset = 0;
2400 }
2401 if (card->loadtimerset) {
2402 del_timer(&card->loadtimer);
2403 card->loadtimerset = 0;
2404 }
2405 adapter->state = ADAPT_DOWN;
2406 slic_adapter_freeresources(adapter);
2407 }
2408
2409 err:
2410 return rc;
2411 }
2412
2413 static int slic_entry_open(struct net_device *dev)
2414 {
2415 struct adapter *adapter = netdev_priv(dev);
2416 struct sliccard *card = adapter->card;
2417 unsigned long flags;
2418 int status;
2419
2420 netif_stop_queue(adapter->netdev);
2421
2422 spin_lock_irqsave(&slic_global.driver_lock, flags);
2423 if (!adapter->activated) {
2424 card->adapters_activated++;
2425 slic_global.num_slic_ports_active++;
2426 adapter->activated = 1;
2427 }
2428 status = slic_if_init(adapter, &flags);
2429
2430 if (status != 0) {
2431 if (adapter->activated) {
2432 card->adapters_activated--;
2433 slic_global.num_slic_ports_active--;
2434 adapter->activated = 0;
2435 }
2436 goto spin_unlock;
2437 }
2438 if (!card->master)
2439 card->master = adapter;
2440
2441 spin_unlock:
2442 spin_unlock_irqrestore(&slic_global.driver_lock, flags);
2443 return status;
2444 }
2445
2446 static void slic_card_cleanup(struct sliccard *card)
2447 {
2448 if (card->loadtimerset) {
2449 card->loadtimerset = 0;
2450 del_timer_sync(&card->loadtimer);
2451 }
2452
2453 kfree(card);
2454 }
2455
2456 static void slic_entry_remove(struct pci_dev *pcidev)
2457 {
2458 struct net_device *dev = pci_get_drvdata(pcidev);
2459 struct adapter *adapter = netdev_priv(dev);
2460 struct sliccard *card;
2461 struct mcast_address *mcaddr, *mlist;
2462
2463 unregister_netdev(dev);
2464
2465 slic_adapter_freeresources(adapter);
2466 slic_unmap_mmio_space(adapter);
2467
2468 /* free multicast addresses */
2469 mlist = adapter->mcastaddrs;
2470 while (mlist) {
2471 mcaddr = mlist;
2472 mlist = mlist->next;
2473 kfree(mcaddr);
2474 }
2475 card = adapter->card;
2476 card->adapters_allocated--;
2477 adapter->allocated = 0;
2478 if (!card->adapters_allocated) {
2479 struct sliccard *curr_card = slic_global.slic_card;
2480
2481 if (curr_card == card) {
2482 slic_global.slic_card = card->next;
2483 } else {
2484 while (curr_card->next != card)
2485 curr_card = curr_card->next;
2486 curr_card->next = card->next;
2487 }
2488 slic_global.num_slic_cards--;
2489 slic_card_cleanup(card);
2490 }
2491 free_netdev(dev);
2492 pci_release_regions(pcidev);
2493 pci_disable_device(pcidev);
2494 }
2495
2496 static int slic_entry_halt(struct net_device *dev)
2497 {
2498 struct adapter *adapter = netdev_priv(dev);
2499 struct sliccard *card = adapter->card;
2500 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2501 unsigned long flags;
2502
2503 spin_lock_irqsave(&slic_global.driver_lock, flags);
2504 netif_stop_queue(adapter->netdev);
2505 adapter->state = ADAPT_DOWN;
2506 adapter->linkstate = LINK_DOWN;
2507 adapter->upr_list = NULL;
2508 adapter->upr_busy = 0;
2509 adapter->devflags_prev = 0;
2510 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2511 adapter->all_reg_writes++;
2512 adapter->icr_reg_writes++;
2513 slic_config_clear(adapter);
2514 if (adapter->activated) {
2515 card->adapters_activated--;
2516 slic_global.num_slic_ports_active--;
2517 adapter->activated = 0;
2518 }
2519 #ifdef AUTOMATIC_RESET
2520 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
2521 #endif
2522 /*
2523 * Reset the adapter's cmd queues
2524 */
2525 slic_cmdq_reset(adapter);
2526
2527 #ifdef AUTOMATIC_RESET
2528 if (!card->adapters_activated)
2529 slic_card_init(card, adapter);
2530 #endif
2531
2532 spin_unlock_irqrestore(&slic_global.driver_lock, flags);
2533 return 0;
2534 }
2535
2536 static struct net_device_stats *slic_get_stats(struct net_device *dev)
2537 {
2538 struct adapter *adapter = netdev_priv(dev);
2539
2540 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
2541 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
2542 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
2543 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
2544 dev->stats.tx_heartbeat_errors = 0;
2545 dev->stats.tx_aborted_errors = 0;
2546 dev->stats.tx_window_errors = 0;
2547 dev->stats.tx_fifo_errors = 0;
2548 dev->stats.rx_frame_errors = 0;
2549 dev->stats.rx_length_errors = 0;
2550
2551 return &dev->stats;
2552 }
2553
2554 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2555 {
2556 struct adapter *adapter = netdev_priv(dev);
2557 struct ethtool_cmd edata;
2558 struct ethtool_cmd ecmd;
2559 u32 data[7];
2560 u32 intagg;
2561
2562 switch (cmd) {
2563 case SIOCSLICSETINTAGG:
2564 if (copy_from_user(data, rq->ifr_data, 28))
2565 return -EFAULT;
2566 intagg = data[0];
2567 dev_err(&dev->dev, "set interrupt aggregation to %d\n",
2568 intagg);
2569 slic_intagg_set(adapter, intagg);
2570 return 0;
2571
2572 case SIOCETHTOOL:
2573 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
2574 return -EFAULT;
2575
2576 if (ecmd.cmd == ETHTOOL_GSET) {
2577 memset(&edata, 0, sizeof(edata));
2578 edata.supported = (SUPPORTED_10baseT_Half |
2579 SUPPORTED_10baseT_Full |
2580 SUPPORTED_100baseT_Half |
2581 SUPPORTED_100baseT_Full |
2582 SUPPORTED_Autoneg | SUPPORTED_MII);
2583 edata.port = PORT_MII;
2584 edata.transceiver = XCVR_INTERNAL;
2585 edata.phy_address = 0;
2586 if (adapter->linkspeed == LINK_100MB)
2587 edata.speed = SPEED_100;
2588 else if (adapter->linkspeed == LINK_10MB)
2589 edata.speed = SPEED_10;
2590 else
2591 edata.speed = 0;
2592
2593 if (adapter->linkduplex == LINK_FULLD)
2594 edata.duplex = DUPLEX_FULL;
2595 else
2596 edata.duplex = DUPLEX_HALF;
2597
2598 edata.autoneg = AUTONEG_ENABLE;
2599 edata.maxtxpkt = 1;
2600 edata.maxrxpkt = 1;
2601 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
2602 return -EFAULT;
2603
2604 } else if (ecmd.cmd == ETHTOOL_SSET) {
2605 if (!capable(CAP_NET_ADMIN))
2606 return -EPERM;
2607
2608 if (adapter->linkspeed == LINK_100MB)
2609 edata.speed = SPEED_100;
2610 else if (adapter->linkspeed == LINK_10MB)
2611 edata.speed = SPEED_10;
2612 else
2613 edata.speed = 0;
2614
2615 if (adapter->linkduplex == LINK_FULLD)
2616 edata.duplex = DUPLEX_FULL;
2617 else
2618 edata.duplex = DUPLEX_HALF;
2619
2620 edata.autoneg = AUTONEG_ENABLE;
2621 edata.maxtxpkt = 1;
2622 edata.maxrxpkt = 1;
2623 if ((ecmd.speed != edata.speed) ||
2624 (ecmd.duplex != edata.duplex)) {
2625 u32 speed;
2626 u32 duplex;
2627
2628 if (ecmd.speed == SPEED_10)
2629 speed = 0;
2630 else
2631 speed = PCR_SPEED_100;
2632 if (ecmd.duplex == DUPLEX_FULL)
2633 duplex = PCR_DUPLEX_FULL;
2634 else
2635 duplex = 0;
2636 slic_link_config(adapter, speed, duplex);
2637 if (slic_link_event_handler(adapter))
2638 return -EFAULT;
2639 }
2640 }
2641 return 0;
2642 default:
2643 return -EOPNOTSUPP;
2644 }
2645 }
2646
2647 static void slic_config_pci(struct pci_dev *pcidev)
2648 {
2649 u16 pci_command;
2650 u16 new_command;
2651
2652 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
2653
2654 new_command = pci_command | PCI_COMMAND_MASTER
2655 | PCI_COMMAND_MEMORY
2656 | PCI_COMMAND_INVALIDATE
2657 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
2658 if (pci_command != new_command)
2659 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
2660 }
2661
2662 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2663 {
2664 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2665 struct slic_eeprom *peeprom;
2666 struct oslic_eeprom *pOeeprom;
2667 dma_addr_t phys_config;
2668 u32 phys_configh;
2669 u32 phys_configl;
2670 u32 i = 0;
2671 struct slic_shmem *pshmem;
2672 int status;
2673 uint macaddrs = card->card_size;
2674 ushort eecodesize;
2675 ushort dramsize;
2676 ushort ee_chksum;
2677 ushort calc_chksum;
2678 struct slic_config_mac *pmac;
2679 unsigned char fruformat;
2680 unsigned char oemfruformat;
2681 struct atk_fru *patkfru;
2682 union oemfru *poemfru;
2683 unsigned long flags;
2684
2685 /* Reset everything except PCI configuration space */
2686 slic_soft_reset(adapter);
2687
2688 /* Download the microcode */
2689 status = slic_card_download(adapter);
2690 if (status)
2691 return status;
2692
2693 if (!card->config_set) {
2694 peeprom = pci_alloc_consistent(adapter->pcidev,
2695 sizeof(struct slic_eeprom),
2696 &phys_config);
2697
2698 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2699 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2700
2701 if (!peeprom) {
2702 dev_err(&adapter->pcidev->dev,
2703 "Failed to allocate DMA memory for EEPROM.\n");
2704 return -ENOMEM;
2705 }
2706
2707 memset(peeprom, 0, sizeof(struct slic_eeprom));
2708
2709 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2710 mdelay(1);
2711 pshmem = (struct slic_shmem *)(unsigned long)
2712 adapter->phys_shmem;
2713
2714 spin_lock_irqsave(&adapter->bit64reglock, flags);
2715 slic_reg32_write(&slic_regs->slic_addr_upper,
2716 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2717 slic_reg32_write(&slic_regs->slic_isp,
2718 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2719 spin_unlock_irqrestore(&adapter->bit64reglock, flags);
2720
2721 status = slic_config_get(adapter, phys_configl, phys_configh);
2722 if (status) {
2723 dev_err(&adapter->pcidev->dev,
2724 "Failed to fetch config data from device.\n");
2725 goto card_init_err;
2726 }
2727
2728 for (;;) {
2729 if (adapter->pshmem->isr) {
2730 if (adapter->pshmem->isr & ISR_UPC) {
2731 adapter->pshmem->isr = 0;
2732 slic_reg64_write(adapter,
2733 &slic_regs->slic_isp, 0,
2734 &slic_regs->slic_addr_upper,
2735 0, FLUSH);
2736 slic_reg32_write(&slic_regs->slic_isr,
2737 0, FLUSH);
2738
2739 slic_upr_request_complete(adapter, 0);
2740 break;
2741 }
2742
2743 adapter->pshmem->isr = 0;
2744 slic_reg32_write(&slic_regs->slic_isr,
2745 0, FLUSH);
2746 } else {
2747 mdelay(1);
2748 i++;
2749 if (i > 5000) {
2750 dev_err(&adapter->pcidev->dev,
2751 "Fetch of config data timed out.\n");
2752 slic_reg64_write(adapter,
2753 &slic_regs->slic_isp, 0,
2754 &slic_regs->slic_addr_upper,
2755 0, FLUSH);
2756 status = -EINVAL;
2757 goto card_init_err;
2758 }
2759 }
2760 }
2761
2762 switch (adapter->devid) {
2763 /* Oasis card */
2764 case SLIC_2GB_DEVICE_ID:
2765 /* extract EEPROM data and pointers to EEPROM data */
2766 pOeeprom = (struct oslic_eeprom *)peeprom;
2767 eecodesize = pOeeprom->EecodeSize;
2768 dramsize = pOeeprom->DramSize;
2769 pmac = pOeeprom->MacInfo;
2770 fruformat = pOeeprom->FruFormat;
2771 patkfru = &pOeeprom->AtkFru;
2772 oemfruformat = pOeeprom->OemFruFormat;
2773 poemfru = &pOeeprom->OemFru;
2774 macaddrs = 2;
2775 /*
2776 * Minor kludge for Oasis card
2777 * get 2 MAC addresses from the
2778 * EEPROM to ensure that function 1
2779 * gets the Port 1 MAC address
2780 */
2781 break;
2782 default:
2783 /* extract EEPROM data and pointers to EEPROM data */
2784 eecodesize = peeprom->EecodeSize;
2785 dramsize = peeprom->DramSize;
2786 pmac = peeprom->u2.mac.MacInfo;
2787 fruformat = peeprom->FruFormat;
2788 patkfru = &peeprom->AtkFru;
2789 oemfruformat = peeprom->OemFruFormat;
2790 poemfru = &peeprom->OemFru;
2791 break;
2792 }
2793
2794 card->config.EepromValid = false;
2795
2796 /* see if the EEPROM is valid by checking it's checksum */
2797 if ((eecodesize <= MAX_EECODE_SIZE) &&
2798 (eecodesize >= MIN_EECODE_SIZE)) {
2799
2800 ee_chksum =
2801 *(u16 *)((char *)peeprom + (eecodesize - 2));
2802 /*
2803 * calculate the EEPROM checksum
2804 */
2805 calc_chksum = slic_eeprom_cksum(peeprom,
2806 eecodesize - 2);
2807 /*
2808 * if the ucdoe chksum flag bit worked,
2809 * we wouldn't need this
2810 */
2811 if (ee_chksum == calc_chksum)
2812 card->config.EepromValid = true;
2813 }
2814 /* copy in the DRAM size */
2815 card->config.DramSize = dramsize;
2816
2817 /* copy in the MAC address(es) */
2818 for (i = 0; i < macaddrs; i++) {
2819 memcpy(&card->config.MacInfo[i],
2820 &pmac[i], sizeof(struct slic_config_mac));
2821 }
2822
2823 /* copy the Alacritech FRU information */
2824 card->config.FruFormat = fruformat;
2825 memcpy(&card->config.AtkFru, patkfru,
2826 sizeof(struct atk_fru));
2827
2828 pci_free_consistent(adapter->pcidev,
2829 sizeof(struct slic_eeprom),
2830 peeprom, phys_config);
2831
2832 if (!card->config.EepromValid) {
2833 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2834 &slic_regs->slic_addr_upper,
2835 0, FLUSH);
2836 dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
2837 return -EINVAL;
2838 }
2839
2840 card->config_set = 1;
2841 }
2842
2843 status = slic_card_download_gbrcv(adapter);
2844 if (status)
2845 return status;
2846
2847 if (slic_global.dynamic_intagg)
2848 slic_intagg_set(adapter, 0);
2849 else
2850 slic_intagg_set(adapter, adapter->intagg_delay);
2851
2852 /*
2853 * Initialize ping status to "ok"
2854 */
2855 card->pingstatus = ISR_PINGMASK;
2856
2857 /*
2858 * Lastly, mark our card state as up and return success
2859 */
2860 card->state = CARD_UP;
2861 card->reset_in_progress = 0;
2862
2863 return 0;
2864
2865 card_init_err:
2866 pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom),
2867 peeprom, phys_config);
2868 return status;
2869 }
2870
2871 static int slic_get_coalesce(struct net_device *dev,
2872 struct ethtool_coalesce *coalesce)
2873 {
2874 struct adapter *adapter = netdev_priv(dev);
2875
2876 adapter->intagg_delay = coalesce->rx_coalesce_usecs;
2877 adapter->dynamic_intagg = coalesce->use_adaptive_rx_coalesce;
2878 return 0;
2879 }
2880
2881 static int slic_set_coalesce(struct net_device *dev,
2882 struct ethtool_coalesce *coalesce)
2883 {
2884 struct adapter *adapter = netdev_priv(dev);
2885
2886 coalesce->rx_coalesce_usecs = adapter->intagg_delay;
2887 coalesce->use_adaptive_rx_coalesce = adapter->dynamic_intagg;
2888 return 0;
2889 }
2890
2891 static void slic_init_driver(void)
2892 {
2893 if (slic_first_init) {
2894 slic_first_init = 0;
2895 spin_lock_init(&slic_global.driver_lock);
2896 }
2897 }
2898
2899 static void slic_init_adapter(struct net_device *netdev,
2900 struct pci_dev *pcidev,
2901 const struct pci_device_id *pci_tbl_entry,
2902 void __iomem *memaddr, int chip_idx)
2903 {
2904 ushort index;
2905 struct slic_handle *pslic_handle;
2906 struct adapter *adapter = netdev_priv(netdev);
2907
2908 /* adapter->pcidev = pcidev;*/
2909 adapter->vendid = pci_tbl_entry->vendor;
2910 adapter->devid = pci_tbl_entry->device;
2911 adapter->subsysid = pci_tbl_entry->subdevice;
2912 adapter->busnumber = pcidev->bus->number;
2913 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
2914 adapter->functionnumber = (pcidev->devfn & 0x7);
2915 adapter->slic_regs = memaddr;
2916 adapter->irq = pcidev->irq;
2917 adapter->chipid = chip_idx;
2918 adapter->port = 0;
2919 adapter->cardindex = adapter->port;
2920 spin_lock_init(&adapter->upr_lock);
2921 spin_lock_init(&adapter->bit64reglock);
2922 spin_lock_init(&adapter->adapter_lock);
2923 spin_lock_init(&adapter->reset_lock);
2924 spin_lock_init(&adapter->handle_lock);
2925
2926 adapter->card_size = 1;
2927 /*
2928 * Initialize slic_handle array
2929 */
2930 /*
2931 * Start with 1. 0 is an invalid host handle.
2932 */
2933 for (index = 1, pslic_handle = &adapter->slic_handles[1];
2934 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
2935
2936 pslic_handle->token.handle_index = index;
2937 pslic_handle->type = SLIC_HANDLE_FREE;
2938 pslic_handle->next = adapter->pfree_slic_handles;
2939 adapter->pfree_slic_handles = pslic_handle;
2940 }
2941 adapter->pshmem = (struct slic_shmem *)
2942 pci_alloc_consistent(adapter->pcidev,
2943 sizeof(struct slic_shmem),
2944 &adapter->
2945 phys_shmem);
2946 if (adapter->pshmem)
2947 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
2948 }
2949
2950 static const struct net_device_ops slic_netdev_ops = {
2951 .ndo_open = slic_entry_open,
2952 .ndo_stop = slic_entry_halt,
2953 .ndo_start_xmit = slic_xmit_start,
2954 .ndo_do_ioctl = slic_ioctl,
2955 .ndo_set_mac_address = slic_mac_set_address,
2956 .ndo_get_stats = slic_get_stats,
2957 .ndo_set_rx_mode = slic_mcast_set_list,
2958 .ndo_validate_addr = eth_validate_addr,
2959 .ndo_change_mtu = eth_change_mtu,
2960 };
2961
2962 static u32 slic_card_locate(struct adapter *adapter)
2963 {
2964 struct sliccard *card = slic_global.slic_card;
2965 struct physcard *physcard = slic_global.phys_card;
2966 ushort card_hostid;
2967 u16 __iomem *hostid_reg;
2968 uint i;
2969 uint rdhostid_offset = 0;
2970
2971 switch (adapter->devid) {
2972 case SLIC_2GB_DEVICE_ID:
2973 rdhostid_offset = SLIC_RDHOSTID_2GB;
2974 break;
2975 case SLIC_1GB_DEVICE_ID:
2976 rdhostid_offset = SLIC_RDHOSTID_1GB;
2977 break;
2978 default:
2979 return -ENODEV;
2980 }
2981
2982 hostid_reg =
2983 (u16 __iomem *)(((u8 __iomem *)(adapter->slic_regs)) +
2984 rdhostid_offset);
2985
2986 /* read the 16 bit hostid from SRAM */
2987 card_hostid = (ushort)readw(hostid_reg);
2988
2989 /* Initialize a new card structure if need be */
2990 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2991 card = kzalloc(sizeof(*card), GFP_KERNEL);
2992 if (!card)
2993 return -ENOMEM;
2994
2995 card->next = slic_global.slic_card;
2996 slic_global.slic_card = card;
2997 card->busnumber = adapter->busnumber;
2998 card->slotnumber = adapter->slotnumber;
2999
3000 /* Find an available cardnum */
3001 for (i = 0; i < SLIC_MAX_CARDS; i++) {
3002 if (slic_global.cardnuminuse[i] == 0) {
3003 slic_global.cardnuminuse[i] = 1;
3004 card->cardnum = i;
3005 break;
3006 }
3007 }
3008 slic_global.num_slic_cards++;
3009 } else {
3010 /* Card exists, find the card this adapter belongs to */
3011 while (card) {
3012 if (card->cardnum == card_hostid)
3013 break;
3014 card = card->next;
3015 }
3016 }
3017
3018 if (!card)
3019 return -ENXIO;
3020 /* Put the adapter in the card's adapter list */
3021 if (!card->adapter[adapter->port]) {
3022 card->adapter[adapter->port] = adapter;
3023 adapter->card = card;
3024 }
3025
3026 card->card_size = 1; /* one port per *logical* card */
3027
3028 while (physcard) {
3029 for (i = 0; i < SLIC_MAX_PORTS; i++) {
3030 if (physcard->adapter[i])
3031 break;
3032 }
3033 if (i == SLIC_MAX_PORTS)
3034 break;
3035
3036 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3037 break;
3038 physcard = physcard->next;
3039 }
3040 if (!physcard) {
3041 /* no structure allocated for this physical card yet */
3042 physcard = kzalloc(sizeof(*physcard), GFP_ATOMIC);
3043 if (!physcard) {
3044 if (card_hostid == SLIC_HOSTID_DEFAULT)
3045 kfree(card);
3046 return -ENOMEM;
3047 }
3048
3049 physcard->next = slic_global.phys_card;
3050 slic_global.phys_card = physcard;
3051 physcard->adapters_allocd = 1;
3052 } else {
3053 physcard->adapters_allocd++;
3054 }
3055 /* Note - this is ZERO relative */
3056 adapter->physport = physcard->adapters_allocd - 1;
3057
3058 physcard->adapter[adapter->physport] = adapter;
3059 adapter->physcard = physcard;
3060
3061 return 0;
3062 }
3063
3064 static int slic_entry_probe(struct pci_dev *pcidev,
3065 const struct pci_device_id *pci_tbl_entry)
3066 {
3067 static int cards_found;
3068 static int did_version;
3069 int err = -ENODEV;
3070 struct net_device *netdev;
3071 struct adapter *adapter;
3072 void __iomem *memmapped_ioaddr = NULL;
3073 ulong mmio_start = 0;
3074 ulong mmio_len = 0;
3075 struct sliccard *card = NULL;
3076 int pci_using_dac = 0;
3077
3078 err = pci_enable_device(pcidev);
3079
3080 if (err)
3081 return err;
3082
3083 if (did_version++ == 0) {
3084 dev_info(&pcidev->dev, "%s\n", slic_banner);
3085 dev_info(&pcidev->dev, "%s\n", slic_proc_version);
3086 }
3087
3088 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3089 pci_using_dac = 1;
3090 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
3091 if (err) {
3092 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
3093 goto err_out_disable_pci;
3094 }
3095 } else {
3096 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3097 if (err) {
3098 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3099 goto err_out_disable_pci;
3100 }
3101 pci_using_dac = 0;
3102 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
3103 }
3104
3105 err = pci_request_regions(pcidev, DRV_NAME);
3106 if (err) {
3107 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3108 goto err_out_disable_pci;
3109 }
3110
3111 pci_set_master(pcidev);
3112
3113 netdev = alloc_etherdev(sizeof(struct adapter));
3114 if (!netdev) {
3115 err = -ENOMEM;
3116 goto err_out_exit_slic_probe;
3117 }
3118
3119 netdev->ethtool_ops = &slic_ethtool_ops;
3120 SET_NETDEV_DEV(netdev, &pcidev->dev);
3121
3122 pci_set_drvdata(pcidev, netdev);
3123 adapter = netdev_priv(netdev);
3124 adapter->netdev = netdev;
3125 adapter->pcidev = pcidev;
3126 slic_global.dynamic_intagg = adapter->dynamic_intagg;
3127 if (pci_using_dac)
3128 netdev->features |= NETIF_F_HIGHDMA;
3129
3130 mmio_start = pci_resource_start(pcidev, 0);
3131 mmio_len = pci_resource_len(pcidev, 0);
3132
3133 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3134 if (!memmapped_ioaddr) {
3135 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3136 mmio_len, mmio_start);
3137 err = -ENOMEM;
3138 goto err_out_free_netdev;
3139 }
3140
3141 slic_config_pci(pcidev);
3142
3143 slic_init_driver();
3144
3145 slic_init_adapter(netdev,
3146 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3147
3148 err = slic_card_locate(adapter);
3149 if (err) {
3150 dev_err(&pcidev->dev, "cannot locate card\n");
3151 goto err_out_unmap;
3152 }
3153
3154 card = adapter->card;
3155
3156 if (!adapter->allocated) {
3157 card->adapters_allocated++;
3158 adapter->allocated = 1;
3159 }
3160
3161 err = slic_card_init(card, adapter);
3162 if (err)
3163 goto err_out_unmap;
3164
3165 slic_adapter_set_hwaddr(adapter);
3166
3167 netdev->base_addr = (unsigned long)memmapped_ioaddr;
3168 netdev->irq = adapter->irq;
3169 netdev->netdev_ops = &slic_netdev_ops;
3170
3171 strcpy(netdev->name, "eth%d");
3172 err = register_netdev(netdev);
3173 if (err) {
3174 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3175 goto err_out_unmap;
3176 }
3177
3178 cards_found++;
3179
3180 return 0;
3181
3182 err_out_unmap:
3183 iounmap(memmapped_ioaddr);
3184 err_out_free_netdev:
3185 free_netdev(netdev);
3186 err_out_exit_slic_probe:
3187 pci_release_regions(pcidev);
3188 err_out_disable_pci:
3189 pci_disable_device(pcidev);
3190 return err;
3191 }
3192
3193 static struct pci_driver slic_driver = {
3194 .name = DRV_NAME,
3195 .id_table = slic_pci_tbl,
3196 .probe = slic_entry_probe,
3197 .remove = slic_entry_remove,
3198 };
3199
3200 static int __init slic_module_init(void)
3201 {
3202 slic_init_driver();
3203
3204 return pci_register_driver(&slic_driver);
3205 }
3206
3207 static void __exit slic_module_cleanup(void)
3208 {
3209 pci_unregister_driver(&slic_driver);
3210 }
3211
3212 static struct ethtool_ops slic_ethtool_ops = {
3213 .get_coalesce = slic_get_coalesce,
3214 .set_coalesce = slic_set_coalesce
3215 };
3216
3217 module_init(slic_module_init);
3218 module_exit(slic_module_cleanup);
CRIS linux kernel tree