drivers/clk/sunxi-ng/ccu_nm.c

   1 /*
   2  * Copyright (C) 2016 Maxime Ripard
   3  * Maxime Ripard <maxime.ripard@free-electrons.com>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of
   8  * the License, or (at your option) any later version.
   9  */
  10
  11 #include <linux/clk-provider.h>
  12
  13 #include "ccu_frac.h"
  14 #include "ccu_gate.h"
  15 #include "ccu_nm.h"
  16
  17 struct _ccu_nm {
  18         unsigned long   n, min_n, max_n;
  19         unsigned long   m, min_m, max_m;
  20 };
  21
  22 static void ccu_nm_find_best(unsigned long parent, unsigned long rate,
  23                              struct _ccu_nm *nm)
  24 {
  25         unsigned long best_rate = 0;
  26         unsigned long best_n = 0, best_m = 0;
  27         unsigned long _n, _m;
  28
  29         for (_n = nm->min_n; _n <= nm->max_n; _n++) {
  30                 for (_m = nm->min_m; _m <= nm->max_m; _m++) {
  31                         unsigned long tmp_rate = parent * _n  / _m;
  32
  33                         if (tmp_rate > rate)
  34                                 continue;
  35
  36                         if ((rate - tmp_rate) < (rate - best_rate)) {
  37                                 best_rate = tmp_rate;
  38                                 best_n = _n;
  39                                 best_m = _m;
  40                         }
  41                 }
  42         }
  43
  44         nm->n = best_n;
  45         nm->m = best_m;
  46 }
  47
  48 static void ccu_nm_disable(struct clk_hw *hw)
  49 {
  50         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  51
  52         return ccu_gate_helper_disable(&nm->common, nm->enable);
  53 }
  54
  55 static int ccu_nm_enable(struct clk_hw *hw)
  56 {
  57         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  58
  59         return ccu_gate_helper_enable(&nm->common, nm->enable);
  60 }
  61
  62 static int ccu_nm_is_enabled(struct clk_hw *hw)
  63 {
  64         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  65
  66         return ccu_gate_helper_is_enabled(&nm->common, nm->enable);
  67 }
  68
  69 static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
  70                                         unsigned long parent_rate)
  71 {
  72         struct ccu_nm *nm = hw_to_ccu_nm(hw);
  73         unsigned long rate;
  74         unsigned long n, m;
  75         u32 reg;
  76
  77         if (ccu_frac_helper_is_enabled(&nm->common, &nm->frac)) {
  78                 rate = ccu_frac_helper_read_rate(&nm->common, &nm->frac);
  79
  80                 if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
  81                         rate /= nm->fixed_post_div;
  82
  83                 return rate;
  84         }
  85
  86         reg = readl(nm->common.base + nm->common.reg);
  87
  88         n = reg >> nm->n.shift;
  89         n &= (1 << nm->n.width) - 1;
  90         n += nm->n.offset;
  91         if (!n)
  92                 n++;
  93
  94         m = reg >> nm->m.shift;
  95         m &= (1 << nm->m.width) - 1;
  96         m += nm->m.offset;
  97         if (!m)
  98                 m++;
  99
 100         if (ccu_sdm_helper_is_enabled(&nm->common, &nm->sdm))
 101                 rate = ccu_sdm_helper_read_rate(&nm->common, &nm->sdm, m, n);
 102         else
 103                 rate = parent_rate * n / m;
 104
 105         if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 106                 rate /= nm->fixed_post_div;
 107
 108         return rate;
 109 }
 110
 111 static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
 112                               unsigned long *parent_rate)
 113 {
 114         struct ccu_nm *nm = hw_to_ccu_nm(hw);
 115         struct _ccu_nm _nm;
 116
 117         if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 118                 rate *= nm->fixed_post_div;
 119
 120         if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
 121                 if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 122                         rate /= nm->fixed_post_div;
 123                 return rate;
 124         }
 125
 126         if (ccu_sdm_helper_has_rate(&nm->common, &nm->sdm, rate)) {
 127                 if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 128                         rate /= nm->fixed_post_div;
 129                 return rate;
 130         }
 131
 132         _nm.min_n = nm->n.min ?: 1;
 133         _nm.max_n = nm->n.max ?: 1 << nm->n.width;
 134         _nm.min_m = 1;
 135         _nm.max_m = nm->m.max ?: 1 << nm->m.width;
 136
 137         ccu_nm_find_best(*parent_rate, rate, &_nm);
 138         rate = *parent_rate * _nm.n / _nm.m;
 139
 140         if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 141                 rate /= nm->fixed_post_div;
 142
 143         return rate;
 144 }
 145
 146 static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
 147                            unsigned long parent_rate)
 148 {
 149         struct ccu_nm *nm = hw_to_ccu_nm(hw);
 150         struct _ccu_nm _nm;
 151         unsigned long flags;
 152         u32 reg;
 153
 154         /* Adjust target rate according to post-dividers */
 155         if (nm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 156                 rate = rate * nm->fixed_post_div;
 157
 158         if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) {
 159                 spin_lock_irqsave(nm->common.lock, flags);
 160
 161                 /* most SoCs require M to be 0 if fractional mode is used */
 162                 reg = readl(nm->common.base + nm->common.reg);
 163                 reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
 164                 writel(reg, nm->common.base + nm->common.reg);
 165
 166                 spin_unlock_irqrestore(nm->common.lock, flags);
 167
 168                 ccu_frac_helper_enable(&nm->common, &nm->frac);
 169
 170                 return ccu_frac_helper_set_rate(&nm->common, &nm->frac,
 171                                                 rate, nm->lock);
 172         } else {
 173                 ccu_frac_helper_disable(&nm->common, &nm->frac);
 174         }
 175
 176         _nm.min_n = nm->n.min ?: 1;
 177         _nm.max_n = nm->n.max ?: 1 << nm->n.width;
 178         _nm.min_m = 1;
 179         _nm.max_m = nm->m.max ?: 1 << nm->m.width;
 180
 181         if (ccu_sdm_helper_has_rate(&nm->common, &nm->sdm, rate)) {
 182                 ccu_sdm_helper_enable(&nm->common, &nm->sdm, rate);
 183
 184                 /* Sigma delta modulation requires specific N and M factors */
 185                 ccu_sdm_helper_get_factors(&nm->common, &nm->sdm, rate,
 186                                            &_nm.m, &_nm.n);
 187         } else {
 188                 ccu_sdm_helper_disable(&nm->common, &nm->sdm);
 189                 ccu_nm_find_best(parent_rate, rate, &_nm);
 190         }
 191
 192         spin_lock_irqsave(nm->common.lock, flags);
 193
 194         reg = readl(nm->common.base + nm->common.reg);
 195         reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);
 196         reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
 197
 198         reg |= (_nm.n - nm->n.offset) << nm->n.shift;
 199         reg |= (_nm.m - nm->m.offset) << nm->m.shift;
 200         writel(reg, nm->common.base + nm->common.reg);
 201
 202         spin_unlock_irqrestore(nm->common.lock, flags);
 203
 204         ccu_helper_wait_for_lock(&nm->common, nm->lock);
 205
 206         return 0;
 207 }
 208
 209 const struct clk_ops ccu_nm_ops = {
 210         .disable        = ccu_nm_disable,
 211         .enable         = ccu_nm_enable,
 212         .is_enabled     = ccu_nm_is_enabled,
 213
 214         .recalc_rate    = ccu_nm_recalc_rate,
 215         .round_rate     = ccu_nm_round_rate,
 216         .set_rate       = ccu_nm_set_rate,
 217 };