2 * Copyright(c) 2017 Intel Corporation.
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
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32 * from this software without specific prior written permission.
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49 * This file contains HFI1 support for VNIC SDMA functionality
55 #define HFI1_VNIC_SDMA_Q_ACTIVE BIT(0)
56 #define HFI1_VNIC_SDMA_Q_DEFERRED BIT(1)
58 #define HFI1_VNIC_TXREQ_NAME_LEN 32
59 #define HFI1_VNIC_SDMA_DESC_WTRMRK 64
60 #define HFI1_VNIC_SDMA_RETRY_COUNT 1
63 * struct vnic_txreq - VNIC transmit descriptor
64 * @txreq: sdma transmit request
65 * @sdma: vnic sdma pointer
70 * @retry_count: tx retry count
73 struct sdma_txreq txreq
;
74 struct hfi1_vnic_sdma
*sdma
;
77 unsigned char pad
[HFI1_VNIC_MAX_PAD
];
84 static void vnic_sdma_complete(struct sdma_txreq
*txreq
,
87 struct vnic_txreq
*tx
= container_of(txreq
, struct vnic_txreq
, txreq
);
88 struct hfi1_vnic_sdma
*vnic_sdma
= tx
->sdma
;
90 sdma_txclean(vnic_sdma
->dd
, txreq
);
91 dev_kfree_skb_any(tx
->skb
);
92 kmem_cache_free(vnic_sdma
->dd
->vnic
.txreq_cache
, tx
);
95 static noinline
int build_vnic_ulp_payload(struct sdma_engine
*sde
,
96 struct vnic_txreq
*tx
)
100 ret
= sdma_txadd_kvaddr(
104 skb_headlen(tx
->skb
));
108 for (i
= 0; i
< skb_shinfo(tx
->skb
)->nr_frags
; i
++) {
109 struct skb_frag_struct
*frag
= &skb_shinfo(tx
->skb
)->frags
[i
];
111 /* combine physically continuous fragments later? */
112 ret
= sdma_txadd_page(sde
->dd
,
116 skb_frag_size(frag
));
122 ret
= sdma_txadd_kvaddr(sde
->dd
, &tx
->txreq
,
123 tx
->pad
+ HFI1_VNIC_MAX_PAD
- tx
->plen
,
130 static int build_vnic_tx_desc(struct sdma_engine
*sde
,
131 struct vnic_txreq
*tx
,
135 u16 hdrbytes
= 2 << 2; /* PBC */
137 ret
= sdma_txinit_ahg(
140 hdrbytes
+ tx
->skb
->len
+ tx
->plen
,
150 tx
->pbc_val
= cpu_to_le64(pbc
);
151 ret
= sdma_txadd_kvaddr(
159 /* add the ulp payload */
160 ret
= build_vnic_ulp_payload(sde
, tx
);
165 /* setup the last plen bypes of pad */
166 static inline void hfi1_vnic_update_pad(unsigned char *pad
, u8 plen
)
168 pad
[HFI1_VNIC_MAX_PAD
- 1] = plen
- OPA_VNIC_ICRC_TAIL_LEN
;
171 int hfi1_vnic_send_dma(struct hfi1_devdata
*dd
, u8 q_idx
,
172 struct hfi1_vnic_vport_info
*vinfo
,
173 struct sk_buff
*skb
, u64 pbc
, u8 plen
)
175 struct hfi1_vnic_sdma
*vnic_sdma
= &vinfo
->sdma
[q_idx
];
176 struct sdma_engine
*sde
= vnic_sdma
->sde
;
177 struct vnic_txreq
*tx
;
180 if (unlikely(READ_ONCE(vnic_sdma
->state
) != HFI1_VNIC_SDMA_Q_ACTIVE
))
183 if (unlikely(!sde
|| !sdma_running(sde
)))
186 tx
= kmem_cache_alloc(dd
->vnic
.txreq_cache
, GFP_ATOMIC
);
192 tx
->sdma
= vnic_sdma
;
194 hfi1_vnic_update_pad(tx
->pad
, plen
);
196 ret
= build_vnic_tx_desc(sde
, tx
, pbc
);
201 ret
= sdma_send_txreq(sde
, &vnic_sdma
->wait
, &tx
->txreq
,
202 vnic_sdma
->pkts_sent
);
203 /* When -ECOMM, sdma callback will be called with ABORT status */
204 if (unlikely(ret
&& unlikely(ret
!= -ECOMM
)))
208 vnic_sdma
->pkts_sent
= true;
209 iowait_starve_clear(vnic_sdma
->pkts_sent
, &vnic_sdma
->wait
);
214 sdma_txclean(dd
, &tx
->txreq
);
215 kmem_cache_free(dd
->vnic
.txreq_cache
, tx
);
218 dev_kfree_skb_any(skb
);
220 vnic_sdma
->pkts_sent
= false;
225 * hfi1_vnic_sdma_sleep - vnic sdma sleep function
227 * This function gets called from sdma_send_txreq() when there are not enough
228 * sdma descriptors available to send the packet. It adds Tx queue's wait
229 * structure to sdma engine's dmawait list to be woken up when descriptors
232 static int hfi1_vnic_sdma_sleep(struct sdma_engine
*sde
,
234 struct sdma_txreq
*txreq
,
238 struct hfi1_vnic_sdma
*vnic_sdma
=
239 container_of(wait
, struct hfi1_vnic_sdma
, wait
);
240 struct hfi1_ibdev
*dev
= &vnic_sdma
->dd
->verbs_dev
;
241 struct vnic_txreq
*tx
= container_of(txreq
, struct vnic_txreq
, txreq
);
243 if (sdma_progress(sde
, seq
, txreq
))
244 if (tx
->retry_count
++ < HFI1_VNIC_SDMA_RETRY_COUNT
)
247 vnic_sdma
->state
= HFI1_VNIC_SDMA_Q_DEFERRED
;
248 write_seqlock(&dev
->iowait_lock
);
249 if (list_empty(&vnic_sdma
->wait
.list
))
250 iowait_queue(pkts_sent
, wait
, &sde
->dmawait
);
251 write_sequnlock(&dev
->iowait_lock
);
256 * hfi1_vnic_sdma_wakeup - vnic sdma wakeup function
258 * This function gets called when SDMA descriptors becomes available and Tx
259 * queue's wait structure was previously added to sdma engine's dmawait list.
260 * It notifies the upper driver about Tx queue wakeup.
262 static void hfi1_vnic_sdma_wakeup(struct iowait
*wait
, int reason
)
264 struct hfi1_vnic_sdma
*vnic_sdma
=
265 container_of(wait
, struct hfi1_vnic_sdma
, wait
);
266 struct hfi1_vnic_vport_info
*vinfo
= vnic_sdma
->vinfo
;
268 vnic_sdma
->state
= HFI1_VNIC_SDMA_Q_ACTIVE
;
269 if (__netif_subqueue_stopped(vinfo
->netdev
, vnic_sdma
->q_idx
))
270 netif_wake_subqueue(vinfo
->netdev
, vnic_sdma
->q_idx
);
273 inline bool hfi1_vnic_sdma_write_avail(struct hfi1_vnic_vport_info
*vinfo
,
276 struct hfi1_vnic_sdma
*vnic_sdma
= &vinfo
->sdma
[q_idx
];
278 return (READ_ONCE(vnic_sdma
->state
) == HFI1_VNIC_SDMA_Q_ACTIVE
);
281 void hfi1_vnic_sdma_init(struct hfi1_vnic_vport_info
*vinfo
)
285 for (i
= 0; i
< vinfo
->num_tx_q
; i
++) {
286 struct hfi1_vnic_sdma
*vnic_sdma
= &vinfo
->sdma
[i
];
288 iowait_init(&vnic_sdma
->wait
, 0, NULL
, hfi1_vnic_sdma_sleep
,
289 hfi1_vnic_sdma_wakeup
, NULL
);
290 vnic_sdma
->sde
= &vinfo
->dd
->per_sdma
[i
];
291 vnic_sdma
->dd
= vinfo
->dd
;
292 vnic_sdma
->vinfo
= vinfo
;
293 vnic_sdma
->q_idx
= i
;
294 vnic_sdma
->state
= HFI1_VNIC_SDMA_Q_ACTIVE
;
296 /* Add a free descriptor watermark for wakeups */
297 if (vnic_sdma
->sde
->descq_cnt
> HFI1_VNIC_SDMA_DESC_WTRMRK
) {
298 INIT_LIST_HEAD(&vnic_sdma
->stx
.list
);
299 vnic_sdma
->stx
.num_desc
= HFI1_VNIC_SDMA_DESC_WTRMRK
;
300 list_add_tail(&vnic_sdma
->stx
.list
,
301 &vnic_sdma
->wait
.tx_head
);
306 int hfi1_vnic_txreq_init(struct hfi1_devdata
*dd
)
308 char buf
[HFI1_VNIC_TXREQ_NAME_LEN
];
310 snprintf(buf
, sizeof(buf
), "hfi1_%u_vnic_txreq_cache", dd
->unit
);
311 dd
->vnic
.txreq_cache
= kmem_cache_create(buf
,
312 sizeof(struct vnic_txreq
),
313 0, SLAB_HWCACHE_ALIGN
,
315 if (!dd
->vnic
.txreq_cache
)
320 void hfi1_vnic_txreq_deinit(struct hfi1_devdata
*dd
)
322 kmem_cache_destroy(dd
->vnic
.txreq_cache
);
323 dd
->vnic
.txreq_cache
= NULL
;