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x86/topology: Update the 'cpu cores' field in /proc/cpuinfo correctly across CPU...
[cris-mirror.git] / drivers / infiniband / hw / mlx5 / mad.c
blob32a9e9228b13554c2d1d5db057a5a484efc4f2bf
1 /*
2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/mlx5/cmd.h>
34 #include <linux/mlx5/vport.h>
35 #include <rdma/ib_mad.h>
36 #include <rdma/ib_smi.h>
37 #include <rdma/ib_pma.h>
38 #include "mlx5_ib.h"
39
40 enum {
41 MLX5_IB_VENDOR_CLASS1 = 0x9,
42 MLX5_IB_VENDOR_CLASS2 = 0xa
43 };
44
45 static bool can_do_mad_ifc(struct mlx5_ib_dev *dev, u8 port_num,
46 struct ib_mad *in_mad)
47 {
48 if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED &&
49 in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
50 return true;
51 return dev->mdev->port_caps[port_num - 1].has_smi;
52 }
53
54 int mlx5_MAD_IFC(struct mlx5_ib_dev *dev, int ignore_mkey, int ignore_bkey,
55 u8 port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
56 const void *in_mad, void *response_mad)
57 {
58 u8 op_modifier = 0;
59
60 if (!can_do_mad_ifc(dev, port, (struct ib_mad *)in_mad))
61 return -EPERM;
62
63 /* Key check traps can't be generated unless we have in_wc to
64 * tell us where to send the trap.
65 */
66 if (ignore_mkey || !in_wc)
67 op_modifier |= 0x1;
68 if (ignore_bkey || !in_wc)
69 op_modifier |= 0x2;
70
71 return mlx5_core_mad_ifc(dev->mdev, in_mad, response_mad, op_modifier, port);
72 }
73
74 static int process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
75 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
76 const struct ib_mad *in_mad, struct ib_mad *out_mad)
77 {
78 u16 slid;
79 int err;
80
81 slid = in_wc ? ib_lid_cpu16(in_wc->slid) : be16_to_cpu(IB_LID_PERMISSIVE);
82
83 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0)
84 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
85
86 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
87 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
88 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
89 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
90 in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
91 return IB_MAD_RESULT_SUCCESS;
92
93 /* Don't process SMInfo queries -- the SMA can't handle them.
94 */
95 if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
96 return IB_MAD_RESULT_SUCCESS;
97 } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
98 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS1 ||
99 in_mad->mad_hdr.mgmt_class == MLX5_IB_VENDOR_CLASS2 ||
100 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
101 if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
102 in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
103 return IB_MAD_RESULT_SUCCESS;
104 } else {
105 return IB_MAD_RESULT_SUCCESS;
106 }
107
108 err = mlx5_MAD_IFC(to_mdev(ibdev),
109 mad_flags & IB_MAD_IGNORE_MKEY,
110 mad_flags & IB_MAD_IGNORE_BKEY,
111 port_num, in_wc, in_grh, in_mad, out_mad);
112 if (err)
113 return IB_MAD_RESULT_FAILURE;
114
115 /* set return bit in status of directed route responses */
116 if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
117 out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
118
119 if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
120 /* no response for trap repress */
121 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
122
123 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
124 }
125
126 static void pma_cnt_ext_assign(struct ib_pma_portcounters_ext *pma_cnt_ext,
127 void *out)
128 {
129 #define MLX5_SUM_CNT(p, cntr1, cntr2) \
130 (MLX5_GET64(query_vport_counter_out, p, cntr1) + \
131 MLX5_GET64(query_vport_counter_out, p, cntr2))
132
133 pma_cnt_ext->port_xmit_data =
134 cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.octets,
135 transmitted_ib_multicast.octets) >> 2);
136 pma_cnt_ext->port_rcv_data =
137 cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.octets,
138 received_ib_multicast.octets) >> 2);
139 pma_cnt_ext->port_xmit_packets =
140 cpu_to_be64(MLX5_SUM_CNT(out, transmitted_ib_unicast.packets,
141 transmitted_ib_multicast.packets));
142 pma_cnt_ext->port_rcv_packets =
143 cpu_to_be64(MLX5_SUM_CNT(out, received_ib_unicast.packets,
144 received_ib_multicast.packets));
145 pma_cnt_ext->port_unicast_xmit_packets =
146 MLX5_GET64_BE(query_vport_counter_out,
147 out, transmitted_ib_unicast.packets);
148 pma_cnt_ext->port_unicast_rcv_packets =
149 MLX5_GET64_BE(query_vport_counter_out,
150 out, received_ib_unicast.packets);
151 pma_cnt_ext->port_multicast_xmit_packets =
152 MLX5_GET64_BE(query_vport_counter_out,
153 out, transmitted_ib_multicast.packets);
154 pma_cnt_ext->port_multicast_rcv_packets =
155 MLX5_GET64_BE(query_vport_counter_out,
156 out, received_ib_multicast.packets);
157 }
158
159 static void pma_cnt_assign(struct ib_pma_portcounters *pma_cnt,
160 void *out)
161 {
162 /* Traffic counters will be reported in
163 * their 64bit form via ib_pma_portcounters_ext by default.
164 */
165 void *out_pma = MLX5_ADDR_OF(ppcnt_reg, out,
166 counter_set);
167
168 #define MLX5_ASSIGN_PMA_CNTR(counter_var, counter_name) { \
169 counter_var = MLX5_GET_BE(typeof(counter_var), \
170 ib_port_cntrs_grp_data_layout, \
171 out_pma, counter_name); \
172 }
173
174 MLX5_ASSIGN_PMA_CNTR(pma_cnt->symbol_error_counter,
175 symbol_error_counter);
176 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_error_recovery_counter,
177 link_error_recovery_counter);
178 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_downed_counter,
179 link_downed_counter);
180 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_errors,
181 port_rcv_errors);
182 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_remphys_errors,
183 port_rcv_remote_physical_errors);
184 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_switch_relay_errors,
185 port_rcv_switch_relay_errors);
186 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_discards,
187 port_xmit_discards);
188 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_constraint_errors,
189 port_xmit_constraint_errors);
190 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_xmit_wait,
191 port_xmit_wait);
192 MLX5_ASSIGN_PMA_CNTR(pma_cnt->port_rcv_constraint_errors,
193 port_rcv_constraint_errors);
194 MLX5_ASSIGN_PMA_CNTR(pma_cnt->link_overrun_errors,
195 link_overrun_errors);
196 MLX5_ASSIGN_PMA_CNTR(pma_cnt->vl15_dropped,
197 vl_15_dropped);
198 }
199
200 static int process_pma_cmd(struct mlx5_core_dev *mdev, u8 port_num,
201 const struct ib_mad *in_mad, struct ib_mad *out_mad)
202 {
203 int err;
204 void *out_cnt;
205
206 /* Declaring support of extended counters */
207 if (in_mad->mad_hdr.attr_id == IB_PMA_CLASS_PORT_INFO) {
208 struct ib_class_port_info cpi = {};
209
210 cpi.capability_mask = IB_PMA_CLASS_CAP_EXT_WIDTH;
211 memcpy((out_mad->data + 40), &cpi, sizeof(cpi));
212 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
213 }
214
215 if (in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS_EXT) {
216 struct ib_pma_portcounters_ext *pma_cnt_ext =
217 (struct ib_pma_portcounters_ext *)(out_mad->data + 40);
218 int sz = MLX5_ST_SZ_BYTES(query_vport_counter_out);
219
220 out_cnt = kvzalloc(sz, GFP_KERNEL);
221 if (!out_cnt)
222 return IB_MAD_RESULT_FAILURE;
223
224 err = mlx5_core_query_vport_counter(mdev, 0, 0,
225 port_num, out_cnt, sz);
226 if (!err)
227 pma_cnt_ext_assign(pma_cnt_ext, out_cnt);
228 } else {
229 struct ib_pma_portcounters *pma_cnt =
230 (struct ib_pma_portcounters *)(out_mad->data + 40);
231 int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
232
233 out_cnt = kvzalloc(sz, GFP_KERNEL);
234 if (!out_cnt)
235 return IB_MAD_RESULT_FAILURE;
236
237 err = mlx5_core_query_ib_ppcnt(mdev, port_num,
238 out_cnt, sz);
239 if (!err)
240 pma_cnt_assign(pma_cnt, out_cnt);
241 }
242
243 kvfree(out_cnt);
244 if (err)
245 return IB_MAD_RESULT_FAILURE;
246
247 return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
248 }
249
250 int mlx5_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
251 const struct ib_wc *in_wc, const struct ib_grh *in_grh,
252 const struct ib_mad_hdr *in, size_t in_mad_size,
253 struct ib_mad_hdr *out, size_t *out_mad_size,
254 u16 *out_mad_pkey_index)
255 {
256 struct mlx5_ib_dev *dev = to_mdev(ibdev);
257 const struct ib_mad *in_mad = (const struct ib_mad *)in;
258 struct ib_mad *out_mad = (struct ib_mad *)out;
259 struct mlx5_core_dev *mdev;
260 u8 mdev_port_num;
261 int ret;
262
263 if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
264 *out_mad_size != sizeof(*out_mad)))
265 return IB_MAD_RESULT_FAILURE;
266
267 memset(out_mad->data, 0, sizeof(out_mad->data));
268
269 mdev = mlx5_ib_get_native_port_mdev(dev, port_num, &mdev_port_num);
270 if (!mdev)
271 return IB_MAD_RESULT_FAILURE;
272
273 if (MLX5_CAP_GEN(mdev, vport_counters) &&
274 in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
275 in_mad->mad_hdr.method == IB_MGMT_METHOD_GET) {
276 ret = process_pma_cmd(mdev, mdev_port_num, in_mad, out_mad);
277 } else {
278 ret = process_mad(ibdev, mad_flags, port_num, in_wc, in_grh,
279 in_mad, out_mad);
280 }
281 mlx5_ib_put_native_port_mdev(dev, port_num);
282 return ret;
283 }
284
285 int mlx5_query_ext_port_caps(struct mlx5_ib_dev *dev, u8 port)
286 {
287 struct ib_smp *in_mad = NULL;
288 struct ib_smp *out_mad = NULL;
289 int err = -ENOMEM;
290 u16 packet_error;
291
292 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
293 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
294 if (!in_mad || !out_mad)
295 goto out;
296
297 init_query_mad(in_mad);
298 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
299 in_mad->attr_mod = cpu_to_be32(port);
300
301 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
302
303 packet_error = be16_to_cpu(out_mad->status);
304
305 dev->mdev->port_caps[port - 1].ext_port_cap = (!err && !packet_error) ?
306 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO : 0;
307
308 out:
309 kfree(in_mad);
310 kfree(out_mad);
311 return err;
312 }
313
314 int mlx5_query_mad_ifc_smp_attr_node_info(struct ib_device *ibdev,
315 struct ib_smp *out_mad)
316 {
317 struct ib_smp *in_mad = NULL;
318 int err = -ENOMEM;
319
320 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
321 if (!in_mad)
322 return -ENOMEM;
323
324 init_query_mad(in_mad);
325 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
326
327 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad,
328 out_mad);
329
330 kfree(in_mad);
331 return err;
332 }
333
334 int mlx5_query_mad_ifc_system_image_guid(struct ib_device *ibdev,
335 __be64 *sys_image_guid)
336 {
337 struct ib_smp *out_mad = NULL;
338 int err = -ENOMEM;
339
340 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
341 if (!out_mad)
342 return -ENOMEM;
343
344 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
345 if (err)
346 goto out;
347
348 memcpy(sys_image_guid, out_mad->data + 4, 8);
349
350 out:
351 kfree(out_mad);
352
353 return err;
354 }
355
356 int mlx5_query_mad_ifc_max_pkeys(struct ib_device *ibdev,
357 u16 *max_pkeys)
358 {
359 struct ib_smp *out_mad = NULL;
360 int err = -ENOMEM;
361
362 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
363 if (!out_mad)
364 return -ENOMEM;
365
366 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
367 if (err)
368 goto out;
369
370 *max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
371
372 out:
373 kfree(out_mad);
374
375 return err;
376 }
377
378 int mlx5_query_mad_ifc_vendor_id(struct ib_device *ibdev,
379 u32 *vendor_id)
380 {
381 struct ib_smp *out_mad = NULL;
382 int err = -ENOMEM;
383
384 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
385 if (!out_mad)
386 return -ENOMEM;
387
388 err = mlx5_query_mad_ifc_smp_attr_node_info(ibdev, out_mad);
389 if (err)
390 goto out;
391
392 *vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 0xffff;
393
394 out:
395 kfree(out_mad);
396
397 return err;
398 }
399
400 int mlx5_query_mad_ifc_node_desc(struct mlx5_ib_dev *dev, char *node_desc)
401 {
402 struct ib_smp *in_mad = NULL;
403 struct ib_smp *out_mad = NULL;
404 int err = -ENOMEM;
405
406 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
407 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
408 if (!in_mad || !out_mad)
409 goto out;
410
411 init_query_mad(in_mad);
412 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
413
414 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
415 if (err)
416 goto out;
417
418 memcpy(node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
419 out:
420 kfree(in_mad);
421 kfree(out_mad);
422 return err;
423 }
424
425 int mlx5_query_mad_ifc_node_guid(struct mlx5_ib_dev *dev, __be64 *node_guid)
426 {
427 struct ib_smp *in_mad = NULL;
428 struct ib_smp *out_mad = NULL;
429 int err = -ENOMEM;
430
431 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
432 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
433 if (!in_mad || !out_mad)
434 goto out;
435
436 init_query_mad(in_mad);
437 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
438
439 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
440 if (err)
441 goto out;
442
443 memcpy(node_guid, out_mad->data + 12, 8);
444 out:
445 kfree(in_mad);
446 kfree(out_mad);
447 return err;
448 }
449
450 int mlx5_query_mad_ifc_pkey(struct ib_device *ibdev, u8 port, u16 index,
451 u16 *pkey)
452 {
453 struct ib_smp *in_mad = NULL;
454 struct ib_smp *out_mad = NULL;
455 int err = -ENOMEM;
456
457 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
458 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
459 if (!in_mad || !out_mad)
460 goto out;
461
462 init_query_mad(in_mad);
463 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
464 in_mad->attr_mod = cpu_to_be32(index / 32);
465
466 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
467 out_mad);
468 if (err)
469 goto out;
470
471 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
472
473 out:
474 kfree(in_mad);
475 kfree(out_mad);
476 return err;
477 }
478
479 int mlx5_query_mad_ifc_gids(struct ib_device *ibdev, u8 port, int index,
480 union ib_gid *gid)
481 {
482 struct ib_smp *in_mad = NULL;
483 struct ib_smp *out_mad = NULL;
484 int err = -ENOMEM;
485
486 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
487 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
488 if (!in_mad || !out_mad)
489 goto out;
490
491 init_query_mad(in_mad);
492 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
493 in_mad->attr_mod = cpu_to_be32(port);
494
495 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
496 out_mad);
497 if (err)
498 goto out;
499
500 memcpy(gid->raw, out_mad->data + 8, 8);
501
502 init_query_mad(in_mad);
503 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
504 in_mad->attr_mod = cpu_to_be32(index / 8);
505
506 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad,
507 out_mad);
508 if (err)
509 goto out;
510
511 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
512
513 out:
514 kfree(in_mad);
515 kfree(out_mad);
516 return err;
517 }
518
519 int mlx5_query_mad_ifc_port(struct ib_device *ibdev, u8 port,
520 struct ib_port_attr *props)
521 {
522 struct mlx5_ib_dev *dev = to_mdev(ibdev);
523 struct mlx5_core_dev *mdev = dev->mdev;
524 struct ib_smp *in_mad = NULL;
525 struct ib_smp *out_mad = NULL;
526 int ext_active_speed;
527 int err = -ENOMEM;
528
529 if (port < 1 || port > dev->num_ports) {
530 mlx5_ib_warn(dev, "invalid port number %d\n", port);
531 return -EINVAL;
532 }
533
534 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
535 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
536 if (!in_mad || !out_mad)
537 goto out;
538
539 /* props being zeroed by the caller, avoid zeroing it here */
540
541 init_query_mad(in_mad);
542 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
543 in_mad->attr_mod = cpu_to_be32(port);
544
545 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
546 if (err) {
547 mlx5_ib_warn(dev, "err %d\n", err);
548 goto out;
549 }
550
551 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
552 props->lmc = out_mad->data[34] & 0x7;
553 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
554 props->sm_sl = out_mad->data[36] & 0xf;
555 props->state = out_mad->data[32] & 0xf;
556 props->phys_state = out_mad->data[33] >> 4;
557 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
558 props->gid_tbl_len = out_mad->data[50];
559 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg);
560 props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len;
561 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
562 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
563 props->active_width = out_mad->data[31] & 0xf;
564 props->active_speed = out_mad->data[35] >> 4;
565 props->max_mtu = out_mad->data[41] & 0xf;
566 props->active_mtu = out_mad->data[36] >> 4;
567 props->subnet_timeout = out_mad->data[51] & 0x1f;
568 props->max_vl_num = out_mad->data[37] >> 4;
569 props->init_type_reply = out_mad->data[41] >> 4;
570
571 /* Check if extended speeds (EDR/FDR/...) are supported */
572 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
573 ext_active_speed = out_mad->data[62] >> 4;
574
575 switch (ext_active_speed) {
576 case 1:
577 props->active_speed = 16; /* FDR */
578 break;
579 case 2:
580 props->active_speed = 32; /* EDR */
581 break;
582 }
583 }
584
585 /* If reported active speed is QDR, check if is FDR-10 */
586 if (props->active_speed == 4) {
587 if (mdev->port_caps[port - 1].ext_port_cap &
588 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
589 init_query_mad(in_mad);
590 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
591 in_mad->attr_mod = cpu_to_be32(port);
592
593 err = mlx5_MAD_IFC(dev, 1, 1, port,
594 NULL, NULL, in_mad, out_mad);
595 if (err)
596 goto out;
597
598 /* Checking LinkSpeedActive for FDR-10 */
599 if (out_mad->data[15] & 0x1)
600 props->active_speed = 8;
601 }
602 }
603
604 out:
605 kfree(in_mad);
606 kfree(out_mad);
607
608 return err;
609 }
CRIS linux kernel tree