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signal/powerpc: Remove unnecessary signal_code parameter of do_send_trap
[cris-mirror.git] / arch / powerpc / kernel / cputable.c
blob1350f49d81a847a318a619968682d92daec01d43
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18 #include <linux/jump_label.h>
19
20 #include <asm/oprofile_impl.h>
21 #include <asm/cputable.h>
22 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
23 #include <asm/mmu.h>
24 #include <asm/setup.h>
25
26 static struct cpu_spec the_cpu_spec __read_mostly;
27
28 struct cpu_spec* cur_cpu_spec __read_mostly = NULL;
29 EXPORT_SYMBOL(cur_cpu_spec);
30
31 /* The platform string corresponding to the real PVR */
32 const char *powerpc_base_platform;
33
34 /* NOTE:
35 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
36 * the responsibility of the appropriate CPU save/restore functions to
37 * eventually copy these settings over. Those save/restore aren't yet
38 * part of the cputable though. That has to be fixed for both ppc32
39 * and ppc64
40 */
41 #ifdef CONFIG_PPC32
42 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
51 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
52 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
55 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
56 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
60 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
61 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
62 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
63 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
64 #endif /* CONFIG_PPC32 */
65 #ifdef CONFIG_PPC64
66 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
67 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
68 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
69 extern void __restore_cpu_pa6t(void);
70 extern void __restore_cpu_ppc970(void);
71 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_power7(void);
73 extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
74 extern void __restore_cpu_power8(void);
75 extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec);
76 extern void __restore_cpu_power9(void);
77 extern void __flush_tlb_power7(unsigned int action);
78 extern void __flush_tlb_power8(unsigned int action);
79 extern void __flush_tlb_power9(unsigned int action);
80 extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
81 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
82 extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
83 #endif /* CONFIG_PPC64 */
84 #if defined(CONFIG_E500)
85 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
86 extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
87 extern void __restore_cpu_e5500(void);
88 extern void __restore_cpu_e6500(void);
89 #endif /* CONFIG_E500 */
90
91 /* This table only contains "desktop" CPUs, it need to be filled with embedded
92 * ones as well...
93 */
94 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
95 PPC_FEATURE_HAS_MMU)
96 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
97 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
98 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
100 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
101 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
102 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
103 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
104 PPC_FEATURE_TRUE_LE | \
105 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
106 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
108 PPC_FEATURE_TRUE_LE | \
109 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
110 #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
111 #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
112 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
113 PPC_FEATURE_TRUE_LE | \
114 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
115 #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
116 PPC_FEATURE2_HTM_COMP | \
117 PPC_FEATURE2_HTM_NOSC_COMP | \
118 PPC_FEATURE2_DSCR | \
119 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
120 PPC_FEATURE2_VEC_CRYPTO)
121 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
122 PPC_FEATURE_TRUE_LE | \
123 PPC_FEATURE_HAS_ALTIVEC_COMP)
124 #define COMMON_USER_POWER9 COMMON_USER_POWER8
125 #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
126 PPC_FEATURE2_ARCH_3_00 | \
127 PPC_FEATURE2_HAS_IEEE128 | \
128 PPC_FEATURE2_DARN )
129
130 #ifdef CONFIG_PPC_BOOK3E_64
131 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
132 #else
133 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
134 PPC_FEATURE_BOOKE)
135 #endif
136
137 static struct cpu_spec __initdata cpu_specs[] = {
138 #ifdef CONFIG_PPC_BOOK3S_64
139 { /* Power4 */
140 .pvr_mask = 0xffff0000,
141 .pvr_value = 0x00350000,
142 .cpu_name = "POWER4 (gp)",
143 .cpu_features = CPU_FTRS_POWER4,
144 .cpu_user_features = COMMON_USER_POWER4,
145 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
146 .icache_bsize = 128,
147 .dcache_bsize = 128,
148 .num_pmcs = 8,
149 .pmc_type = PPC_PMC_IBM,
150 .oprofile_cpu_type = "ppc64/power4",
151 .oprofile_type = PPC_OPROFILE_POWER4,
152 .platform = "power4",
153 },
154 { /* Power4+ */
155 .pvr_mask = 0xffff0000,
156 .pvr_value = 0x00380000,
157 .cpu_name = "POWER4+ (gq)",
158 .cpu_features = CPU_FTRS_POWER4,
159 .cpu_user_features = COMMON_USER_POWER4,
160 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
161 .icache_bsize = 128,
162 .dcache_bsize = 128,
163 .num_pmcs = 8,
164 .pmc_type = PPC_PMC_IBM,
165 .oprofile_cpu_type = "ppc64/power4",
166 .oprofile_type = PPC_OPROFILE_POWER4,
167 .platform = "power4",
168 },
169 { /* PPC970 */
170 .pvr_mask = 0xffff0000,
171 .pvr_value = 0x00390000,
172 .cpu_name = "PPC970",
173 .cpu_features = CPU_FTRS_PPC970,
174 .cpu_user_features = COMMON_USER_POWER4 |
175 PPC_FEATURE_HAS_ALTIVEC_COMP,
176 .mmu_features = MMU_FTRS_PPC970,
177 .icache_bsize = 128,
178 .dcache_bsize = 128,
179 .num_pmcs = 8,
180 .pmc_type = PPC_PMC_IBM,
181 .cpu_setup = __setup_cpu_ppc970,
182 .cpu_restore = __restore_cpu_ppc970,
183 .oprofile_cpu_type = "ppc64/970",
184 .oprofile_type = PPC_OPROFILE_POWER4,
185 .platform = "ppc970",
186 },
187 { /* PPC970FX */
188 .pvr_mask = 0xffff0000,
189 .pvr_value = 0x003c0000,
190 .cpu_name = "PPC970FX",
191 .cpu_features = CPU_FTRS_PPC970,
192 .cpu_user_features = COMMON_USER_POWER4 |
193 PPC_FEATURE_HAS_ALTIVEC_COMP,
194 .mmu_features = MMU_FTRS_PPC970,
195 .icache_bsize = 128,
196 .dcache_bsize = 128,
197 .num_pmcs = 8,
198 .pmc_type = PPC_PMC_IBM,
199 .cpu_setup = __setup_cpu_ppc970,
200 .cpu_restore = __restore_cpu_ppc970,
201 .oprofile_cpu_type = "ppc64/970",
202 .oprofile_type = PPC_OPROFILE_POWER4,
203 .platform = "ppc970",
204 },
205 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
206 .pvr_mask = 0xffffffff,
207 .pvr_value = 0x00440100,
208 .cpu_name = "PPC970MP",
209 .cpu_features = CPU_FTRS_PPC970,
210 .cpu_user_features = COMMON_USER_POWER4 |
211 PPC_FEATURE_HAS_ALTIVEC_COMP,
212 .mmu_features = MMU_FTRS_PPC970,
213 .icache_bsize = 128,
214 .dcache_bsize = 128,
215 .num_pmcs = 8,
216 .pmc_type = PPC_PMC_IBM,
217 .cpu_setup = __setup_cpu_ppc970,
218 .cpu_restore = __restore_cpu_ppc970,
219 .oprofile_cpu_type = "ppc64/970MP",
220 .oprofile_type = PPC_OPROFILE_POWER4,
221 .platform = "ppc970",
222 },
223 { /* PPC970MP */
224 .pvr_mask = 0xffff0000,
225 .pvr_value = 0x00440000,
226 .cpu_name = "PPC970MP",
227 .cpu_features = CPU_FTRS_PPC970,
228 .cpu_user_features = COMMON_USER_POWER4 |
229 PPC_FEATURE_HAS_ALTIVEC_COMP,
230 .mmu_features = MMU_FTRS_PPC970,
231 .icache_bsize = 128,
232 .dcache_bsize = 128,
233 .num_pmcs = 8,
234 .pmc_type = PPC_PMC_IBM,
235 .cpu_setup = __setup_cpu_ppc970MP,
236 .cpu_restore = __restore_cpu_ppc970,
237 .oprofile_cpu_type = "ppc64/970MP",
238 .oprofile_type = PPC_OPROFILE_POWER4,
239 .platform = "ppc970",
240 },
241 { /* PPC970GX */
242 .pvr_mask = 0xffff0000,
243 .pvr_value = 0x00450000,
244 .cpu_name = "PPC970GX",
245 .cpu_features = CPU_FTRS_PPC970,
246 .cpu_user_features = COMMON_USER_POWER4 |
247 PPC_FEATURE_HAS_ALTIVEC_COMP,
248 .mmu_features = MMU_FTRS_PPC970,
249 .icache_bsize = 128,
250 .dcache_bsize = 128,
251 .num_pmcs = 8,
252 .pmc_type = PPC_PMC_IBM,
253 .cpu_setup = __setup_cpu_ppc970,
254 .oprofile_cpu_type = "ppc64/970",
255 .oprofile_type = PPC_OPROFILE_POWER4,
256 .platform = "ppc970",
257 },
258 { /* Power5 GR */
259 .pvr_mask = 0xffff0000,
260 .pvr_value = 0x003a0000,
261 .cpu_name = "POWER5 (gr)",
262 .cpu_features = CPU_FTRS_POWER5,
263 .cpu_user_features = COMMON_USER_POWER5,
264 .mmu_features = MMU_FTRS_POWER5,
265 .icache_bsize = 128,
266 .dcache_bsize = 128,
267 .num_pmcs = 6,
268 .pmc_type = PPC_PMC_IBM,
269 .oprofile_cpu_type = "ppc64/power5",
270 .oprofile_type = PPC_OPROFILE_POWER4,
271 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
272 * and above but only works on POWER5 and above
273 */
274 .oprofile_mmcra_sihv = MMCRA_SIHV,
275 .oprofile_mmcra_sipr = MMCRA_SIPR,
276 .platform = "power5",
277 },
278 { /* Power5++ */
279 .pvr_mask = 0xffffff00,
280 .pvr_value = 0x003b0300,
281 .cpu_name = "POWER5+ (gs)",
282 .cpu_features = CPU_FTRS_POWER5,
283 .cpu_user_features = COMMON_USER_POWER5_PLUS,
284 .mmu_features = MMU_FTRS_POWER5,
285 .icache_bsize = 128,
286 .dcache_bsize = 128,
287 .num_pmcs = 6,
288 .oprofile_cpu_type = "ppc64/power5++",
289 .oprofile_type = PPC_OPROFILE_POWER4,
290 .oprofile_mmcra_sihv = MMCRA_SIHV,
291 .oprofile_mmcra_sipr = MMCRA_SIPR,
292 .platform = "power5+",
293 },
294 { /* Power5 GS */
295 .pvr_mask = 0xffff0000,
296 .pvr_value = 0x003b0000,
297 .cpu_name = "POWER5+ (gs)",
298 .cpu_features = CPU_FTRS_POWER5,
299 .cpu_user_features = COMMON_USER_POWER5_PLUS,
300 .mmu_features = MMU_FTRS_POWER5,
301 .icache_bsize = 128,
302 .dcache_bsize = 128,
303 .num_pmcs = 6,
304 .pmc_type = PPC_PMC_IBM,
305 .oprofile_cpu_type = "ppc64/power5+",
306 .oprofile_type = PPC_OPROFILE_POWER4,
307 .oprofile_mmcra_sihv = MMCRA_SIHV,
308 .oprofile_mmcra_sipr = MMCRA_SIPR,
309 .platform = "power5+",
310 },
311 { /* POWER6 in P5+ mode; 2.04-compliant processor */
312 .pvr_mask = 0xffffffff,
313 .pvr_value = 0x0f000001,
314 .cpu_name = "POWER5+",
315 .cpu_features = CPU_FTRS_POWER5,
316 .cpu_user_features = COMMON_USER_POWER5_PLUS,
317 .mmu_features = MMU_FTRS_POWER5,
318 .icache_bsize = 128,
319 .dcache_bsize = 128,
320 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
321 .oprofile_type = PPC_OPROFILE_POWER4,
322 .platform = "power5+",
323 },
324 { /* Power6 */
325 .pvr_mask = 0xffff0000,
326 .pvr_value = 0x003e0000,
327 .cpu_name = "POWER6 (raw)",
328 .cpu_features = CPU_FTRS_POWER6,
329 .cpu_user_features = COMMON_USER_POWER6 |
330 PPC_FEATURE_POWER6_EXT,
331 .mmu_features = MMU_FTRS_POWER6,
332 .icache_bsize = 128,
333 .dcache_bsize = 128,
334 .num_pmcs = 6,
335 .pmc_type = PPC_PMC_IBM,
336 .oprofile_cpu_type = "ppc64/power6",
337 .oprofile_type = PPC_OPROFILE_POWER4,
338 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
339 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
340 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
341 POWER6_MMCRA_OTHER,
342 .platform = "power6x",
343 },
344 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
345 .pvr_mask = 0xffffffff,
346 .pvr_value = 0x0f000002,
347 .cpu_name = "POWER6 (architected)",
348 .cpu_features = CPU_FTRS_POWER6,
349 .cpu_user_features = COMMON_USER_POWER6,
350 .mmu_features = MMU_FTRS_POWER6,
351 .icache_bsize = 128,
352 .dcache_bsize = 128,
353 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
354 .oprofile_type = PPC_OPROFILE_POWER4,
355 .platform = "power6",
356 },
357 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
358 .pvr_mask = 0xffffffff,
359 .pvr_value = 0x0f000003,
360 .cpu_name = "POWER7 (architected)",
361 .cpu_features = CPU_FTRS_POWER7,
362 .cpu_user_features = COMMON_USER_POWER7,
363 .cpu_user_features2 = COMMON_USER2_POWER7,
364 .mmu_features = MMU_FTRS_POWER7,
365 .icache_bsize = 128,
366 .dcache_bsize = 128,
367 .oprofile_type = PPC_OPROFILE_POWER4,
368 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
369 .cpu_setup = __setup_cpu_power7,
370 .cpu_restore = __restore_cpu_power7,
371 .flush_tlb = __flush_tlb_power7,
372 .machine_check_early = __machine_check_early_realmode_p7,
373 .platform = "power7",
374 },
375 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
376 .pvr_mask = 0xffffffff,
377 .pvr_value = 0x0f000004,
378 .cpu_name = "POWER8 (architected)",
379 .cpu_features = CPU_FTRS_POWER8,
380 .cpu_user_features = COMMON_USER_POWER8,
381 .cpu_user_features2 = COMMON_USER2_POWER8,
382 .mmu_features = MMU_FTRS_POWER8,
383 .icache_bsize = 128,
384 .dcache_bsize = 128,
385 .oprofile_type = PPC_OPROFILE_INVALID,
386 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
387 .cpu_setup = __setup_cpu_power8,
388 .cpu_restore = __restore_cpu_power8,
389 .flush_tlb = __flush_tlb_power8,
390 .machine_check_early = __machine_check_early_realmode_p8,
391 .platform = "power8",
392 },
393 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
394 .pvr_mask = 0xffffffff,
395 .pvr_value = 0x0f000005,
396 .cpu_name = "POWER9 (architected)",
397 .cpu_features = CPU_FTRS_POWER9,
398 .cpu_user_features = COMMON_USER_POWER9,
399 .cpu_user_features2 = COMMON_USER2_POWER9,
400 .mmu_features = MMU_FTRS_POWER9,
401 .icache_bsize = 128,
402 .dcache_bsize = 128,
403 .oprofile_type = PPC_OPROFILE_INVALID,
404 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
405 .cpu_setup = __setup_cpu_power9,
406 .cpu_restore = __restore_cpu_power9,
407 .flush_tlb = __flush_tlb_power9,
408 .platform = "power9",
409 },
410 { /* Power7 */
411 .pvr_mask = 0xffff0000,
412 .pvr_value = 0x003f0000,
413 .cpu_name = "POWER7 (raw)",
414 .cpu_features = CPU_FTRS_POWER7,
415 .cpu_user_features = COMMON_USER_POWER7,
416 .cpu_user_features2 = COMMON_USER2_POWER7,
417 .mmu_features = MMU_FTRS_POWER7,
418 .icache_bsize = 128,
419 .dcache_bsize = 128,
420 .num_pmcs = 6,
421 .pmc_type = PPC_PMC_IBM,
422 .oprofile_cpu_type = "ppc64/power7",
423 .oprofile_type = PPC_OPROFILE_POWER4,
424 .cpu_setup = __setup_cpu_power7,
425 .cpu_restore = __restore_cpu_power7,
426 .flush_tlb = __flush_tlb_power7,
427 .machine_check_early = __machine_check_early_realmode_p7,
428 .platform = "power7",
429 },
430 { /* Power7+ */
431 .pvr_mask = 0xffff0000,
432 .pvr_value = 0x004A0000,
433 .cpu_name = "POWER7+ (raw)",
434 .cpu_features = CPU_FTRS_POWER7,
435 .cpu_user_features = COMMON_USER_POWER7,
436 .cpu_user_features2 = COMMON_USER2_POWER7,
437 .mmu_features = MMU_FTRS_POWER7,
438 .icache_bsize = 128,
439 .dcache_bsize = 128,
440 .num_pmcs = 6,
441 .pmc_type = PPC_PMC_IBM,
442 .oprofile_cpu_type = "ppc64/power7",
443 .oprofile_type = PPC_OPROFILE_POWER4,
444 .cpu_setup = __setup_cpu_power7,
445 .cpu_restore = __restore_cpu_power7,
446 .flush_tlb = __flush_tlb_power7,
447 .machine_check_early = __machine_check_early_realmode_p7,
448 .platform = "power7+",
449 },
450 { /* Power8E */
451 .pvr_mask = 0xffff0000,
452 .pvr_value = 0x004b0000,
453 .cpu_name = "POWER8E (raw)",
454 .cpu_features = CPU_FTRS_POWER8E,
455 .cpu_user_features = COMMON_USER_POWER8,
456 .cpu_user_features2 = COMMON_USER2_POWER8,
457 .mmu_features = MMU_FTRS_POWER8,
458 .icache_bsize = 128,
459 .dcache_bsize = 128,
460 .num_pmcs = 6,
461 .pmc_type = PPC_PMC_IBM,
462 .oprofile_cpu_type = "ppc64/power8",
463 .oprofile_type = PPC_OPROFILE_INVALID,
464 .cpu_setup = __setup_cpu_power8,
465 .cpu_restore = __restore_cpu_power8,
466 .flush_tlb = __flush_tlb_power8,
467 .machine_check_early = __machine_check_early_realmode_p8,
468 .platform = "power8",
469 },
470 { /* Power8NVL */
471 .pvr_mask = 0xffff0000,
472 .pvr_value = 0x004c0000,
473 .cpu_name = "POWER8NVL (raw)",
474 .cpu_features = CPU_FTRS_POWER8,
475 .cpu_user_features = COMMON_USER_POWER8,
476 .cpu_user_features2 = COMMON_USER2_POWER8,
477 .mmu_features = MMU_FTRS_POWER8,
478 .icache_bsize = 128,
479 .dcache_bsize = 128,
480 .num_pmcs = 6,
481 .pmc_type = PPC_PMC_IBM,
482 .oprofile_cpu_type = "ppc64/power8",
483 .oprofile_type = PPC_OPROFILE_INVALID,
484 .cpu_setup = __setup_cpu_power8,
485 .cpu_restore = __restore_cpu_power8,
486 .flush_tlb = __flush_tlb_power8,
487 .machine_check_early = __machine_check_early_realmode_p8,
488 .platform = "power8",
489 },
490 { /* Power8 DD1: Does not support doorbell IPIs */
491 .pvr_mask = 0xffffff00,
492 .pvr_value = 0x004d0100,
493 .cpu_name = "POWER8 (raw)",
494 .cpu_features = CPU_FTRS_POWER8_DD1,
495 .cpu_user_features = COMMON_USER_POWER8,
496 .cpu_user_features2 = COMMON_USER2_POWER8,
497 .mmu_features = MMU_FTRS_POWER8,
498 .icache_bsize = 128,
499 .dcache_bsize = 128,
500 .num_pmcs = 6,
501 .pmc_type = PPC_PMC_IBM,
502 .oprofile_cpu_type = "ppc64/power8",
503 .oprofile_type = PPC_OPROFILE_INVALID,
504 .cpu_setup = __setup_cpu_power8,
505 .cpu_restore = __restore_cpu_power8,
506 .flush_tlb = __flush_tlb_power8,
507 .machine_check_early = __machine_check_early_realmode_p8,
508 .platform = "power8",
509 },
510 { /* Power8 */
511 .pvr_mask = 0xffff0000,
512 .pvr_value = 0x004d0000,
513 .cpu_name = "POWER8 (raw)",
514 .cpu_features = CPU_FTRS_POWER8,
515 .cpu_user_features = COMMON_USER_POWER8,
516 .cpu_user_features2 = COMMON_USER2_POWER8,
517 .mmu_features = MMU_FTRS_POWER8,
518 .icache_bsize = 128,
519 .dcache_bsize = 128,
520 .num_pmcs = 6,
521 .pmc_type = PPC_PMC_IBM,
522 .oprofile_cpu_type = "ppc64/power8",
523 .oprofile_type = PPC_OPROFILE_INVALID,
524 .cpu_setup = __setup_cpu_power8,
525 .cpu_restore = __restore_cpu_power8,
526 .flush_tlb = __flush_tlb_power8,
527 .machine_check_early = __machine_check_early_realmode_p8,
528 .platform = "power8",
529 },
530 { /* Power9 DD1*/
531 .pvr_mask = 0xffffff00,
532 .pvr_value = 0x004e0100,
533 .cpu_name = "POWER9 (raw)",
534 .cpu_features = CPU_FTRS_POWER9_DD1,
535 .cpu_user_features = COMMON_USER_POWER9,
536 .cpu_user_features2 = COMMON_USER2_POWER9,
537 .mmu_features = MMU_FTRS_POWER9,
538 .icache_bsize = 128,
539 .dcache_bsize = 128,
540 .num_pmcs = 6,
541 .pmc_type = PPC_PMC_IBM,
542 .oprofile_cpu_type = "ppc64/power9",
543 .oprofile_type = PPC_OPROFILE_INVALID,
544 .cpu_setup = __setup_cpu_power9,
545 .cpu_restore = __restore_cpu_power9,
546 .flush_tlb = __flush_tlb_power9,
547 .machine_check_early = __machine_check_early_realmode_p9,
548 .platform = "power9",
549 },
550 { /* Power9 DD2.0 */
551 .pvr_mask = 0xffffefff,
552 .pvr_value = 0x004e0200,
553 .cpu_name = "POWER9 (raw)",
554 .cpu_features = CPU_FTRS_POWER9_DD2_0,
555 .cpu_user_features = COMMON_USER_POWER9,
556 .cpu_user_features2 = COMMON_USER2_POWER9,
557 .mmu_features = MMU_FTRS_POWER9,
558 .icache_bsize = 128,
559 .dcache_bsize = 128,
560 .num_pmcs = 6,
561 .pmc_type = PPC_PMC_IBM,
562 .oprofile_cpu_type = "ppc64/power9",
563 .oprofile_type = PPC_OPROFILE_INVALID,
564 .cpu_setup = __setup_cpu_power9,
565 .cpu_restore = __restore_cpu_power9,
566 .flush_tlb = __flush_tlb_power9,
567 .machine_check_early = __machine_check_early_realmode_p9,
568 .platform = "power9",
569 },
570 { /* Power9 DD 2.1 or later (see DD2.0 above) */
571 .pvr_mask = 0xffff0000,
572 .pvr_value = 0x004e0000,
573 .cpu_name = "POWER9 (raw)",
574 .cpu_features = CPU_FTRS_POWER9_DD2_1,
575 .cpu_user_features = COMMON_USER_POWER9,
576 .cpu_user_features2 = COMMON_USER2_POWER9,
577 .mmu_features = MMU_FTRS_POWER9,
578 .icache_bsize = 128,
579 .dcache_bsize = 128,
580 .num_pmcs = 6,
581 .pmc_type = PPC_PMC_IBM,
582 .oprofile_cpu_type = "ppc64/power9",
583 .oprofile_type = PPC_OPROFILE_INVALID,
584 .cpu_setup = __setup_cpu_power9,
585 .cpu_restore = __restore_cpu_power9,
586 .flush_tlb = __flush_tlb_power9,
587 .machine_check_early = __machine_check_early_realmode_p9,
588 .platform = "power9",
589 },
590 { /* Cell Broadband Engine */
591 .pvr_mask = 0xffff0000,
592 .pvr_value = 0x00700000,
593 .cpu_name = "Cell Broadband Engine",
594 .cpu_features = CPU_FTRS_CELL,
595 .cpu_user_features = COMMON_USER_PPC64 |
596 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
597 PPC_FEATURE_SMT,
598 .mmu_features = MMU_FTRS_CELL,
599 .icache_bsize = 128,
600 .dcache_bsize = 128,
601 .num_pmcs = 4,
602 .pmc_type = PPC_PMC_IBM,
603 .oprofile_cpu_type = "ppc64/cell-be",
604 .oprofile_type = PPC_OPROFILE_CELL,
605 .platform = "ppc-cell-be",
606 },
607 { /* PA Semi PA6T */
608 .pvr_mask = 0x7fff0000,
609 .pvr_value = 0x00900000,
610 .cpu_name = "PA6T",
611 .cpu_features = CPU_FTRS_PA6T,
612 .cpu_user_features = COMMON_USER_PA6T,
613 .mmu_features = MMU_FTRS_PA6T,
614 .icache_bsize = 64,
615 .dcache_bsize = 64,
616 .num_pmcs = 6,
617 .pmc_type = PPC_PMC_PA6T,
618 .cpu_setup = __setup_cpu_pa6t,
619 .cpu_restore = __restore_cpu_pa6t,
620 .oprofile_cpu_type = "ppc64/pa6t",
621 .oprofile_type = PPC_OPROFILE_PA6T,
622 .platform = "pa6t",
623 },
624 { /* default match */
625 .pvr_mask = 0x00000000,
626 .pvr_value = 0x00000000,
627 .cpu_name = "POWER4 (compatible)",
628 .cpu_features = CPU_FTRS_COMPATIBLE,
629 .cpu_user_features = COMMON_USER_PPC64,
630 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
631 .icache_bsize = 128,
632 .dcache_bsize = 128,
633 .num_pmcs = 6,
634 .pmc_type = PPC_PMC_IBM,
635 .platform = "power4",
636 }
637 #endif /* CONFIG_PPC_BOOK3S_64 */
638
639 #ifdef CONFIG_PPC32
640 #ifdef CONFIG_PPC_BOOK3S_32
641 { /* 601 */
642 .pvr_mask = 0xffff0000,
643 .pvr_value = 0x00010000,
644 .cpu_name = "601",
645 .cpu_features = CPU_FTRS_PPC601,
646 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
647 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
648 .mmu_features = MMU_FTR_HPTE_TABLE,
649 .icache_bsize = 32,
650 .dcache_bsize = 32,
651 .machine_check = machine_check_generic,
652 .platform = "ppc601",
653 },
654 { /* 603 */
655 .pvr_mask = 0xffff0000,
656 .pvr_value = 0x00030000,
657 .cpu_name = "603",
658 .cpu_features = CPU_FTRS_603,
659 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
660 .mmu_features = 0,
661 .icache_bsize = 32,
662 .dcache_bsize = 32,
663 .cpu_setup = __setup_cpu_603,
664 .machine_check = machine_check_generic,
665 .platform = "ppc603",
666 },
667 { /* 603e */
668 .pvr_mask = 0xffff0000,
669 .pvr_value = 0x00060000,
670 .cpu_name = "603e",
671 .cpu_features = CPU_FTRS_603,
672 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
673 .mmu_features = 0,
674 .icache_bsize = 32,
675 .dcache_bsize = 32,
676 .cpu_setup = __setup_cpu_603,
677 .machine_check = machine_check_generic,
678 .platform = "ppc603",
679 },
680 { /* 603ev */
681 .pvr_mask = 0xffff0000,
682 .pvr_value = 0x00070000,
683 .cpu_name = "603ev",
684 .cpu_features = CPU_FTRS_603,
685 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
686 .mmu_features = 0,
687 .icache_bsize = 32,
688 .dcache_bsize = 32,
689 .cpu_setup = __setup_cpu_603,
690 .machine_check = machine_check_generic,
691 .platform = "ppc603",
692 },
693 { /* 604 */
694 .pvr_mask = 0xffff0000,
695 .pvr_value = 0x00040000,
696 .cpu_name = "604",
697 .cpu_features = CPU_FTRS_604,
698 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
699 .mmu_features = MMU_FTR_HPTE_TABLE,
700 .icache_bsize = 32,
701 .dcache_bsize = 32,
702 .num_pmcs = 2,
703 .cpu_setup = __setup_cpu_604,
704 .machine_check = machine_check_generic,
705 .platform = "ppc604",
706 },
707 { /* 604e */
708 .pvr_mask = 0xfffff000,
709 .pvr_value = 0x00090000,
710 .cpu_name = "604e",
711 .cpu_features = CPU_FTRS_604,
712 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
713 .mmu_features = MMU_FTR_HPTE_TABLE,
714 .icache_bsize = 32,
715 .dcache_bsize = 32,
716 .num_pmcs = 4,
717 .cpu_setup = __setup_cpu_604,
718 .machine_check = machine_check_generic,
719 .platform = "ppc604",
720 },
721 { /* 604r */
722 .pvr_mask = 0xffff0000,
723 .pvr_value = 0x00090000,
724 .cpu_name = "604r",
725 .cpu_features = CPU_FTRS_604,
726 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
727 .mmu_features = MMU_FTR_HPTE_TABLE,
728 .icache_bsize = 32,
729 .dcache_bsize = 32,
730 .num_pmcs = 4,
731 .cpu_setup = __setup_cpu_604,
732 .machine_check = machine_check_generic,
733 .platform = "ppc604",
734 },
735 { /* 604ev */
736 .pvr_mask = 0xffff0000,
737 .pvr_value = 0x000a0000,
738 .cpu_name = "604ev",
739 .cpu_features = CPU_FTRS_604,
740 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
741 .mmu_features = MMU_FTR_HPTE_TABLE,
742 .icache_bsize = 32,
743 .dcache_bsize = 32,
744 .num_pmcs = 4,
745 .cpu_setup = __setup_cpu_604,
746 .machine_check = machine_check_generic,
747 .platform = "ppc604",
748 },
749 { /* 740/750 (0x4202, don't support TAU ?) */
750 .pvr_mask = 0xffffffff,
751 .pvr_value = 0x00084202,
752 .cpu_name = "740/750",
753 .cpu_features = CPU_FTRS_740_NOTAU,
754 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
755 .mmu_features = MMU_FTR_HPTE_TABLE,
756 .icache_bsize = 32,
757 .dcache_bsize = 32,
758 .num_pmcs = 4,
759 .cpu_setup = __setup_cpu_750,
760 .machine_check = machine_check_generic,
761 .platform = "ppc750",
762 },
763 { /* 750CX (80100 and 8010x?) */
764 .pvr_mask = 0xfffffff0,
765 .pvr_value = 0x00080100,
766 .cpu_name = "750CX",
767 .cpu_features = CPU_FTRS_750,
768 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
769 .mmu_features = MMU_FTR_HPTE_TABLE,
770 .icache_bsize = 32,
771 .dcache_bsize = 32,
772 .num_pmcs = 4,
773 .cpu_setup = __setup_cpu_750cx,
774 .machine_check = machine_check_generic,
775 .platform = "ppc750",
776 },
777 { /* 750CX (82201 and 82202) */
778 .pvr_mask = 0xfffffff0,
779 .pvr_value = 0x00082200,
780 .cpu_name = "750CX",
781 .cpu_features = CPU_FTRS_750,
782 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
783 .mmu_features = MMU_FTR_HPTE_TABLE,
784 .icache_bsize = 32,
785 .dcache_bsize = 32,
786 .num_pmcs = 4,
787 .pmc_type = PPC_PMC_IBM,
788 .cpu_setup = __setup_cpu_750cx,
789 .machine_check = machine_check_generic,
790 .platform = "ppc750",
791 },
792 { /* 750CXe (82214) */
793 .pvr_mask = 0xfffffff0,
794 .pvr_value = 0x00082210,
795 .cpu_name = "750CXe",
796 .cpu_features = CPU_FTRS_750,
797 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
798 .mmu_features = MMU_FTR_HPTE_TABLE,
799 .icache_bsize = 32,
800 .dcache_bsize = 32,
801 .num_pmcs = 4,
802 .pmc_type = PPC_PMC_IBM,
803 .cpu_setup = __setup_cpu_750cx,
804 .machine_check = machine_check_generic,
805 .platform = "ppc750",
806 },
807 { /* 750CXe "Gekko" (83214) */
808 .pvr_mask = 0xffffffff,
809 .pvr_value = 0x00083214,
810 .cpu_name = "750CXe",
811 .cpu_features = CPU_FTRS_750,
812 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
813 .mmu_features = MMU_FTR_HPTE_TABLE,
814 .icache_bsize = 32,
815 .dcache_bsize = 32,
816 .num_pmcs = 4,
817 .pmc_type = PPC_PMC_IBM,
818 .cpu_setup = __setup_cpu_750cx,
819 .machine_check = machine_check_generic,
820 .platform = "ppc750",
821 },
822 { /* 750CL (and "Broadway") */
823 .pvr_mask = 0xfffff0e0,
824 .pvr_value = 0x00087000,
825 .cpu_name = "750CL",
826 .cpu_features = CPU_FTRS_750CL,
827 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
828 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
829 .icache_bsize = 32,
830 .dcache_bsize = 32,
831 .num_pmcs = 4,
832 .pmc_type = PPC_PMC_IBM,
833 .cpu_setup = __setup_cpu_750,
834 .machine_check = machine_check_generic,
835 .platform = "ppc750",
836 .oprofile_cpu_type = "ppc/750",
837 .oprofile_type = PPC_OPROFILE_G4,
838 },
839 { /* 745/755 */
840 .pvr_mask = 0xfffff000,
841 .pvr_value = 0x00083000,
842 .cpu_name = "745/755",
843 .cpu_features = CPU_FTRS_750,
844 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
845 .mmu_features = MMU_FTR_HPTE_TABLE,
846 .icache_bsize = 32,
847 .dcache_bsize = 32,
848 .num_pmcs = 4,
849 .pmc_type = PPC_PMC_IBM,
850 .cpu_setup = __setup_cpu_750,
851 .machine_check = machine_check_generic,
852 .platform = "ppc750",
853 },
854 { /* 750FX rev 1.x */
855 .pvr_mask = 0xffffff00,
856 .pvr_value = 0x70000100,
857 .cpu_name = "750FX",
858 .cpu_features = CPU_FTRS_750FX1,
859 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
860 .mmu_features = MMU_FTR_HPTE_TABLE,
861 .icache_bsize = 32,
862 .dcache_bsize = 32,
863 .num_pmcs = 4,
864 .pmc_type = PPC_PMC_IBM,
865 .cpu_setup = __setup_cpu_750,
866 .machine_check = machine_check_generic,
867 .platform = "ppc750",
868 .oprofile_cpu_type = "ppc/750",
869 .oprofile_type = PPC_OPROFILE_G4,
870 },
871 { /* 750FX rev 2.0 must disable HID0[DPM] */
872 .pvr_mask = 0xffffffff,
873 .pvr_value = 0x70000200,
874 .cpu_name = "750FX",
875 .cpu_features = CPU_FTRS_750FX2,
876 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
877 .mmu_features = MMU_FTR_HPTE_TABLE,
878 .icache_bsize = 32,
879 .dcache_bsize = 32,
880 .num_pmcs = 4,
881 .pmc_type = PPC_PMC_IBM,
882 .cpu_setup = __setup_cpu_750,
883 .machine_check = machine_check_generic,
884 .platform = "ppc750",
885 .oprofile_cpu_type = "ppc/750",
886 .oprofile_type = PPC_OPROFILE_G4,
887 },
888 { /* 750FX (All revs except 2.0) */
889 .pvr_mask = 0xffff0000,
890 .pvr_value = 0x70000000,
891 .cpu_name = "750FX",
892 .cpu_features = CPU_FTRS_750FX,
893 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
894 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
895 .icache_bsize = 32,
896 .dcache_bsize = 32,
897 .num_pmcs = 4,
898 .pmc_type = PPC_PMC_IBM,
899 .cpu_setup = __setup_cpu_750fx,
900 .machine_check = machine_check_generic,
901 .platform = "ppc750",
902 .oprofile_cpu_type = "ppc/750",
903 .oprofile_type = PPC_OPROFILE_G4,
904 },
905 { /* 750GX */
906 .pvr_mask = 0xffff0000,
907 .pvr_value = 0x70020000,
908 .cpu_name = "750GX",
909 .cpu_features = CPU_FTRS_750GX,
910 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
911 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
912 .icache_bsize = 32,
913 .dcache_bsize = 32,
914 .num_pmcs = 4,
915 .pmc_type = PPC_PMC_IBM,
916 .cpu_setup = __setup_cpu_750fx,
917 .machine_check = machine_check_generic,
918 .platform = "ppc750",
919 .oprofile_cpu_type = "ppc/750",
920 .oprofile_type = PPC_OPROFILE_G4,
921 },
922 { /* 740/750 (L2CR bit need fixup for 740) */
923 .pvr_mask = 0xffff0000,
924 .pvr_value = 0x00080000,
925 .cpu_name = "740/750",
926 .cpu_features = CPU_FTRS_740,
927 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
928 .mmu_features = MMU_FTR_HPTE_TABLE,
929 .icache_bsize = 32,
930 .dcache_bsize = 32,
931 .num_pmcs = 4,
932 .pmc_type = PPC_PMC_IBM,
933 .cpu_setup = __setup_cpu_750,
934 .machine_check = machine_check_generic,
935 .platform = "ppc750",
936 },
937 { /* 7400 rev 1.1 ? (no TAU) */
938 .pvr_mask = 0xffffffff,
939 .pvr_value = 0x000c1101,
940 .cpu_name = "7400 (1.1)",
941 .cpu_features = CPU_FTRS_7400_NOTAU,
942 .cpu_user_features = COMMON_USER |
943 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
944 .mmu_features = MMU_FTR_HPTE_TABLE,
945 .icache_bsize = 32,
946 .dcache_bsize = 32,
947 .num_pmcs = 4,
948 .pmc_type = PPC_PMC_G4,
949 .cpu_setup = __setup_cpu_7400,
950 .machine_check = machine_check_generic,
951 .platform = "ppc7400",
952 },
953 { /* 7400 */
954 .pvr_mask = 0xffff0000,
955 .pvr_value = 0x000c0000,
956 .cpu_name = "7400",
957 .cpu_features = CPU_FTRS_7400,
958 .cpu_user_features = COMMON_USER |
959 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
960 .mmu_features = MMU_FTR_HPTE_TABLE,
961 .icache_bsize = 32,
962 .dcache_bsize = 32,
963 .num_pmcs = 4,
964 .pmc_type = PPC_PMC_G4,
965 .cpu_setup = __setup_cpu_7400,
966 .machine_check = machine_check_generic,
967 .platform = "ppc7400",
968 },
969 { /* 7410 */
970 .pvr_mask = 0xffff0000,
971 .pvr_value = 0x800c0000,
972 .cpu_name = "7410",
973 .cpu_features = CPU_FTRS_7400,
974 .cpu_user_features = COMMON_USER |
975 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
976 .mmu_features = MMU_FTR_HPTE_TABLE,
977 .icache_bsize = 32,
978 .dcache_bsize = 32,
979 .num_pmcs = 4,
980 .pmc_type = PPC_PMC_G4,
981 .cpu_setup = __setup_cpu_7410,
982 .machine_check = machine_check_generic,
983 .platform = "ppc7400",
984 },
985 { /* 7450 2.0 - no doze/nap */
986 .pvr_mask = 0xffffffff,
987 .pvr_value = 0x80000200,
988 .cpu_name = "7450",
989 .cpu_features = CPU_FTRS_7450_20,
990 .cpu_user_features = COMMON_USER |
991 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
992 .mmu_features = MMU_FTR_HPTE_TABLE,
993 .icache_bsize = 32,
994 .dcache_bsize = 32,
995 .num_pmcs = 6,
996 .pmc_type = PPC_PMC_G4,
997 .cpu_setup = __setup_cpu_745x,
998 .oprofile_cpu_type = "ppc/7450",
999 .oprofile_type = PPC_OPROFILE_G4,
1000 .machine_check = machine_check_generic,
1001 .platform = "ppc7450",
1002 },
1003 { /* 7450 2.1 */
1004 .pvr_mask = 0xffffffff,
1005 .pvr_value = 0x80000201,
1006 .cpu_name = "7450",
1007 .cpu_features = CPU_FTRS_7450_21,
1008 .cpu_user_features = COMMON_USER |
1009 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1010 .mmu_features = MMU_FTR_HPTE_TABLE,
1011 .icache_bsize = 32,
1012 .dcache_bsize = 32,
1013 .num_pmcs = 6,
1014 .pmc_type = PPC_PMC_G4,
1015 .cpu_setup = __setup_cpu_745x,
1016 .oprofile_cpu_type = "ppc/7450",
1017 .oprofile_type = PPC_OPROFILE_G4,
1018 .machine_check = machine_check_generic,
1019 .platform = "ppc7450",
1020 },
1021 { /* 7450 2.3 and newer */
1022 .pvr_mask = 0xffff0000,
1023 .pvr_value = 0x80000000,
1024 .cpu_name = "7450",
1025 .cpu_features = CPU_FTRS_7450_23,
1026 .cpu_user_features = COMMON_USER |
1027 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1028 .mmu_features = MMU_FTR_HPTE_TABLE,
1029 .icache_bsize = 32,
1030 .dcache_bsize = 32,
1031 .num_pmcs = 6,
1032 .pmc_type = PPC_PMC_G4,
1033 .cpu_setup = __setup_cpu_745x,
1034 .oprofile_cpu_type = "ppc/7450",
1035 .oprofile_type = PPC_OPROFILE_G4,
1036 .machine_check = machine_check_generic,
1037 .platform = "ppc7450",
1038 },
1039 { /* 7455 rev 1.x */
1040 .pvr_mask = 0xffffff00,
1041 .pvr_value = 0x80010100,
1042 .cpu_name = "7455",
1043 .cpu_features = CPU_FTRS_7455_1,
1044 .cpu_user_features = COMMON_USER |
1045 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1046 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1047 .icache_bsize = 32,
1048 .dcache_bsize = 32,
1049 .num_pmcs = 6,
1050 .pmc_type = PPC_PMC_G4,
1051 .cpu_setup = __setup_cpu_745x,
1052 .oprofile_cpu_type = "ppc/7450",
1053 .oprofile_type = PPC_OPROFILE_G4,
1054 .machine_check = machine_check_generic,
1055 .platform = "ppc7450",
1056 },
1057 { /* 7455 rev 2.0 */
1058 .pvr_mask = 0xffffffff,
1059 .pvr_value = 0x80010200,
1060 .cpu_name = "7455",
1061 .cpu_features = CPU_FTRS_7455_20,
1062 .cpu_user_features = COMMON_USER |
1063 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1064 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1065 .icache_bsize = 32,
1066 .dcache_bsize = 32,
1067 .num_pmcs = 6,
1068 .pmc_type = PPC_PMC_G4,
1069 .cpu_setup = __setup_cpu_745x,
1070 .oprofile_cpu_type = "ppc/7450",
1071 .oprofile_type = PPC_OPROFILE_G4,
1072 .machine_check = machine_check_generic,
1073 .platform = "ppc7450",
1074 },
1075 { /* 7455 others */
1076 .pvr_mask = 0xffff0000,
1077 .pvr_value = 0x80010000,
1078 .cpu_name = "7455",
1079 .cpu_features = CPU_FTRS_7455,
1080 .cpu_user_features = COMMON_USER |
1081 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1082 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1083 .icache_bsize = 32,
1084 .dcache_bsize = 32,
1085 .num_pmcs = 6,
1086 .pmc_type = PPC_PMC_G4,
1087 .cpu_setup = __setup_cpu_745x,
1088 .oprofile_cpu_type = "ppc/7450",
1089 .oprofile_type = PPC_OPROFILE_G4,
1090 .machine_check = machine_check_generic,
1091 .platform = "ppc7450",
1092 },
1093 { /* 7447/7457 Rev 1.0 */
1094 .pvr_mask = 0xffffffff,
1095 .pvr_value = 0x80020100,
1096 .cpu_name = "7447/7457",
1097 .cpu_features = CPU_FTRS_7447_10,
1098 .cpu_user_features = COMMON_USER |
1099 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1100 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1101 .icache_bsize = 32,
1102 .dcache_bsize = 32,
1103 .num_pmcs = 6,
1104 .pmc_type = PPC_PMC_G4,
1105 .cpu_setup = __setup_cpu_745x,
1106 .oprofile_cpu_type = "ppc/7450",
1107 .oprofile_type = PPC_OPROFILE_G4,
1108 .machine_check = machine_check_generic,
1109 .platform = "ppc7450",
1110 },
1111 { /* 7447/7457 Rev 1.1 */
1112 .pvr_mask = 0xffffffff,
1113 .pvr_value = 0x80020101,
1114 .cpu_name = "7447/7457",
1115 .cpu_features = CPU_FTRS_7447_10,
1116 .cpu_user_features = COMMON_USER |
1117 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1118 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1119 .icache_bsize = 32,
1120 .dcache_bsize = 32,
1121 .num_pmcs = 6,
1122 .pmc_type = PPC_PMC_G4,
1123 .cpu_setup = __setup_cpu_745x,
1124 .oprofile_cpu_type = "ppc/7450",
1125 .oprofile_type = PPC_OPROFILE_G4,
1126 .machine_check = machine_check_generic,
1127 .platform = "ppc7450",
1128 },
1129 { /* 7447/7457 Rev 1.2 and later */
1130 .pvr_mask = 0xffff0000,
1131 .pvr_value = 0x80020000,
1132 .cpu_name = "7447/7457",
1133 .cpu_features = CPU_FTRS_7447,
1134 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1135 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1136 .icache_bsize = 32,
1137 .dcache_bsize = 32,
1138 .num_pmcs = 6,
1139 .pmc_type = PPC_PMC_G4,
1140 .cpu_setup = __setup_cpu_745x,
1141 .oprofile_cpu_type = "ppc/7450",
1142 .oprofile_type = PPC_OPROFILE_G4,
1143 .machine_check = machine_check_generic,
1144 .platform = "ppc7450",
1145 },
1146 { /* 7447A */
1147 .pvr_mask = 0xffff0000,
1148 .pvr_value = 0x80030000,
1149 .cpu_name = "7447A",
1150 .cpu_features = CPU_FTRS_7447A,
1151 .cpu_user_features = COMMON_USER |
1152 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1153 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1154 .icache_bsize = 32,
1155 .dcache_bsize = 32,
1156 .num_pmcs = 6,
1157 .pmc_type = PPC_PMC_G4,
1158 .cpu_setup = __setup_cpu_745x,
1159 .oprofile_cpu_type = "ppc/7450",
1160 .oprofile_type = PPC_OPROFILE_G4,
1161 .machine_check = machine_check_generic,
1162 .platform = "ppc7450",
1163 },
1164 { /* 7448 */
1165 .pvr_mask = 0xffff0000,
1166 .pvr_value = 0x80040000,
1167 .cpu_name = "7448",
1168 .cpu_features = CPU_FTRS_7448,
1169 .cpu_user_features = COMMON_USER |
1170 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1171 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1172 .icache_bsize = 32,
1173 .dcache_bsize = 32,
1174 .num_pmcs = 6,
1175 .pmc_type = PPC_PMC_G4,
1176 .cpu_setup = __setup_cpu_745x,
1177 .oprofile_cpu_type = "ppc/7450",
1178 .oprofile_type = PPC_OPROFILE_G4,
1179 .machine_check = machine_check_generic,
1180 .platform = "ppc7450",
1181 },
1182 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1183 .pvr_mask = 0x7fff0000,
1184 .pvr_value = 0x00810000,
1185 .cpu_name = "82xx",
1186 .cpu_features = CPU_FTRS_82XX,
1187 .cpu_user_features = COMMON_USER,
1188 .mmu_features = 0,
1189 .icache_bsize = 32,
1190 .dcache_bsize = 32,
1191 .cpu_setup = __setup_cpu_603,
1192 .machine_check = machine_check_generic,
1193 .platform = "ppc603",
1194 },
1195 { /* All G2_LE (603e core, plus some) have the same pvr */
1196 .pvr_mask = 0x7fff0000,
1197 .pvr_value = 0x00820000,
1198 .cpu_name = "G2_LE",
1199 .cpu_features = CPU_FTRS_G2_LE,
1200 .cpu_user_features = COMMON_USER,
1201 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1202 .icache_bsize = 32,
1203 .dcache_bsize = 32,
1204 .cpu_setup = __setup_cpu_603,
1205 .machine_check = machine_check_generic,
1206 .platform = "ppc603",
1207 },
1208 { /* e300c1 (a 603e core, plus some) on 83xx */
1209 .pvr_mask = 0x7fff0000,
1210 .pvr_value = 0x00830000,
1211 .cpu_name = "e300c1",
1212 .cpu_features = CPU_FTRS_E300,
1213 .cpu_user_features = COMMON_USER,
1214 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1215 .icache_bsize = 32,
1216 .dcache_bsize = 32,
1217 .cpu_setup = __setup_cpu_603,
1218 .machine_check = machine_check_generic,
1219 .platform = "ppc603",
1220 },
1221 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1222 .pvr_mask = 0x7fff0000,
1223 .pvr_value = 0x00840000,
1224 .cpu_name = "e300c2",
1225 .cpu_features = CPU_FTRS_E300C2,
1226 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1227 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1228 MMU_FTR_NEED_DTLB_SW_LRU,
1229 .icache_bsize = 32,
1230 .dcache_bsize = 32,
1231 .cpu_setup = __setup_cpu_603,
1232 .machine_check = machine_check_generic,
1233 .platform = "ppc603",
1234 },
1235 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1236 .pvr_mask = 0x7fff0000,
1237 .pvr_value = 0x00850000,
1238 .cpu_name = "e300c3",
1239 .cpu_features = CPU_FTRS_E300,
1240 .cpu_user_features = COMMON_USER,
1241 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1242 MMU_FTR_NEED_DTLB_SW_LRU,
1243 .icache_bsize = 32,
1244 .dcache_bsize = 32,
1245 .cpu_setup = __setup_cpu_603,
1246 .machine_check = machine_check_generic,
1247 .num_pmcs = 4,
1248 .oprofile_cpu_type = "ppc/e300",
1249 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1250 .platform = "ppc603",
1251 },
1252 { /* e300c4 (e300c1, plus one IU) */
1253 .pvr_mask = 0x7fff0000,
1254 .pvr_value = 0x00860000,
1255 .cpu_name = "e300c4",
1256 .cpu_features = CPU_FTRS_E300,
1257 .cpu_user_features = COMMON_USER,
1258 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1259 MMU_FTR_NEED_DTLB_SW_LRU,
1260 .icache_bsize = 32,
1261 .dcache_bsize = 32,
1262 .cpu_setup = __setup_cpu_603,
1263 .machine_check = machine_check_generic,
1264 .num_pmcs = 4,
1265 .oprofile_cpu_type = "ppc/e300",
1266 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1267 .platform = "ppc603",
1268 },
1269 { /* default match, we assume split I/D cache & TB (non-601)... */
1270 .pvr_mask = 0x00000000,
1271 .pvr_value = 0x00000000,
1272 .cpu_name = "(generic PPC)",
1273 .cpu_features = CPU_FTRS_CLASSIC32,
1274 .cpu_user_features = COMMON_USER,
1275 .mmu_features = MMU_FTR_HPTE_TABLE,
1276 .icache_bsize = 32,
1277 .dcache_bsize = 32,
1278 .machine_check = machine_check_generic,
1279 .platform = "ppc603",
1280 },
1281 #endif /* CONFIG_PPC_BOOK3S_32 */
1282 #ifdef CONFIG_PPC_8xx
1283 { /* 8xx */
1284 .pvr_mask = 0xffff0000,
1285 .pvr_value = PVR_8xx,
1286 .cpu_name = "8xx",
1287 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1288 * if the 8xx code is there.... */
1289 .cpu_features = CPU_FTRS_8XX,
1290 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1291 .mmu_features = MMU_FTR_TYPE_8xx,
1292 .icache_bsize = 16,
1293 .dcache_bsize = 16,
1294 .machine_check = machine_check_8xx,
1295 .platform = "ppc823",
1296 },
1297 #endif /* CONFIG_PPC_8xx */
1298 #ifdef CONFIG_40x
1299 { /* 403GC */
1300 .pvr_mask = 0xffffff00,
1301 .pvr_value = 0x00200200,
1302 .cpu_name = "403GC",
1303 .cpu_features = CPU_FTRS_40X,
1304 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1305 .mmu_features = MMU_FTR_TYPE_40x,
1306 .icache_bsize = 16,
1307 .dcache_bsize = 16,
1308 .machine_check = machine_check_4xx,
1309 .platform = "ppc403",
1310 },
1311 { /* 403GCX */
1312 .pvr_mask = 0xffffff00,
1313 .pvr_value = 0x00201400,
1314 .cpu_name = "403GCX",
1315 .cpu_features = CPU_FTRS_40X,
1316 .cpu_user_features = PPC_FEATURE_32 |
1317 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1318 .mmu_features = MMU_FTR_TYPE_40x,
1319 .icache_bsize = 16,
1320 .dcache_bsize = 16,
1321 .machine_check = machine_check_4xx,
1322 .platform = "ppc403",
1323 },
1324 { /* 403G ?? */
1325 .pvr_mask = 0xffff0000,
1326 .pvr_value = 0x00200000,
1327 .cpu_name = "403G ??",
1328 .cpu_features = CPU_FTRS_40X,
1329 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1330 .mmu_features = MMU_FTR_TYPE_40x,
1331 .icache_bsize = 16,
1332 .dcache_bsize = 16,
1333 .machine_check = machine_check_4xx,
1334 .platform = "ppc403",
1335 },
1336 { /* 405GP */
1337 .pvr_mask = 0xffff0000,
1338 .pvr_value = 0x40110000,
1339 .cpu_name = "405GP",
1340 .cpu_features = CPU_FTRS_40X,
1341 .cpu_user_features = PPC_FEATURE_32 |
1342 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1343 .mmu_features = MMU_FTR_TYPE_40x,
1344 .icache_bsize = 32,
1345 .dcache_bsize = 32,
1346 .machine_check = machine_check_4xx,
1347 .platform = "ppc405",
1348 },
1349 { /* STB 03xxx */
1350 .pvr_mask = 0xffff0000,
1351 .pvr_value = 0x40130000,
1352 .cpu_name = "STB03xxx",
1353 .cpu_features = CPU_FTRS_40X,
1354 .cpu_user_features = PPC_FEATURE_32 |
1355 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1356 .mmu_features = MMU_FTR_TYPE_40x,
1357 .icache_bsize = 32,
1358 .dcache_bsize = 32,
1359 .machine_check = machine_check_4xx,
1360 .platform = "ppc405",
1361 },
1362 { /* STB 04xxx */
1363 .pvr_mask = 0xffff0000,
1364 .pvr_value = 0x41810000,
1365 .cpu_name = "STB04xxx",
1366 .cpu_features = CPU_FTRS_40X,
1367 .cpu_user_features = PPC_FEATURE_32 |
1368 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1369 .mmu_features = MMU_FTR_TYPE_40x,
1370 .icache_bsize = 32,
1371 .dcache_bsize = 32,
1372 .machine_check = machine_check_4xx,
1373 .platform = "ppc405",
1374 },
1375 { /* NP405L */
1376 .pvr_mask = 0xffff0000,
1377 .pvr_value = 0x41610000,
1378 .cpu_name = "NP405L",
1379 .cpu_features = CPU_FTRS_40X,
1380 .cpu_user_features = PPC_FEATURE_32 |
1381 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1382 .mmu_features = MMU_FTR_TYPE_40x,
1383 .icache_bsize = 32,
1384 .dcache_bsize = 32,
1385 .machine_check = machine_check_4xx,
1386 .platform = "ppc405",
1387 },
1388 { /* NP4GS3 */
1389 .pvr_mask = 0xffff0000,
1390 .pvr_value = 0x40B10000,
1391 .cpu_name = "NP4GS3",
1392 .cpu_features = CPU_FTRS_40X,
1393 .cpu_user_features = PPC_FEATURE_32 |
1394 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1395 .mmu_features = MMU_FTR_TYPE_40x,
1396 .icache_bsize = 32,
1397 .dcache_bsize = 32,
1398 .machine_check = machine_check_4xx,
1399 .platform = "ppc405",
1400 },
1401 { /* NP405H */
1402 .pvr_mask = 0xffff0000,
1403 .pvr_value = 0x41410000,
1404 .cpu_name = "NP405H",
1405 .cpu_features = CPU_FTRS_40X,
1406 .cpu_user_features = PPC_FEATURE_32 |
1407 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1408 .mmu_features = MMU_FTR_TYPE_40x,
1409 .icache_bsize = 32,
1410 .dcache_bsize = 32,
1411 .machine_check = machine_check_4xx,
1412 .platform = "ppc405",
1413 },
1414 { /* 405GPr */
1415 .pvr_mask = 0xffff0000,
1416 .pvr_value = 0x50910000,
1417 .cpu_name = "405GPr",
1418 .cpu_features = CPU_FTRS_40X,
1419 .cpu_user_features = PPC_FEATURE_32 |
1420 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1421 .mmu_features = MMU_FTR_TYPE_40x,
1422 .icache_bsize = 32,
1423 .dcache_bsize = 32,
1424 .machine_check = machine_check_4xx,
1425 .platform = "ppc405",
1426 },
1427 { /* STBx25xx */
1428 .pvr_mask = 0xffff0000,
1429 .pvr_value = 0x51510000,
1430 .cpu_name = "STBx25xx",
1431 .cpu_features = CPU_FTRS_40X,
1432 .cpu_user_features = PPC_FEATURE_32 |
1433 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1434 .mmu_features = MMU_FTR_TYPE_40x,
1435 .icache_bsize = 32,
1436 .dcache_bsize = 32,
1437 .machine_check = machine_check_4xx,
1438 .platform = "ppc405",
1439 },
1440 { /* 405LP */
1441 .pvr_mask = 0xffff0000,
1442 .pvr_value = 0x41F10000,
1443 .cpu_name = "405LP",
1444 .cpu_features = CPU_FTRS_40X,
1445 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1446 .mmu_features = MMU_FTR_TYPE_40x,
1447 .icache_bsize = 32,
1448 .dcache_bsize = 32,
1449 .machine_check = machine_check_4xx,
1450 .platform = "ppc405",
1451 },
1452 { /* Xilinx Virtex-II Pro */
1453 .pvr_mask = 0xfffff000,
1454 .pvr_value = 0x20010000,
1455 .cpu_name = "Virtex-II Pro",
1456 .cpu_features = CPU_FTRS_40X,
1457 .cpu_user_features = PPC_FEATURE_32 |
1458 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1459 .mmu_features = MMU_FTR_TYPE_40x,
1460 .icache_bsize = 32,
1461 .dcache_bsize = 32,
1462 .machine_check = machine_check_4xx,
1463 .platform = "ppc405",
1464 },
1465 { /* Xilinx Virtex-4 FX */
1466 .pvr_mask = 0xfffff000,
1467 .pvr_value = 0x20011000,
1468 .cpu_name = "Virtex-4 FX",
1469 .cpu_features = CPU_FTRS_40X,
1470 .cpu_user_features = PPC_FEATURE_32 |
1471 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1472 .mmu_features = MMU_FTR_TYPE_40x,
1473 .icache_bsize = 32,
1474 .dcache_bsize = 32,
1475 .machine_check = machine_check_4xx,
1476 .platform = "ppc405",
1477 },
1478 { /* 405EP */
1479 .pvr_mask = 0xffff0000,
1480 .pvr_value = 0x51210000,
1481 .cpu_name = "405EP",
1482 .cpu_features = CPU_FTRS_40X,
1483 .cpu_user_features = PPC_FEATURE_32 |
1484 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1485 .mmu_features = MMU_FTR_TYPE_40x,
1486 .icache_bsize = 32,
1487 .dcache_bsize = 32,
1488 .machine_check = machine_check_4xx,
1489 .platform = "ppc405",
1490 },
1491 { /* 405EX Rev. A/B with Security */
1492 .pvr_mask = 0xffff000f,
1493 .pvr_value = 0x12910007,
1494 .cpu_name = "405EX Rev. A/B",
1495 .cpu_features = CPU_FTRS_40X,
1496 .cpu_user_features = PPC_FEATURE_32 |
1497 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1498 .mmu_features = MMU_FTR_TYPE_40x,
1499 .icache_bsize = 32,
1500 .dcache_bsize = 32,
1501 .machine_check = machine_check_4xx,
1502 .platform = "ppc405",
1503 },
1504 { /* 405EX Rev. C without Security */
1505 .pvr_mask = 0xffff000f,
1506 .pvr_value = 0x1291000d,
1507 .cpu_name = "405EX Rev. C",
1508 .cpu_features = CPU_FTRS_40X,
1509 .cpu_user_features = PPC_FEATURE_32 |
1510 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1511 .mmu_features = MMU_FTR_TYPE_40x,
1512 .icache_bsize = 32,
1513 .dcache_bsize = 32,
1514 .machine_check = machine_check_4xx,
1515 .platform = "ppc405",
1516 },
1517 { /* 405EX Rev. C with Security */
1518 .pvr_mask = 0xffff000f,
1519 .pvr_value = 0x1291000f,
1520 .cpu_name = "405EX Rev. C",
1521 .cpu_features = CPU_FTRS_40X,
1522 .cpu_user_features = PPC_FEATURE_32 |
1523 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1524 .mmu_features = MMU_FTR_TYPE_40x,
1525 .icache_bsize = 32,
1526 .dcache_bsize = 32,
1527 .machine_check = machine_check_4xx,
1528 .platform = "ppc405",
1529 },
1530 { /* 405EX Rev. D without Security */
1531 .pvr_mask = 0xffff000f,
1532 .pvr_value = 0x12910003,
1533 .cpu_name = "405EX Rev. D",
1534 .cpu_features = CPU_FTRS_40X,
1535 .cpu_user_features = PPC_FEATURE_32 |
1536 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1537 .mmu_features = MMU_FTR_TYPE_40x,
1538 .icache_bsize = 32,
1539 .dcache_bsize = 32,
1540 .machine_check = machine_check_4xx,
1541 .platform = "ppc405",
1542 },
1543 { /* 405EX Rev. D with Security */
1544 .pvr_mask = 0xffff000f,
1545 .pvr_value = 0x12910005,
1546 .cpu_name = "405EX Rev. D",
1547 .cpu_features = CPU_FTRS_40X,
1548 .cpu_user_features = PPC_FEATURE_32 |
1549 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1550 .mmu_features = MMU_FTR_TYPE_40x,
1551 .icache_bsize = 32,
1552 .dcache_bsize = 32,
1553 .machine_check = machine_check_4xx,
1554 .platform = "ppc405",
1555 },
1556 { /* 405EXr Rev. A/B without Security */
1557 .pvr_mask = 0xffff000f,
1558 .pvr_value = 0x12910001,
1559 .cpu_name = "405EXr Rev. A/B",
1560 .cpu_features = CPU_FTRS_40X,
1561 .cpu_user_features = PPC_FEATURE_32 |
1562 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1563 .mmu_features = MMU_FTR_TYPE_40x,
1564 .icache_bsize = 32,
1565 .dcache_bsize = 32,
1566 .machine_check = machine_check_4xx,
1567 .platform = "ppc405",
1568 },
1569 { /* 405EXr Rev. C without Security */
1570 .pvr_mask = 0xffff000f,
1571 .pvr_value = 0x12910009,
1572 .cpu_name = "405EXr Rev. C",
1573 .cpu_features = CPU_FTRS_40X,
1574 .cpu_user_features = PPC_FEATURE_32 |
1575 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1576 .mmu_features = MMU_FTR_TYPE_40x,
1577 .icache_bsize = 32,
1578 .dcache_bsize = 32,
1579 .machine_check = machine_check_4xx,
1580 .platform = "ppc405",
1581 },
1582 { /* 405EXr Rev. C with Security */
1583 .pvr_mask = 0xffff000f,
1584 .pvr_value = 0x1291000b,
1585 .cpu_name = "405EXr Rev. C",
1586 .cpu_features = CPU_FTRS_40X,
1587 .cpu_user_features = PPC_FEATURE_32 |
1588 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1589 .mmu_features = MMU_FTR_TYPE_40x,
1590 .icache_bsize = 32,
1591 .dcache_bsize = 32,
1592 .machine_check = machine_check_4xx,
1593 .platform = "ppc405",
1594 },
1595 { /* 405EXr Rev. D without Security */
1596 .pvr_mask = 0xffff000f,
1597 .pvr_value = 0x12910000,
1598 .cpu_name = "405EXr Rev. D",
1599 .cpu_features = CPU_FTRS_40X,
1600 .cpu_user_features = PPC_FEATURE_32 |
1601 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1602 .mmu_features = MMU_FTR_TYPE_40x,
1603 .icache_bsize = 32,
1604 .dcache_bsize = 32,
1605 .machine_check = machine_check_4xx,
1606 .platform = "ppc405",
1607 },
1608 { /* 405EXr Rev. D with Security */
1609 .pvr_mask = 0xffff000f,
1610 .pvr_value = 0x12910002,
1611 .cpu_name = "405EXr Rev. D",
1612 .cpu_features = CPU_FTRS_40X,
1613 .cpu_user_features = PPC_FEATURE_32 |
1614 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1615 .mmu_features = MMU_FTR_TYPE_40x,
1616 .icache_bsize = 32,
1617 .dcache_bsize = 32,
1618 .machine_check = machine_check_4xx,
1619 .platform = "ppc405",
1620 },
1621 {
1622 /* 405EZ */
1623 .pvr_mask = 0xffff0000,
1624 .pvr_value = 0x41510000,
1625 .cpu_name = "405EZ",
1626 .cpu_features = CPU_FTRS_40X,
1627 .cpu_user_features = PPC_FEATURE_32 |
1628 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1629 .mmu_features = MMU_FTR_TYPE_40x,
1630 .icache_bsize = 32,
1631 .dcache_bsize = 32,
1632 .machine_check = machine_check_4xx,
1633 .platform = "ppc405",
1634 },
1635 { /* APM8018X */
1636 .pvr_mask = 0xffff0000,
1637 .pvr_value = 0x7ff11432,
1638 .cpu_name = "APM8018X",
1639 .cpu_features = CPU_FTRS_40X,
1640 .cpu_user_features = PPC_FEATURE_32 |
1641 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1642 .mmu_features = MMU_FTR_TYPE_40x,
1643 .icache_bsize = 32,
1644 .dcache_bsize = 32,
1645 .machine_check = machine_check_4xx,
1646 .platform = "ppc405",
1647 },
1648 { /* default match */
1649 .pvr_mask = 0x00000000,
1650 .pvr_value = 0x00000000,
1651 .cpu_name = "(generic 40x PPC)",
1652 .cpu_features = CPU_FTRS_40X,
1653 .cpu_user_features = PPC_FEATURE_32 |
1654 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1655 .mmu_features = MMU_FTR_TYPE_40x,
1656 .icache_bsize = 32,
1657 .dcache_bsize = 32,
1658 .machine_check = machine_check_4xx,
1659 .platform = "ppc405",
1660 }
1661
1662 #endif /* CONFIG_40x */
1663 #ifdef CONFIG_44x
1664 {
1665 .pvr_mask = 0xf0000fff,
1666 .pvr_value = 0x40000850,
1667 .cpu_name = "440GR Rev. A",
1668 .cpu_features = CPU_FTRS_44X,
1669 .cpu_user_features = COMMON_USER_BOOKE,
1670 .mmu_features = MMU_FTR_TYPE_44x,
1671 .icache_bsize = 32,
1672 .dcache_bsize = 32,
1673 .machine_check = machine_check_4xx,
1674 .platform = "ppc440",
1675 },
1676 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1677 .pvr_mask = 0xf0000fff,
1678 .pvr_value = 0x40000858,
1679 .cpu_name = "440EP Rev. A",
1680 .cpu_features = CPU_FTRS_44X,
1681 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1682 .mmu_features = MMU_FTR_TYPE_44x,
1683 .icache_bsize = 32,
1684 .dcache_bsize = 32,
1685 .cpu_setup = __setup_cpu_440ep,
1686 .machine_check = machine_check_4xx,
1687 .platform = "ppc440",
1688 },
1689 {
1690 .pvr_mask = 0xf0000fff,
1691 .pvr_value = 0x400008d3,
1692 .cpu_name = "440GR Rev. B",
1693 .cpu_features = CPU_FTRS_44X,
1694 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1695 .mmu_features = MMU_FTR_TYPE_44x,
1696 .icache_bsize = 32,
1697 .dcache_bsize = 32,
1698 .machine_check = machine_check_4xx,
1699 .platform = "ppc440",
1700 },
1701 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1702 .pvr_mask = 0xf0000ff7,
1703 .pvr_value = 0x400008d4,
1704 .cpu_name = "440EP Rev. C",
1705 .cpu_features = CPU_FTRS_44X,
1706 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1707 .mmu_features = MMU_FTR_TYPE_44x,
1708 .icache_bsize = 32,
1709 .dcache_bsize = 32,
1710 .cpu_setup = __setup_cpu_440ep,
1711 .machine_check = machine_check_4xx,
1712 .platform = "ppc440",
1713 },
1714 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1715 .pvr_mask = 0xf0000fff,
1716 .pvr_value = 0x400008db,
1717 .cpu_name = "440EP Rev. B",
1718 .cpu_features = CPU_FTRS_44X,
1719 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1720 .mmu_features = MMU_FTR_TYPE_44x,
1721 .icache_bsize = 32,
1722 .dcache_bsize = 32,
1723 .cpu_setup = __setup_cpu_440ep,
1724 .machine_check = machine_check_4xx,
1725 .platform = "ppc440",
1726 },
1727 { /* 440GRX */
1728 .pvr_mask = 0xf0000ffb,
1729 .pvr_value = 0x200008D0,
1730 .cpu_name = "440GRX",
1731 .cpu_features = CPU_FTRS_44X,
1732 .cpu_user_features = COMMON_USER_BOOKE,
1733 .mmu_features = MMU_FTR_TYPE_44x,
1734 .icache_bsize = 32,
1735 .dcache_bsize = 32,
1736 .cpu_setup = __setup_cpu_440grx,
1737 .machine_check = machine_check_440A,
1738 .platform = "ppc440",
1739 },
1740 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1741 .pvr_mask = 0xf0000ffb,
1742 .pvr_value = 0x200008D8,
1743 .cpu_name = "440EPX",
1744 .cpu_features = CPU_FTRS_44X,
1745 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1746 .mmu_features = MMU_FTR_TYPE_44x,
1747 .icache_bsize = 32,
1748 .dcache_bsize = 32,
1749 .cpu_setup = __setup_cpu_440epx,
1750 .machine_check = machine_check_440A,
1751 .platform = "ppc440",
1752 },
1753 { /* 440GP Rev. B */
1754 .pvr_mask = 0xf0000fff,
1755 .pvr_value = 0x40000440,
1756 .cpu_name = "440GP Rev. B",
1757 .cpu_features = CPU_FTRS_44X,
1758 .cpu_user_features = COMMON_USER_BOOKE,
1759 .mmu_features = MMU_FTR_TYPE_44x,
1760 .icache_bsize = 32,
1761 .dcache_bsize = 32,
1762 .machine_check = machine_check_4xx,
1763 .platform = "ppc440gp",
1764 },
1765 { /* 440GP Rev. C */
1766 .pvr_mask = 0xf0000fff,
1767 .pvr_value = 0x40000481,
1768 .cpu_name = "440GP Rev. C",
1769 .cpu_features = CPU_FTRS_44X,
1770 .cpu_user_features = COMMON_USER_BOOKE,
1771 .mmu_features = MMU_FTR_TYPE_44x,
1772 .icache_bsize = 32,
1773 .dcache_bsize = 32,
1774 .machine_check = machine_check_4xx,
1775 .platform = "ppc440gp",
1776 },
1777 { /* 440GX Rev. A */
1778 .pvr_mask = 0xf0000fff,
1779 .pvr_value = 0x50000850,
1780 .cpu_name = "440GX Rev. A",
1781 .cpu_features = CPU_FTRS_44X,
1782 .cpu_user_features = COMMON_USER_BOOKE,
1783 .mmu_features = MMU_FTR_TYPE_44x,
1784 .icache_bsize = 32,
1785 .dcache_bsize = 32,
1786 .cpu_setup = __setup_cpu_440gx,
1787 .machine_check = machine_check_440A,
1788 .platform = "ppc440",
1789 },
1790 { /* 440GX Rev. B */
1791 .pvr_mask = 0xf0000fff,
1792 .pvr_value = 0x50000851,
1793 .cpu_name = "440GX Rev. B",
1794 .cpu_features = CPU_FTRS_44X,
1795 .cpu_user_features = COMMON_USER_BOOKE,
1796 .mmu_features = MMU_FTR_TYPE_44x,
1797 .icache_bsize = 32,
1798 .dcache_bsize = 32,
1799 .cpu_setup = __setup_cpu_440gx,
1800 .machine_check = machine_check_440A,
1801 .platform = "ppc440",
1802 },
1803 { /* 440GX Rev. C */
1804 .pvr_mask = 0xf0000fff,
1805 .pvr_value = 0x50000892,
1806 .cpu_name = "440GX Rev. C",
1807 .cpu_features = CPU_FTRS_44X,
1808 .cpu_user_features = COMMON_USER_BOOKE,
1809 .mmu_features = MMU_FTR_TYPE_44x,
1810 .icache_bsize = 32,
1811 .dcache_bsize = 32,
1812 .cpu_setup = __setup_cpu_440gx,
1813 .machine_check = machine_check_440A,
1814 .platform = "ppc440",
1815 },
1816 { /* 440GX Rev. F */
1817 .pvr_mask = 0xf0000fff,
1818 .pvr_value = 0x50000894,
1819 .cpu_name = "440GX Rev. F",
1820 .cpu_features = CPU_FTRS_44X,
1821 .cpu_user_features = COMMON_USER_BOOKE,
1822 .mmu_features = MMU_FTR_TYPE_44x,
1823 .icache_bsize = 32,
1824 .dcache_bsize = 32,
1825 .cpu_setup = __setup_cpu_440gx,
1826 .machine_check = machine_check_440A,
1827 .platform = "ppc440",
1828 },
1829 { /* 440SP Rev. A */
1830 .pvr_mask = 0xfff00fff,
1831 .pvr_value = 0x53200891,
1832 .cpu_name = "440SP Rev. A",
1833 .cpu_features = CPU_FTRS_44X,
1834 .cpu_user_features = COMMON_USER_BOOKE,
1835 .mmu_features = MMU_FTR_TYPE_44x,
1836 .icache_bsize = 32,
1837 .dcache_bsize = 32,
1838 .machine_check = machine_check_4xx,
1839 .platform = "ppc440",
1840 },
1841 { /* 440SPe Rev. A */
1842 .pvr_mask = 0xfff00fff,
1843 .pvr_value = 0x53400890,
1844 .cpu_name = "440SPe Rev. A",
1845 .cpu_features = CPU_FTRS_44X,
1846 .cpu_user_features = COMMON_USER_BOOKE,
1847 .mmu_features = MMU_FTR_TYPE_44x,
1848 .icache_bsize = 32,
1849 .dcache_bsize = 32,
1850 .cpu_setup = __setup_cpu_440spe,
1851 .machine_check = machine_check_440A,
1852 .platform = "ppc440",
1853 },
1854 { /* 440SPe Rev. B */
1855 .pvr_mask = 0xfff00fff,
1856 .pvr_value = 0x53400891,
1857 .cpu_name = "440SPe Rev. B",
1858 .cpu_features = CPU_FTRS_44X,
1859 .cpu_user_features = COMMON_USER_BOOKE,
1860 .mmu_features = MMU_FTR_TYPE_44x,
1861 .icache_bsize = 32,
1862 .dcache_bsize = 32,
1863 .cpu_setup = __setup_cpu_440spe,
1864 .machine_check = machine_check_440A,
1865 .platform = "ppc440",
1866 },
1867 { /* 440 in Xilinx Virtex-5 FXT */
1868 .pvr_mask = 0xfffffff0,
1869 .pvr_value = 0x7ff21910,
1870 .cpu_name = "440 in Virtex-5 FXT",
1871 .cpu_features = CPU_FTRS_44X,
1872 .cpu_user_features = COMMON_USER_BOOKE,
1873 .mmu_features = MMU_FTR_TYPE_44x,
1874 .icache_bsize = 32,
1875 .dcache_bsize = 32,
1876 .cpu_setup = __setup_cpu_440x5,
1877 .machine_check = machine_check_440A,
1878 .platform = "ppc440",
1879 },
1880 { /* 460EX */
1881 .pvr_mask = 0xffff0006,
1882 .pvr_value = 0x13020002,
1883 .cpu_name = "460EX",
1884 .cpu_features = CPU_FTRS_440x6,
1885 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1886 .mmu_features = MMU_FTR_TYPE_44x,
1887 .icache_bsize = 32,
1888 .dcache_bsize = 32,
1889 .cpu_setup = __setup_cpu_460ex,
1890 .machine_check = machine_check_440A,
1891 .platform = "ppc440",
1892 },
1893 { /* 460EX Rev B */
1894 .pvr_mask = 0xffff0007,
1895 .pvr_value = 0x13020004,
1896 .cpu_name = "460EX Rev. B",
1897 .cpu_features = CPU_FTRS_440x6,
1898 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1899 .mmu_features = MMU_FTR_TYPE_44x,
1900 .icache_bsize = 32,
1901 .dcache_bsize = 32,
1902 .cpu_setup = __setup_cpu_460ex,
1903 .machine_check = machine_check_440A,
1904 .platform = "ppc440",
1905 },
1906 { /* 460GT */
1907 .pvr_mask = 0xffff0006,
1908 .pvr_value = 0x13020000,
1909 .cpu_name = "460GT",
1910 .cpu_features = CPU_FTRS_440x6,
1911 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1912 .mmu_features = MMU_FTR_TYPE_44x,
1913 .icache_bsize = 32,
1914 .dcache_bsize = 32,
1915 .cpu_setup = __setup_cpu_460gt,
1916 .machine_check = machine_check_440A,
1917 .platform = "ppc440",
1918 },
1919 { /* 460GT Rev B */
1920 .pvr_mask = 0xffff0007,
1921 .pvr_value = 0x13020005,
1922 .cpu_name = "460GT Rev. B",
1923 .cpu_features = CPU_FTRS_440x6,
1924 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1925 .mmu_features = MMU_FTR_TYPE_44x,
1926 .icache_bsize = 32,
1927 .dcache_bsize = 32,
1928 .cpu_setup = __setup_cpu_460gt,
1929 .machine_check = machine_check_440A,
1930 .platform = "ppc440",
1931 },
1932 { /* 460SX */
1933 .pvr_mask = 0xffffff00,
1934 .pvr_value = 0x13541800,
1935 .cpu_name = "460SX",
1936 .cpu_features = CPU_FTRS_44X,
1937 .cpu_user_features = COMMON_USER_BOOKE,
1938 .mmu_features = MMU_FTR_TYPE_44x,
1939 .icache_bsize = 32,
1940 .dcache_bsize = 32,
1941 .cpu_setup = __setup_cpu_460sx,
1942 .machine_check = machine_check_440A,
1943 .platform = "ppc440",
1944 },
1945 { /* 464 in APM821xx */
1946 .pvr_mask = 0xfffffff0,
1947 .pvr_value = 0x12C41C80,
1948 .cpu_name = "APM821XX",
1949 .cpu_features = CPU_FTRS_44X,
1950 .cpu_user_features = COMMON_USER_BOOKE |
1951 PPC_FEATURE_HAS_FPU,
1952 .mmu_features = MMU_FTR_TYPE_44x,
1953 .icache_bsize = 32,
1954 .dcache_bsize = 32,
1955 .cpu_setup = __setup_cpu_apm821xx,
1956 .machine_check = machine_check_440A,
1957 .platform = "ppc440",
1958 },
1959 #ifdef CONFIG_PPC_47x
1960 { /* 476 DD2 core */
1961 .pvr_mask = 0xffffffff,
1962 .pvr_value = 0x11a52080,
1963 .cpu_name = "476",
1964 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1965 .cpu_user_features = COMMON_USER_BOOKE |
1966 PPC_FEATURE_HAS_FPU,
1967 .mmu_features = MMU_FTR_TYPE_47x |
1968 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1969 .icache_bsize = 32,
1970 .dcache_bsize = 128,
1971 .machine_check = machine_check_47x,
1972 .platform = "ppc470",
1973 },
1974 { /* 476fpe */
1975 .pvr_mask = 0xffff0000,
1976 .pvr_value = 0x7ff50000,
1977 .cpu_name = "476fpe",
1978 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1979 .cpu_user_features = COMMON_USER_BOOKE |
1980 PPC_FEATURE_HAS_FPU,
1981 .mmu_features = MMU_FTR_TYPE_47x |
1982 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1983 .icache_bsize = 32,
1984 .dcache_bsize = 128,
1985 .machine_check = machine_check_47x,
1986 .platform = "ppc470",
1987 },
1988 { /* 476 iss */
1989 .pvr_mask = 0xffff0000,
1990 .pvr_value = 0x00050000,
1991 .cpu_name = "476",
1992 .cpu_features = CPU_FTRS_47X,
1993 .cpu_user_features = COMMON_USER_BOOKE |
1994 PPC_FEATURE_HAS_FPU,
1995 .mmu_features = MMU_FTR_TYPE_47x |
1996 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1997 .icache_bsize = 32,
1998 .dcache_bsize = 128,
1999 .machine_check = machine_check_47x,
2000 .platform = "ppc470",
2001 },
2002 { /* 476 others */
2003 .pvr_mask = 0xffff0000,
2004 .pvr_value = 0x11a50000,
2005 .cpu_name = "476",
2006 .cpu_features = CPU_FTRS_47X,
2007 .cpu_user_features = COMMON_USER_BOOKE |
2008 PPC_FEATURE_HAS_FPU,
2009 .mmu_features = MMU_FTR_TYPE_47x |
2010 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
2011 .icache_bsize = 32,
2012 .dcache_bsize = 128,
2013 .machine_check = machine_check_47x,
2014 .platform = "ppc470",
2015 },
2016 #endif /* CONFIG_PPC_47x */
2017 { /* default match */
2018 .pvr_mask = 0x00000000,
2019 .pvr_value = 0x00000000,
2020 .cpu_name = "(generic 44x PPC)",
2021 .cpu_features = CPU_FTRS_44X,
2022 .cpu_user_features = COMMON_USER_BOOKE,
2023 .mmu_features = MMU_FTR_TYPE_44x,
2024 .icache_bsize = 32,
2025 .dcache_bsize = 32,
2026 .machine_check = machine_check_4xx,
2027 .platform = "ppc440",
2028 }
2029 #endif /* CONFIG_44x */
2030 #ifdef CONFIG_E200
2031 { /* e200z5 */
2032 .pvr_mask = 0xfff00000,
2033 .pvr_value = 0x81000000,
2034 .cpu_name = "e200z5",
2035 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2036 .cpu_features = CPU_FTRS_E200,
2037 .cpu_user_features = COMMON_USER_BOOKE |
2038 PPC_FEATURE_HAS_EFP_SINGLE |
2039 PPC_FEATURE_UNIFIED_CACHE,
2040 .mmu_features = MMU_FTR_TYPE_FSL_E,
2041 .dcache_bsize = 32,
2042 .machine_check = machine_check_e200,
2043 .platform = "ppc5554",
2044 },
2045 { /* e200z6 */
2046 .pvr_mask = 0xfff00000,
2047 .pvr_value = 0x81100000,
2048 .cpu_name = "e200z6",
2049 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2050 .cpu_features = CPU_FTRS_E200,
2051 .cpu_user_features = COMMON_USER_BOOKE |
2052 PPC_FEATURE_HAS_SPE_COMP |
2053 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2054 PPC_FEATURE_UNIFIED_CACHE,
2055 .mmu_features = MMU_FTR_TYPE_FSL_E,
2056 .dcache_bsize = 32,
2057 .machine_check = machine_check_e200,
2058 .platform = "ppc5554",
2059 },
2060 { /* default match */
2061 .pvr_mask = 0x00000000,
2062 .pvr_value = 0x00000000,
2063 .cpu_name = "(generic E200 PPC)",
2064 .cpu_features = CPU_FTRS_E200,
2065 .cpu_user_features = COMMON_USER_BOOKE |
2066 PPC_FEATURE_HAS_EFP_SINGLE |
2067 PPC_FEATURE_UNIFIED_CACHE,
2068 .mmu_features = MMU_FTR_TYPE_FSL_E,
2069 .dcache_bsize = 32,
2070 .cpu_setup = __setup_cpu_e200,
2071 .machine_check = machine_check_e200,
2072 .platform = "ppc5554",
2073 }
2074 #endif /* CONFIG_E200 */
2075 #endif /* CONFIG_PPC32 */
2076 #ifdef CONFIG_E500
2077 #ifdef CONFIG_PPC32
2078 #ifndef CONFIG_PPC_E500MC
2079 { /* e500 */
2080 .pvr_mask = 0xffff0000,
2081 .pvr_value = 0x80200000,
2082 .cpu_name = "e500",
2083 .cpu_features = CPU_FTRS_E500,
2084 .cpu_user_features = COMMON_USER_BOOKE |
2085 PPC_FEATURE_HAS_SPE_COMP |
2086 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2087 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2088 .mmu_features = MMU_FTR_TYPE_FSL_E,
2089 .icache_bsize = 32,
2090 .dcache_bsize = 32,
2091 .num_pmcs = 4,
2092 .oprofile_cpu_type = "ppc/e500",
2093 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2094 .cpu_setup = __setup_cpu_e500v1,
2095 .machine_check = machine_check_e500,
2096 .platform = "ppc8540",
2097 },
2098 { /* e500v2 */
2099 .pvr_mask = 0xffff0000,
2100 .pvr_value = 0x80210000,
2101 .cpu_name = "e500v2",
2102 .cpu_features = CPU_FTRS_E500_2,
2103 .cpu_user_features = COMMON_USER_BOOKE |
2104 PPC_FEATURE_HAS_SPE_COMP |
2105 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2106 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2107 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2108 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2109 .icache_bsize = 32,
2110 .dcache_bsize = 32,
2111 .num_pmcs = 4,
2112 .oprofile_cpu_type = "ppc/e500",
2113 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2114 .cpu_setup = __setup_cpu_e500v2,
2115 .machine_check = machine_check_e500,
2116 .platform = "ppc8548",
2117 .cpu_down_flush = cpu_down_flush_e500v2,
2118 },
2119 #else
2120 { /* e500mc */
2121 .pvr_mask = 0xffff0000,
2122 .pvr_value = 0x80230000,
2123 .cpu_name = "e500mc",
2124 .cpu_features = CPU_FTRS_E500MC,
2125 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2126 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2127 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2128 MMU_FTR_USE_TLBILX,
2129 .icache_bsize = 64,
2130 .dcache_bsize = 64,
2131 .num_pmcs = 4,
2132 .oprofile_cpu_type = "ppc/e500mc",
2133 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2134 .cpu_setup = __setup_cpu_e500mc,
2135 .machine_check = machine_check_e500mc,
2136 .platform = "ppce500mc",
2137 .cpu_down_flush = cpu_down_flush_e500mc,
2138 },
2139 #endif /* CONFIG_PPC_E500MC */
2140 #endif /* CONFIG_PPC32 */
2141 #ifdef CONFIG_PPC_E500MC
2142 { /* e5500 */
2143 .pvr_mask = 0xffff0000,
2144 .pvr_value = 0x80240000,
2145 .cpu_name = "e5500",
2146 .cpu_features = CPU_FTRS_E5500,
2147 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2148 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2149 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2150 MMU_FTR_USE_TLBILX,
2151 .icache_bsize = 64,
2152 .dcache_bsize = 64,
2153 .num_pmcs = 4,
2154 .oprofile_cpu_type = "ppc/e500mc",
2155 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2156 .cpu_setup = __setup_cpu_e5500,
2157 #ifndef CONFIG_PPC32
2158 .cpu_restore = __restore_cpu_e5500,
2159 #endif
2160 .machine_check = machine_check_e500mc,
2161 .platform = "ppce5500",
2162 .cpu_down_flush = cpu_down_flush_e5500,
2163 },
2164 { /* e6500 */
2165 .pvr_mask = 0xffff0000,
2166 .pvr_value = 0x80400000,
2167 .cpu_name = "e6500",
2168 .cpu_features = CPU_FTRS_E6500,
2169 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2170 PPC_FEATURE_HAS_ALTIVEC_COMP,
2171 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2172 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2173 MMU_FTR_USE_TLBILX,
2174 .icache_bsize = 64,
2175 .dcache_bsize = 64,
2176 .num_pmcs = 6,
2177 .oprofile_cpu_type = "ppc/e6500",
2178 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2179 .cpu_setup = __setup_cpu_e6500,
2180 #ifndef CONFIG_PPC32
2181 .cpu_restore = __restore_cpu_e6500,
2182 #endif
2183 .machine_check = machine_check_e500mc,
2184 .platform = "ppce6500",
2185 .cpu_down_flush = cpu_down_flush_e6500,
2186 },
2187 #endif /* CONFIG_PPC_E500MC */
2188 #ifdef CONFIG_PPC32
2189 { /* default match */
2190 .pvr_mask = 0x00000000,
2191 .pvr_value = 0x00000000,
2192 .cpu_name = "(generic E500 PPC)",
2193 .cpu_features = CPU_FTRS_E500,
2194 .cpu_user_features = COMMON_USER_BOOKE |
2195 PPC_FEATURE_HAS_SPE_COMP |
2196 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2197 .mmu_features = MMU_FTR_TYPE_FSL_E,
2198 .icache_bsize = 32,
2199 .dcache_bsize = 32,
2200 .machine_check = machine_check_e500,
2201 .platform = "powerpc",
2202 }
2203 #endif /* CONFIG_PPC32 */
2204 #endif /* CONFIG_E500 */
2205 };
2206
2207 void __init set_cur_cpu_spec(struct cpu_spec *s)
2208 {
2209 struct cpu_spec *t = &the_cpu_spec;
2210
2211 t = PTRRELOC(t);
2212 *t = *s;
2213
2214 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2215 }
2216
2217 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2218 struct cpu_spec *s)
2219 {
2220 struct cpu_spec *t = &the_cpu_spec;
2221 struct cpu_spec old;
2222
2223 t = PTRRELOC(t);
2224 old = *t;
2225
2226 /* Copy everything, then do fixups */
2227 *t = *s;
2228
2229 /*
2230 * If we are overriding a previous value derived from the real
2231 * PVR with a new value obtained using a logical PVR value,
2232 * don't modify the performance monitor fields.
2233 */
2234 if (old.num_pmcs && !s->num_pmcs) {
2235 t->num_pmcs = old.num_pmcs;
2236 t->pmc_type = old.pmc_type;
2237 t->oprofile_type = old.oprofile_type;
2238 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2239 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2240 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2241
2242 /*
2243 * If we have passed through this logic once before and
2244 * have pulled the default case because the real PVR was
2245 * not found inside cpu_specs[], then we are possibly
2246 * running in compatibility mode. In that case, let the
2247 * oprofiler know which set of compatibility counters to
2248 * pull from by making sure the oprofile_cpu_type string
2249 * is set to that of compatibility mode. If the
2250 * oprofile_cpu_type already has a value, then we are
2251 * possibly overriding a real PVR with a logical one,
2252 * and, in that case, keep the current value for
2253 * oprofile_cpu_type.
2254 */
2255 if (old.oprofile_cpu_type != NULL) {
2256 t->oprofile_cpu_type = old.oprofile_cpu_type;
2257 t->oprofile_type = old.oprofile_type;
2258 }
2259 }
2260
2261 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2262
2263 /*
2264 * Set the base platform string once; assumes
2265 * we're called with real pvr first.
2266 */
2267 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2268 *PTRRELOC(&powerpc_base_platform) = t->platform;
2269
2270 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2271 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2272 * that processor. I will consolidate that at a later time, for now,
2273 * just use #ifdef. We also don't need to PTRRELOC the function
2274 * pointer on ppc64 and booke as we are running at 0 in real mode
2275 * on ppc64 and reloc_offset is always 0 on booke.
2276 */
2277 if (t->cpu_setup) {
2278 t->cpu_setup(offset, t);
2279 }
2280 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2281
2282 return t;
2283 }
2284
2285 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2286 {
2287 struct cpu_spec *s = cpu_specs;
2288 int i;
2289
2290 s = PTRRELOC(s);
2291
2292 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2293 if ((pvr & s->pvr_mask) == s->pvr_value)
2294 return setup_cpu_spec(offset, s);
2295 }
2296
2297 BUG();
2298
2299 return NULL;
2300 }
2301
2302 /*
2303 * Used by cpufeatures to get the name for CPUs with a PVR table.
2304 * If they don't hae a PVR table, cpufeatures gets the name from
2305 * cpu device-tree node.
2306 */
2307 void __init identify_cpu_name(unsigned int pvr)
2308 {
2309 struct cpu_spec *s = cpu_specs;
2310 struct cpu_spec *t = &the_cpu_spec;
2311 int i;
2312
2313 s = PTRRELOC(s);
2314 t = PTRRELOC(t);
2315
2316 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2317 if ((pvr & s->pvr_mask) == s->pvr_value) {
2318 t->cpu_name = s->cpu_name;
2319 return;
2320 }
2321 }
2322 }
2323
2324
2325 #ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
2326 struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
2327 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2328 };
2329 EXPORT_SYMBOL_GPL(cpu_feature_keys);
2330
2331 void __init cpu_feature_keys_init(void)
2332 {
2333 int i;
2334
2335 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
2336 unsigned long f = 1ul << i;
2337
2338 if (!(cur_cpu_spec->cpu_features & f))
2339 static_branch_disable(&cpu_feature_keys[i]);
2340 }
2341 }
2342
2343 struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
2344 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2345 };
2346 EXPORT_SYMBOL_GPL(mmu_feature_keys);
2347
2348 void __init mmu_feature_keys_init(void)
2349 {
2350 int i;
2351
2352 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
2353 unsigned long f = 1ul << i;
2354
2355 if (!(cur_cpu_spec->mmu_features & f))
2356 static_branch_disable(&mmu_feature_keys[i]);
2357 }
2358 }
2359 #endif
CRIS linux kernel tree