Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[cris-mirror.git] / drivers / hsi / controllers / omap_ssi.c
blob27b91f14ba7a6319e12a49893c70aa47e76aebfa
1 /* OMAP SSI driver.
3 * Copyright (C) 2010 Nokia Corporation. All rights reserved.
4 * Copyright (C) 2014 Sebastian Reichel <sre@kernel.org>
6 * Contact: Carlos Chinea <carlos.chinea@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
23 #include <linux/compiler.h>
24 #include <linux/err.h>
25 #include <linux/ioport.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/clk.h>
29 #include <linux/device.h>
30 #include <linux/platform_device.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/dmaengine.h>
33 #include <linux/delay.h>
34 #include <linux/seq_file.h>
35 #include <linux/scatterlist.h>
36 #include <linux/interrupt.h>
37 #include <linux/spinlock.h>
38 #include <linux/debugfs.h>
39 #include <linux/pm_runtime.h>
40 #include <linux/of_platform.h>
41 #include <linux/hsi/hsi.h>
42 #include <linux/idr.h>
44 #include "omap_ssi_regs.h"
45 #include "omap_ssi.h"
47 /* For automatically allocated device IDs */
48 static DEFINE_IDA(platform_omap_ssi_ida);
50 #ifdef CONFIG_DEBUG_FS
51 static int ssi_debug_show(struct seq_file *m, void *p __maybe_unused)
53 struct hsi_controller *ssi = m->private;
54 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
55 void __iomem *sys = omap_ssi->sys;
57 pm_runtime_get_sync(ssi->device.parent);
58 seq_printf(m, "REVISION\t: 0x%08x\n", readl(sys + SSI_REVISION_REG));
59 seq_printf(m, "SYSCONFIG\t: 0x%08x\n", readl(sys + SSI_SYSCONFIG_REG));
60 seq_printf(m, "SYSSTATUS\t: 0x%08x\n", readl(sys + SSI_SYSSTATUS_REG));
61 pm_runtime_put_sync(ssi->device.parent);
63 return 0;
66 static int ssi_debug_gdd_show(struct seq_file *m, void *p __maybe_unused)
68 struct hsi_controller *ssi = m->private;
69 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
70 void __iomem *gdd = omap_ssi->gdd;
71 void __iomem *sys = omap_ssi->sys;
72 int lch;
74 pm_runtime_get_sync(ssi->device.parent);
76 seq_printf(m, "GDD_MPU_STATUS\t: 0x%08x\n",
77 readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG));
78 seq_printf(m, "GDD_MPU_ENABLE\t: 0x%08x\n\n",
79 readl(sys + SSI_GDD_MPU_IRQ_ENABLE_REG));
80 seq_printf(m, "HW_ID\t\t: 0x%08x\n",
81 readl(gdd + SSI_GDD_HW_ID_REG));
82 seq_printf(m, "PPORT_ID\t: 0x%08x\n",
83 readl(gdd + SSI_GDD_PPORT_ID_REG));
84 seq_printf(m, "MPORT_ID\t: 0x%08x\n",
85 readl(gdd + SSI_GDD_MPORT_ID_REG));
86 seq_printf(m, "TEST\t\t: 0x%08x\n",
87 readl(gdd + SSI_GDD_TEST_REG));
88 seq_printf(m, "GCR\t\t: 0x%08x\n",
89 readl(gdd + SSI_GDD_GCR_REG));
91 for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
92 seq_printf(m, "\nGDD LCH %d\n=========\n", lch);
93 seq_printf(m, "CSDP\t\t: 0x%04x\n",
94 readw(gdd + SSI_GDD_CSDP_REG(lch)));
95 seq_printf(m, "CCR\t\t: 0x%04x\n",
96 readw(gdd + SSI_GDD_CCR_REG(lch)));
97 seq_printf(m, "CICR\t\t: 0x%04x\n",
98 readw(gdd + SSI_GDD_CICR_REG(lch)));
99 seq_printf(m, "CSR\t\t: 0x%04x\n",
100 readw(gdd + SSI_GDD_CSR_REG(lch)));
101 seq_printf(m, "CSSA\t\t: 0x%08x\n",
102 readl(gdd + SSI_GDD_CSSA_REG(lch)));
103 seq_printf(m, "CDSA\t\t: 0x%08x\n",
104 readl(gdd + SSI_GDD_CDSA_REG(lch)));
105 seq_printf(m, "CEN\t\t: 0x%04x\n",
106 readw(gdd + SSI_GDD_CEN_REG(lch)));
107 seq_printf(m, "CSAC\t\t: 0x%04x\n",
108 readw(gdd + SSI_GDD_CSAC_REG(lch)));
109 seq_printf(m, "CDAC\t\t: 0x%04x\n",
110 readw(gdd + SSI_GDD_CDAC_REG(lch)));
111 seq_printf(m, "CLNK_CTRL\t: 0x%04x\n",
112 readw(gdd + SSI_GDD_CLNK_CTRL_REG(lch)));
115 pm_runtime_put_sync(ssi->device.parent);
117 return 0;
120 static int ssi_regs_open(struct inode *inode, struct file *file)
122 return single_open(file, ssi_debug_show, inode->i_private);
125 static int ssi_gdd_regs_open(struct inode *inode, struct file *file)
127 return single_open(file, ssi_debug_gdd_show, inode->i_private);
130 static const struct file_operations ssi_regs_fops = {
131 .open = ssi_regs_open,
132 .read = seq_read,
133 .llseek = seq_lseek,
134 .release = single_release,
137 static const struct file_operations ssi_gdd_regs_fops = {
138 .open = ssi_gdd_regs_open,
139 .read = seq_read,
140 .llseek = seq_lseek,
141 .release = single_release,
144 static int __init ssi_debug_add_ctrl(struct hsi_controller *ssi)
146 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
147 struct dentry *dir;
149 /* SSI controller */
150 omap_ssi->dir = debugfs_create_dir(dev_name(&ssi->device), NULL);
151 if (!omap_ssi->dir)
152 return -ENOMEM;
154 debugfs_create_file("regs", S_IRUGO, omap_ssi->dir, ssi,
155 &ssi_regs_fops);
156 /* SSI GDD (DMA) */
157 dir = debugfs_create_dir("gdd", omap_ssi->dir);
158 if (!dir)
159 goto rback;
160 debugfs_create_file("regs", S_IRUGO, dir, ssi, &ssi_gdd_regs_fops);
162 return 0;
163 rback:
164 debugfs_remove_recursive(omap_ssi->dir);
166 return -ENOMEM;
169 static void ssi_debug_remove_ctrl(struct hsi_controller *ssi)
171 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
173 debugfs_remove_recursive(omap_ssi->dir);
175 #endif /* CONFIG_DEBUG_FS */
178 * FIXME: Horrible HACK needed until we remove the useless wakeline test
179 * in the CMT. To be removed !!!!
181 void ssi_waketest(struct hsi_client *cl, unsigned int enable)
183 struct hsi_port *port = hsi_get_port(cl);
184 struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
185 struct hsi_controller *ssi = to_hsi_controller(port->device.parent);
186 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
188 omap_port->wktest = !!enable;
189 if (omap_port->wktest) {
190 pm_runtime_get_sync(ssi->device.parent);
191 writel_relaxed(SSI_WAKE(0),
192 omap_ssi->sys + SSI_SET_WAKE_REG(port->num));
193 } else {
194 writel_relaxed(SSI_WAKE(0),
195 omap_ssi->sys + SSI_CLEAR_WAKE_REG(port->num));
196 pm_runtime_put_sync(ssi->device.parent);
199 EXPORT_SYMBOL_GPL(ssi_waketest);
201 static void ssi_gdd_complete(struct hsi_controller *ssi, unsigned int lch)
203 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
204 struct hsi_msg *msg = omap_ssi->gdd_trn[lch].msg;
205 struct hsi_port *port = to_hsi_port(msg->cl->device.parent);
206 struct omap_ssi_port *omap_port = hsi_port_drvdata(port);
207 unsigned int dir;
208 u32 csr;
209 u32 val;
211 spin_lock(&omap_ssi->lock);
213 val = readl(omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
214 val &= ~SSI_GDD_LCH(lch);
215 writel_relaxed(val, omap_ssi->sys + SSI_GDD_MPU_IRQ_ENABLE_REG);
217 if (msg->ttype == HSI_MSG_READ) {
218 dir = DMA_FROM_DEVICE;
219 val = SSI_DATAAVAILABLE(msg->channel);
220 pm_runtime_put_sync(ssi->device.parent);
221 } else {
222 dir = DMA_TO_DEVICE;
223 val = SSI_DATAACCEPT(msg->channel);
224 /* Keep clocks reference for write pio event */
226 dma_unmap_sg(&ssi->device, msg->sgt.sgl, msg->sgt.nents, dir);
227 csr = readw(omap_ssi->gdd + SSI_GDD_CSR_REG(lch));
228 omap_ssi->gdd_trn[lch].msg = NULL; /* release GDD lch */
229 dev_dbg(&port->device, "DMA completed ch %d ttype %d\n",
230 msg->channel, msg->ttype);
231 spin_unlock(&omap_ssi->lock);
232 if (csr & SSI_CSR_TOUR) { /* Timeout error */
233 msg->status = HSI_STATUS_ERROR;
234 msg->actual_len = 0;
235 spin_lock(&omap_port->lock);
236 list_del(&msg->link); /* Dequeue msg */
237 spin_unlock(&omap_port->lock);
238 msg->complete(msg);
239 return;
241 spin_lock(&omap_port->lock);
242 val |= readl(omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
243 writel_relaxed(val, omap_ssi->sys + SSI_MPU_ENABLE_REG(port->num, 0));
244 spin_unlock(&omap_port->lock);
246 msg->status = HSI_STATUS_COMPLETED;
247 msg->actual_len = sg_dma_len(msg->sgt.sgl);
250 static void ssi_gdd_tasklet(unsigned long dev)
252 struct hsi_controller *ssi = (struct hsi_controller *)dev;
253 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
254 void __iomem *sys = omap_ssi->sys;
255 unsigned int lch;
256 u32 status_reg;
258 pm_runtime_get_sync(ssi->device.parent);
260 status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
261 for (lch = 0; lch < SSI_MAX_GDD_LCH; lch++) {
262 if (status_reg & SSI_GDD_LCH(lch))
263 ssi_gdd_complete(ssi, lch);
265 writel_relaxed(status_reg, sys + SSI_GDD_MPU_IRQ_STATUS_REG);
266 status_reg = readl(sys + SSI_GDD_MPU_IRQ_STATUS_REG);
268 pm_runtime_put_sync(ssi->device.parent);
270 if (status_reg)
271 tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
272 else
273 enable_irq(omap_ssi->gdd_irq);
277 static irqreturn_t ssi_gdd_isr(int irq, void *ssi)
279 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
281 tasklet_hi_schedule(&omap_ssi->gdd_tasklet);
282 disable_irq_nosync(irq);
284 return IRQ_HANDLED;
287 static unsigned long ssi_get_clk_rate(struct hsi_controller *ssi)
289 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
290 unsigned long rate = clk_get_rate(omap_ssi->fck);
291 return rate;
294 static int __init ssi_get_iomem(struct platform_device *pd,
295 const char *name, void __iomem **pbase, dma_addr_t *phy)
297 struct resource *mem;
298 void __iomem *base;
299 struct hsi_controller *ssi = platform_get_drvdata(pd);
301 mem = platform_get_resource_byname(pd, IORESOURCE_MEM, name);
302 base = devm_ioremap_resource(&ssi->device, mem);
303 if (IS_ERR(base))
304 return PTR_ERR(base);
306 *pbase = base;
308 if (phy)
309 *phy = mem->start;
311 return 0;
314 static int __init ssi_add_controller(struct hsi_controller *ssi,
315 struct platform_device *pd)
317 struct omap_ssi_controller *omap_ssi;
318 int err;
320 omap_ssi = devm_kzalloc(&ssi->device, sizeof(*omap_ssi), GFP_KERNEL);
321 if (!omap_ssi) {
322 dev_err(&pd->dev, "not enough memory for omap ssi\n");
323 return -ENOMEM;
326 err = ida_simple_get(&platform_omap_ssi_ida, 0, 0, GFP_KERNEL);
327 if (err < 0)
328 goto out_err;
329 ssi->id = err;
331 ssi->owner = THIS_MODULE;
332 ssi->device.parent = &pd->dev;
333 dev_set_name(&ssi->device, "ssi%d", ssi->id);
334 hsi_controller_set_drvdata(ssi, omap_ssi);
335 omap_ssi->dev = &ssi->device;
336 err = ssi_get_iomem(pd, "sys", &omap_ssi->sys, NULL);
337 if (err < 0)
338 goto out_err;
339 err = ssi_get_iomem(pd, "gdd", &omap_ssi->gdd, NULL);
340 if (err < 0)
341 goto out_err;
342 err = platform_get_irq_byname(pd, "gdd_mpu");
343 if (err < 0) {
344 dev_err(&pd->dev, "GDD IRQ resource missing\n");
345 goto out_err;
347 omap_ssi->gdd_irq = err;
348 tasklet_init(&omap_ssi->gdd_tasklet, ssi_gdd_tasklet,
349 (unsigned long)ssi);
350 err = devm_request_irq(&ssi->device, omap_ssi->gdd_irq, ssi_gdd_isr,
351 0, "gdd_mpu", ssi);
352 if (err < 0) {
353 dev_err(&ssi->device, "Request GDD IRQ %d failed (%d)",
354 omap_ssi->gdd_irq, err);
355 goto out_err;
358 omap_ssi->port = devm_kzalloc(&ssi->device,
359 sizeof(struct omap_ssi_port *) * ssi->num_ports, GFP_KERNEL);
360 if (!omap_ssi->port) {
361 err = -ENOMEM;
362 goto out_err;
365 omap_ssi->fck = devm_clk_get(&ssi->device, "ssi_ssr_fck");
366 if (IS_ERR(omap_ssi->fck)) {
367 dev_err(&pd->dev, "Could not acquire clock \"ssi_ssr_fck\": %li\n",
368 PTR_ERR(omap_ssi->fck));
369 err = -ENODEV;
370 goto out_err;
373 /* TODO: find register, which can be used to detect context loss */
374 omap_ssi->get_loss = NULL;
376 omap_ssi->max_speed = UINT_MAX;
377 spin_lock_init(&omap_ssi->lock);
378 err = hsi_register_controller(ssi);
380 if (err < 0)
381 goto out_err;
383 return 0;
385 out_err:
386 ida_simple_remove(&platform_omap_ssi_ida, ssi->id);
387 return err;
390 static int __init ssi_hw_init(struct hsi_controller *ssi)
392 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
393 unsigned int i;
394 u32 val;
395 int err;
397 err = pm_runtime_get_sync(ssi->device.parent);
398 if (err < 0) {
399 dev_err(&ssi->device, "runtime PM failed %d\n", err);
400 return err;
402 /* Reseting SSI controller */
403 writel_relaxed(SSI_SOFTRESET, omap_ssi->sys + SSI_SYSCONFIG_REG);
404 val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
405 for (i = 0; ((i < 20) && !(val & SSI_RESETDONE)); i++) {
406 msleep(20);
407 val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG);
409 if (!(val & SSI_RESETDONE)) {
410 dev_err(&ssi->device, "SSI HW reset failed\n");
411 pm_runtime_put_sync(ssi->device.parent);
412 return -EIO;
414 /* Reseting GDD */
415 writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG);
416 /* Get FCK rate in KHz */
417 omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000);
418 dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate);
419 /* Set default PM settings */
420 val = SSI_AUTOIDLE | SSI_SIDLEMODE_SMART | SSI_MIDLEMODE_SMART;
421 writel_relaxed(val, omap_ssi->sys + SSI_SYSCONFIG_REG);
422 omap_ssi->sysconfig = val;
423 writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG);
424 omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON;
425 pm_runtime_put_sync(ssi->device.parent);
427 return 0;
430 static void ssi_remove_controller(struct hsi_controller *ssi)
432 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
433 int id = ssi->id;
434 tasklet_kill(&omap_ssi->gdd_tasklet);
435 hsi_unregister_controller(ssi);
436 ida_simple_remove(&platform_omap_ssi_ida, id);
439 static inline int ssi_of_get_available_ports_count(const struct device_node *np)
441 struct device_node *child;
442 int num = 0;
444 for_each_available_child_of_node(np, child)
445 if (of_device_is_compatible(child, "ti,omap3-ssi-port"))
446 num++;
448 return num;
451 static int ssi_remove_ports(struct device *dev, void *c)
453 struct platform_device *pdev = to_platform_device(dev);
455 of_device_unregister(pdev);
457 return 0;
460 static int __init ssi_probe(struct platform_device *pd)
462 struct platform_device *childpdev;
463 struct device_node *np = pd->dev.of_node;
464 struct device_node *child;
465 struct hsi_controller *ssi;
466 int err;
467 int num_ports;
469 if (!np) {
470 dev_err(&pd->dev, "missing device tree data\n");
471 return -EINVAL;
474 num_ports = ssi_of_get_available_ports_count(np);
476 ssi = hsi_alloc_controller(num_ports, GFP_KERNEL);
477 if (!ssi) {
478 dev_err(&pd->dev, "No memory for controller\n");
479 return -ENOMEM;
482 platform_set_drvdata(pd, ssi);
484 err = ssi_add_controller(ssi, pd);
485 if (err < 0)
486 goto out1;
488 pm_runtime_irq_safe(&pd->dev);
489 pm_runtime_enable(&pd->dev);
491 err = ssi_hw_init(ssi);
492 if (err < 0)
493 goto out2;
494 #ifdef CONFIG_DEBUG_FS
495 err = ssi_debug_add_ctrl(ssi);
496 if (err < 0)
497 goto out2;
498 #endif
500 for_each_available_child_of_node(np, child) {
501 if (!of_device_is_compatible(child, "ti,omap3-ssi-port"))
502 continue;
504 childpdev = of_platform_device_create(child, NULL, &pd->dev);
505 if (!childpdev) {
506 err = -ENODEV;
507 dev_err(&pd->dev, "failed to create ssi controller port\n");
508 goto out3;
512 dev_info(&pd->dev, "ssi controller %d initialized (%d ports)!\n",
513 ssi->id, num_ports);
514 return err;
515 out3:
516 device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
517 out2:
518 ssi_remove_controller(ssi);
519 out1:
520 platform_set_drvdata(pd, NULL);
521 pm_runtime_disable(&pd->dev);
523 return err;
526 static int __exit ssi_remove(struct platform_device *pd)
528 struct hsi_controller *ssi = platform_get_drvdata(pd);
530 #ifdef CONFIG_DEBUG_FS
531 ssi_debug_remove_ctrl(ssi);
532 #endif
533 ssi_remove_controller(ssi);
534 platform_set_drvdata(pd, NULL);
536 pm_runtime_disable(&pd->dev);
538 /* cleanup of of_platform_populate() call */
539 device_for_each_child(&pd->dev, NULL, ssi_remove_ports);
541 return 0;
544 #ifdef CONFIG_PM
545 static int omap_ssi_runtime_suspend(struct device *dev)
547 struct hsi_controller *ssi = dev_get_drvdata(dev);
548 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
550 dev_dbg(dev, "runtime suspend!\n");
552 if (omap_ssi->get_loss)
553 omap_ssi->loss_count =
554 omap_ssi->get_loss(ssi->device.parent);
556 return 0;
559 static int omap_ssi_runtime_resume(struct device *dev)
561 struct hsi_controller *ssi = dev_get_drvdata(dev);
562 struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi);
564 dev_dbg(dev, "runtime resume!\n");
566 if ((omap_ssi->get_loss) && (omap_ssi->loss_count ==
567 omap_ssi->get_loss(ssi->device.parent)))
568 return 0;
570 writel_relaxed(omap_ssi->gdd_gcr, omap_ssi->gdd + SSI_GDD_GCR_REG);
572 return 0;
575 static const struct dev_pm_ops omap_ssi_pm_ops = {
576 SET_RUNTIME_PM_OPS(omap_ssi_runtime_suspend, omap_ssi_runtime_resume,
577 NULL)
580 #define DEV_PM_OPS (&omap_ssi_pm_ops)
581 #else
582 #define DEV_PM_OPS NULL
583 #endif
585 #ifdef CONFIG_OF
586 static const struct of_device_id omap_ssi_of_match[] = {
587 { .compatible = "ti,omap3-ssi", },
590 MODULE_DEVICE_TABLE(of, omap_ssi_of_match);
591 #else
592 #define omap_ssi_of_match NULL
593 #endif
595 static struct platform_driver ssi_pdriver = {
596 .remove = __exit_p(ssi_remove),
597 .driver = {
598 .name = "omap_ssi",
599 .pm = DEV_PM_OPS,
600 .of_match_table = omap_ssi_of_match,
604 module_platform_driver_probe(ssi_pdriver, ssi_probe);
606 MODULE_ALIAS("platform:omap_ssi");
607 MODULE_AUTHOR("Carlos Chinea <carlos.chinea@nokia.com>");
608 MODULE_AUTHOR("Sebastian Reichel <sre@kernel.org>");
609 MODULE_DESCRIPTION("Synchronous Serial Interface Driver");
610 MODULE_LICENSE("GPL v2");