locking/percpu-rwsem: Replace waitqueue with rcuwait
[cris-mirror.git] / arch / arm64 / kernel / smp.c
blobcb87234cfcf2d2b8ba75f9e83dadf78c927a3e86
1 /*
2 * SMP initialisation and IPI support
3 * Based on arch/arm/kernel/smp.c
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/acpi.h>
21 #include <linux/delay.h>
22 #include <linux/init.h>
23 #include <linux/spinlock.h>
24 #include <linux/sched.h>
25 #include <linux/interrupt.h>
26 #include <linux/cache.h>
27 #include <linux/profile.h>
28 #include <linux/errno.h>
29 #include <linux/mm.h>
30 #include <linux/err.h>
31 #include <linux/cpu.h>
32 #include <linux/smp.h>
33 #include <linux/seq_file.h>
34 #include <linux/irq.h>
35 #include <linux/percpu.h>
36 #include <linux/clockchips.h>
37 #include <linux/completion.h>
38 #include <linux/of.h>
39 #include <linux/irq_work.h>
41 #include <asm/alternative.h>
42 #include <asm/atomic.h>
43 #include <asm/cacheflush.h>
44 #include <asm/cpu.h>
45 #include <asm/cputype.h>
46 #include <asm/cpu_ops.h>
47 #include <asm/mmu_context.h>
48 #include <asm/numa.h>
49 #include <asm/pgtable.h>
50 #include <asm/pgalloc.h>
51 #include <asm/processor.h>
52 #include <asm/smp_plat.h>
53 #include <asm/sections.h>
54 #include <asm/tlbflush.h>
55 #include <asm/ptrace.h>
56 #include <asm/virt.h>
58 #define CREATE_TRACE_POINTS
59 #include <trace/events/ipi.h>
61 DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
62 EXPORT_PER_CPU_SYMBOL(cpu_number);
65 * as from 2.5, kernels no longer have an init_tasks structure
66 * so we need some other way of telling a new secondary core
67 * where to place its SVC stack
69 struct secondary_data secondary_data;
70 /* Number of CPUs which aren't online, but looping in kernel text. */
71 int cpus_stuck_in_kernel;
73 enum ipi_msg_type {
74 IPI_RESCHEDULE,
75 IPI_CALL_FUNC,
76 IPI_CPU_STOP,
77 IPI_TIMER,
78 IPI_IRQ_WORK,
79 IPI_WAKEUP
82 #ifdef CONFIG_ARM64_VHE
84 /* Whether the boot CPU is running in HYP mode or not*/
85 static bool boot_cpu_hyp_mode;
87 static inline void save_boot_cpu_run_el(void)
89 boot_cpu_hyp_mode = is_kernel_in_hyp_mode();
92 static inline bool is_boot_cpu_in_hyp_mode(void)
94 return boot_cpu_hyp_mode;
98 * Verify that a secondary CPU is running the kernel at the same
99 * EL as that of the boot CPU.
101 void verify_cpu_run_el(void)
103 bool in_el2 = is_kernel_in_hyp_mode();
104 bool boot_cpu_el2 = is_boot_cpu_in_hyp_mode();
106 if (in_el2 ^ boot_cpu_el2) {
107 pr_crit("CPU%d: mismatched Exception Level(EL%d) with boot CPU(EL%d)\n",
108 smp_processor_id(),
109 in_el2 ? 2 : 1,
110 boot_cpu_el2 ? 2 : 1);
111 cpu_panic_kernel();
115 #else
116 static inline void save_boot_cpu_run_el(void) {}
117 #endif
119 #ifdef CONFIG_HOTPLUG_CPU
120 static int op_cpu_kill(unsigned int cpu);
121 #else
122 static inline int op_cpu_kill(unsigned int cpu)
124 return -ENOSYS;
126 #endif
130 * Boot a secondary CPU, and assign it the specified idle task.
131 * This also gives us the initial stack to use for this CPU.
133 static int boot_secondary(unsigned int cpu, struct task_struct *idle)
135 if (cpu_ops[cpu]->cpu_boot)
136 return cpu_ops[cpu]->cpu_boot(cpu);
138 return -EOPNOTSUPP;
141 static DECLARE_COMPLETION(cpu_running);
143 int __cpu_up(unsigned int cpu, struct task_struct *idle)
145 int ret;
146 long status;
149 * We need to tell the secondary core where to find its stack and the
150 * page tables.
152 secondary_data.task = idle;
153 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
154 update_cpu_boot_status(CPU_MMU_OFF);
155 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
158 * Now bring the CPU into our world.
160 ret = boot_secondary(cpu, idle);
161 if (ret == 0) {
163 * CPU was successfully started, wait for it to come online or
164 * time out.
166 wait_for_completion_timeout(&cpu_running,
167 msecs_to_jiffies(1000));
169 if (!cpu_online(cpu)) {
170 pr_crit("CPU%u: failed to come online\n", cpu);
171 ret = -EIO;
173 } else {
174 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
177 secondary_data.task = NULL;
178 secondary_data.stack = NULL;
179 status = READ_ONCE(secondary_data.status);
180 if (ret && status) {
182 if (status == CPU_MMU_OFF)
183 status = READ_ONCE(__early_cpu_boot_status);
185 switch (status) {
186 default:
187 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
188 cpu, status);
189 break;
190 case CPU_KILL_ME:
191 if (!op_cpu_kill(cpu)) {
192 pr_crit("CPU%u: died during early boot\n", cpu);
193 break;
195 /* Fall through */
196 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
197 case CPU_STUCK_IN_KERNEL:
198 pr_crit("CPU%u: is stuck in kernel\n", cpu);
199 cpus_stuck_in_kernel++;
200 break;
201 case CPU_PANIC_KERNEL:
202 panic("CPU%u detected unsupported configuration\n", cpu);
206 return ret;
210 * This is the secondary CPU boot entry. We're using this CPUs
211 * idle thread stack, but a set of temporary page tables.
213 asmlinkage void secondary_start_kernel(void)
215 struct mm_struct *mm = &init_mm;
216 unsigned int cpu;
218 cpu = task_cpu(current);
219 set_my_cpu_offset(per_cpu_offset(cpu));
222 * All kernel threads share the same mm context; grab a
223 * reference and switch to it.
225 atomic_inc(&mm->mm_count);
226 current->active_mm = mm;
229 * TTBR0 is only used for the identity mapping at this stage. Make it
230 * point to zero page to avoid speculatively fetching new entries.
232 cpu_uninstall_idmap();
234 preempt_disable();
235 trace_hardirqs_off();
238 * If the system has established the capabilities, make sure
239 * this CPU ticks all of those. If it doesn't, the CPU will
240 * fail to come online.
242 check_local_cpu_capabilities();
244 if (cpu_ops[cpu]->cpu_postboot)
245 cpu_ops[cpu]->cpu_postboot();
248 * Log the CPU info before it is marked online and might get read.
250 cpuinfo_store_cpu();
253 * Enable GIC and timers.
255 notify_cpu_starting(cpu);
257 store_cpu_topology(cpu);
260 * OK, now it's safe to let the boot CPU continue. Wait for
261 * the CPU migration code to notice that the CPU is online
262 * before we continue.
264 pr_info("CPU%u: Booted secondary processor [%08x]\n",
265 cpu, read_cpuid_id());
266 update_cpu_boot_status(CPU_BOOT_SUCCESS);
267 set_cpu_online(cpu, true);
268 complete(&cpu_running);
270 local_irq_enable();
271 local_async_enable();
274 * OK, it's off to the idle thread for us
276 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
279 #ifdef CONFIG_HOTPLUG_CPU
280 static int op_cpu_disable(unsigned int cpu)
283 * If we don't have a cpu_die method, abort before we reach the point
284 * of no return. CPU0 may not have an cpu_ops, so test for it.
286 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
287 return -EOPNOTSUPP;
290 * We may need to abort a hot unplug for some other mechanism-specific
291 * reason.
293 if (cpu_ops[cpu]->cpu_disable)
294 return cpu_ops[cpu]->cpu_disable(cpu);
296 return 0;
300 * __cpu_disable runs on the processor to be shutdown.
302 int __cpu_disable(void)
304 unsigned int cpu = smp_processor_id();
305 int ret;
307 ret = op_cpu_disable(cpu);
308 if (ret)
309 return ret;
312 * Take this CPU offline. Once we clear this, we can't return,
313 * and we must not schedule until we're ready to give up the cpu.
315 set_cpu_online(cpu, false);
318 * OK - migrate IRQs away from this CPU
320 irq_migrate_all_off_this_cpu();
322 return 0;
325 static int op_cpu_kill(unsigned int cpu)
328 * If we have no means of synchronising with the dying CPU, then assume
329 * that it is really dead. We can only wait for an arbitrary length of
330 * time and hope that it's dead, so let's skip the wait and just hope.
332 if (!cpu_ops[cpu]->cpu_kill)
333 return 0;
335 return cpu_ops[cpu]->cpu_kill(cpu);
339 * called on the thread which is asking for a CPU to be shutdown -
340 * waits until shutdown has completed, or it is timed out.
342 void __cpu_die(unsigned int cpu)
344 int err;
346 if (!cpu_wait_death(cpu, 5)) {
347 pr_crit("CPU%u: cpu didn't die\n", cpu);
348 return;
350 pr_notice("CPU%u: shutdown\n", cpu);
353 * Now that the dying CPU is beyond the point of no return w.r.t.
354 * in-kernel synchronisation, try to get the firwmare to help us to
355 * verify that it has really left the kernel before we consider
356 * clobbering anything it might still be using.
358 err = op_cpu_kill(cpu);
359 if (err)
360 pr_warn("CPU%d may not have shut down cleanly: %d\n",
361 cpu, err);
365 * Called from the idle thread for the CPU which has been shutdown.
367 * Note that we disable IRQs here, but do not re-enable them
368 * before returning to the caller. This is also the behaviour
369 * of the other hotplug-cpu capable cores, so presumably coming
370 * out of idle fixes this.
372 void cpu_die(void)
374 unsigned int cpu = smp_processor_id();
376 idle_task_exit();
378 local_irq_disable();
380 /* Tell __cpu_die() that this CPU is now safe to dispose of */
381 (void)cpu_report_death();
384 * Actually shutdown the CPU. This must never fail. The specific hotplug
385 * mechanism must perform all required cache maintenance to ensure that
386 * no dirty lines are lost in the process of shutting down the CPU.
388 cpu_ops[cpu]->cpu_die(cpu);
390 BUG();
392 #endif
395 * Kill the calling secondary CPU, early in bringup before it is turned
396 * online.
398 void cpu_die_early(void)
400 int cpu = smp_processor_id();
402 pr_crit("CPU%d: will not boot\n", cpu);
404 /* Mark this CPU absent */
405 set_cpu_present(cpu, 0);
407 #ifdef CONFIG_HOTPLUG_CPU
408 update_cpu_boot_status(CPU_KILL_ME);
409 /* Check if we can park ourselves */
410 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
411 cpu_ops[cpu]->cpu_die(cpu);
412 #endif
413 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
415 cpu_park_loop();
418 static void __init hyp_mode_check(void)
420 if (is_hyp_mode_available())
421 pr_info("CPU: All CPU(s) started at EL2\n");
422 else if (is_hyp_mode_mismatched())
423 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
424 "CPU: CPUs started in inconsistent modes");
425 else
426 pr_info("CPU: All CPU(s) started at EL1\n");
429 void __init smp_cpus_done(unsigned int max_cpus)
431 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
432 setup_cpu_features();
433 hyp_mode_check();
434 apply_alternatives_all();
437 void __init smp_prepare_boot_cpu(void)
439 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
441 * Initialise the static keys early as they may be enabled by the
442 * cpufeature code.
444 jump_label_init();
445 cpuinfo_store_boot_cpu();
446 save_boot_cpu_run_el();
448 * Run the errata work around checks on the boot CPU, once we have
449 * initialised the cpu feature infrastructure from
450 * cpuinfo_store_boot_cpu() above.
452 update_cpu_errata_workarounds();
455 static u64 __init of_get_cpu_mpidr(struct device_node *dn)
457 const __be32 *cell;
458 u64 hwid;
461 * A cpu node with missing "reg" property is
462 * considered invalid to build a cpu_logical_map
463 * entry.
465 cell = of_get_property(dn, "reg", NULL);
466 if (!cell) {
467 pr_err("%s: missing reg property\n", dn->full_name);
468 return INVALID_HWID;
471 hwid = of_read_number(cell, of_n_addr_cells(dn));
473 * Non affinity bits must be set to 0 in the DT
475 if (hwid & ~MPIDR_HWID_BITMASK) {
476 pr_err("%s: invalid reg property\n", dn->full_name);
477 return INVALID_HWID;
479 return hwid;
483 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
484 * entries and check for duplicates. If any is found just ignore the
485 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
486 * matching valid MPIDR values.
488 static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
490 unsigned int i;
492 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
493 if (cpu_logical_map(i) == hwid)
494 return true;
495 return false;
499 * Initialize cpu operations for a logical cpu and
500 * set it in the possible mask on success
502 static int __init smp_cpu_setup(int cpu)
504 if (cpu_read_ops(cpu))
505 return -ENODEV;
507 if (cpu_ops[cpu]->cpu_init(cpu))
508 return -ENODEV;
510 set_cpu_possible(cpu, true);
512 return 0;
515 static bool bootcpu_valid __initdata;
516 static unsigned int cpu_count = 1;
518 #ifdef CONFIG_ACPI
520 * acpi_map_gic_cpu_interface - parse processor MADT entry
522 * Carry out sanity checks on MADT processor entry and initialize
523 * cpu_logical_map on success
525 static void __init
526 acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
528 u64 hwid = processor->arm_mpidr;
530 if (!(processor->flags & ACPI_MADT_ENABLED)) {
531 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
532 return;
535 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
536 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
537 return;
540 if (is_mpidr_duplicate(cpu_count, hwid)) {
541 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
542 return;
545 /* Check if GICC structure of boot CPU is available in the MADT */
546 if (cpu_logical_map(0) == hwid) {
547 if (bootcpu_valid) {
548 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
549 hwid);
550 return;
552 bootcpu_valid = true;
553 early_map_cpu_to_node(0, acpi_numa_get_nid(0, hwid));
554 return;
557 if (cpu_count >= NR_CPUS)
558 return;
560 /* map the logical cpu id to cpu MPIDR */
561 cpu_logical_map(cpu_count) = hwid;
564 * Set-up the ACPI parking protocol cpu entries
565 * while initializing the cpu_logical_map to
566 * avoid parsing MADT entries multiple times for
567 * nothing (ie a valid cpu_logical_map entry should
568 * contain a valid parking protocol data set to
569 * initialize the cpu if the parking protocol is
570 * the only available enable method).
572 acpi_set_mailbox_entry(cpu_count, processor);
574 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid));
576 cpu_count++;
579 static int __init
580 acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
581 const unsigned long end)
583 struct acpi_madt_generic_interrupt *processor;
585 processor = (struct acpi_madt_generic_interrupt *)header;
586 if (BAD_MADT_GICC_ENTRY(processor, end))
587 return -EINVAL;
589 acpi_table_print_madt_entry(header);
591 acpi_map_gic_cpu_interface(processor);
593 return 0;
595 #else
596 #define acpi_table_parse_madt(...) do { } while (0)
597 #endif
600 * Enumerate the possible CPU set from the device tree and build the
601 * cpu logical map array containing MPIDR values related to logical
602 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
604 static void __init of_parse_and_init_cpus(void)
606 struct device_node *dn = NULL;
608 while ((dn = of_find_node_by_type(dn, "cpu"))) {
609 u64 hwid = of_get_cpu_mpidr(dn);
611 if (hwid == INVALID_HWID)
612 goto next;
614 if (is_mpidr_duplicate(cpu_count, hwid)) {
615 pr_err("%s: duplicate cpu reg properties in the DT\n",
616 dn->full_name);
617 goto next;
621 * The numbering scheme requires that the boot CPU
622 * must be assigned logical id 0. Record it so that
623 * the logical map built from DT is validated and can
624 * be used.
626 if (hwid == cpu_logical_map(0)) {
627 if (bootcpu_valid) {
628 pr_err("%s: duplicate boot cpu reg property in DT\n",
629 dn->full_name);
630 goto next;
633 bootcpu_valid = true;
634 early_map_cpu_to_node(0, of_node_to_nid(dn));
637 * cpu_logical_map has already been
638 * initialized and the boot cpu doesn't need
639 * the enable-method so continue without
640 * incrementing cpu.
642 continue;
645 if (cpu_count >= NR_CPUS)
646 goto next;
648 pr_debug("cpu logical map 0x%llx\n", hwid);
649 cpu_logical_map(cpu_count) = hwid;
651 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
652 next:
653 cpu_count++;
658 * Enumerate the possible CPU set from the device tree or ACPI and build the
659 * cpu logical map array containing MPIDR values related to logical
660 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
662 void __init smp_init_cpus(void)
664 int i;
666 if (acpi_disabled)
667 of_parse_and_init_cpus();
668 else
670 * do a walk of MADT to determine how many CPUs
671 * we have including disabled CPUs, and get information
672 * we need for SMP init
674 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
675 acpi_parse_gic_cpu_interface, 0);
677 if (cpu_count > nr_cpu_ids)
678 pr_warn("Number of cores (%d) exceeds configured maximum of %d - clipping\n",
679 cpu_count, nr_cpu_ids);
681 if (!bootcpu_valid) {
682 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
683 return;
687 * We need to set the cpu_logical_map entries before enabling
688 * the cpus so that cpu processor description entries (DT cpu nodes
689 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
690 * with entries in cpu_logical_map while initializing the cpus.
691 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
693 for (i = 1; i < nr_cpu_ids; i++) {
694 if (cpu_logical_map(i) != INVALID_HWID) {
695 if (smp_cpu_setup(i))
696 cpu_logical_map(i) = INVALID_HWID;
701 void __init smp_prepare_cpus(unsigned int max_cpus)
703 int err;
704 unsigned int cpu;
705 unsigned int this_cpu;
707 init_cpu_topology();
709 this_cpu = smp_processor_id();
710 store_cpu_topology(this_cpu);
711 numa_store_cpu_info(this_cpu);
714 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
715 * secondary CPUs present.
717 if (max_cpus == 0)
718 return;
721 * Initialise the present map (which describes the set of CPUs
722 * actually populated at the present time) and release the
723 * secondaries from the bootloader.
725 for_each_possible_cpu(cpu) {
727 per_cpu(cpu_number, cpu) = cpu;
729 if (cpu == smp_processor_id())
730 continue;
732 if (!cpu_ops[cpu])
733 continue;
735 err = cpu_ops[cpu]->cpu_prepare(cpu);
736 if (err)
737 continue;
739 set_cpu_present(cpu, true);
740 numa_store_cpu_info(cpu);
744 void (*__smp_cross_call)(const struct cpumask *, unsigned int);
746 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
748 __smp_cross_call = fn;
751 static const char *ipi_types[NR_IPI] __tracepoint_string = {
752 #define S(x,s) [x] = s
753 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
754 S(IPI_CALL_FUNC, "Function call interrupts"),
755 S(IPI_CPU_STOP, "CPU stop interrupts"),
756 S(IPI_TIMER, "Timer broadcast interrupts"),
757 S(IPI_IRQ_WORK, "IRQ work interrupts"),
758 S(IPI_WAKEUP, "CPU wake-up interrupts"),
761 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
763 trace_ipi_raise(target, ipi_types[ipinr]);
764 __smp_cross_call(target, ipinr);
767 void show_ipi_list(struct seq_file *p, int prec)
769 unsigned int cpu, i;
771 for (i = 0; i < NR_IPI; i++) {
772 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
773 prec >= 4 ? " " : "");
774 for_each_online_cpu(cpu)
775 seq_printf(p, "%10u ",
776 __get_irq_stat(cpu, ipi_irqs[i]));
777 seq_printf(p, " %s\n", ipi_types[i]);
781 u64 smp_irq_stat_cpu(unsigned int cpu)
783 u64 sum = 0;
784 int i;
786 for (i = 0; i < NR_IPI; i++)
787 sum += __get_irq_stat(cpu, ipi_irqs[i]);
789 return sum;
792 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
794 smp_cross_call(mask, IPI_CALL_FUNC);
797 void arch_send_call_function_single_ipi(int cpu)
799 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
802 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
803 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
805 smp_cross_call(mask, IPI_WAKEUP);
807 #endif
809 #ifdef CONFIG_IRQ_WORK
810 void arch_irq_work_raise(void)
812 if (__smp_cross_call)
813 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
815 #endif
818 * ipi_cpu_stop - handle IPI from smp_send_stop()
820 static void ipi_cpu_stop(unsigned int cpu)
822 set_cpu_online(cpu, false);
824 local_irq_disable();
826 while (1)
827 cpu_relax();
831 * Main handler for inter-processor interrupts
833 void handle_IPI(int ipinr, struct pt_regs *regs)
835 unsigned int cpu = smp_processor_id();
836 struct pt_regs *old_regs = set_irq_regs(regs);
838 if ((unsigned)ipinr < NR_IPI) {
839 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
840 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
843 switch (ipinr) {
844 case IPI_RESCHEDULE:
845 scheduler_ipi();
846 break;
848 case IPI_CALL_FUNC:
849 irq_enter();
850 generic_smp_call_function_interrupt();
851 irq_exit();
852 break;
854 case IPI_CPU_STOP:
855 irq_enter();
856 ipi_cpu_stop(cpu);
857 irq_exit();
858 break;
860 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
861 case IPI_TIMER:
862 irq_enter();
863 tick_receive_broadcast();
864 irq_exit();
865 break;
866 #endif
868 #ifdef CONFIG_IRQ_WORK
869 case IPI_IRQ_WORK:
870 irq_enter();
871 irq_work_run();
872 irq_exit();
873 break;
874 #endif
876 #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
877 case IPI_WAKEUP:
878 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
879 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
880 cpu);
881 break;
882 #endif
884 default:
885 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
886 break;
889 if ((unsigned)ipinr < NR_IPI)
890 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
891 set_irq_regs(old_regs);
894 void smp_send_reschedule(int cpu)
896 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
899 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
900 void tick_broadcast(const struct cpumask *mask)
902 smp_cross_call(mask, IPI_TIMER);
904 #endif
906 void smp_send_stop(void)
908 unsigned long timeout;
910 if (num_online_cpus() > 1) {
911 cpumask_t mask;
913 cpumask_copy(&mask, cpu_online_mask);
914 cpumask_clear_cpu(smp_processor_id(), &mask);
916 if (system_state == SYSTEM_BOOTING ||
917 system_state == SYSTEM_RUNNING)
918 pr_crit("SMP: stopping secondary CPUs\n");
919 smp_cross_call(&mask, IPI_CPU_STOP);
922 /* Wait up to one second for other CPUs to stop */
923 timeout = USEC_PER_SEC;
924 while (num_online_cpus() > 1 && timeout--)
925 udelay(1);
927 if (num_online_cpus() > 1)
928 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
929 cpumask_pr_args(cpu_online_mask));
933 * not supported here
935 int setup_profiling_timer(unsigned int multiplier)
937 return -EINVAL;
940 static bool have_cpu_die(void)
942 #ifdef CONFIG_HOTPLUG_CPU
943 int any_cpu = raw_smp_processor_id();
945 if (cpu_ops[any_cpu]->cpu_die)
946 return true;
947 #endif
948 return false;
951 bool cpus_are_stuck_in_kernel(void)
953 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
955 return !!cpus_stuck_in_kernel || smp_spin_tables;