Linux 3.11-rc3
[cris-mirror.git] / arch / arm / include / asm / irqflags.h
blob3b763d6652a0aee4ba7a81bc591715c2084d1b10
1 #ifndef __ASM_ARM_IRQFLAGS_H
2 #define __ASM_ARM_IRQFLAGS_H
4 #ifdef __KERNEL__
6 #include <asm/ptrace.h>
8 /*
9 * CPU interrupt mask handling.
11 #ifdef CONFIG_CPU_V7M
12 #define IRQMASK_REG_NAME_R "primask"
13 #define IRQMASK_REG_NAME_W "primask"
14 #define IRQMASK_I_BIT 1
15 #else
16 #define IRQMASK_REG_NAME_R "cpsr"
17 #define IRQMASK_REG_NAME_W "cpsr_c"
18 #define IRQMASK_I_BIT PSR_I_BIT
19 #endif
21 #if __LINUX_ARM_ARCH__ >= 6
23 static inline unsigned long arch_local_irq_save(void)
25 unsigned long flags;
27 asm volatile(
28 " mrs %0, " IRQMASK_REG_NAME_R " @ arch_local_irq_save\n"
29 " cpsid i"
30 : "=r" (flags) : : "memory", "cc");
31 return flags;
34 static inline void arch_local_irq_enable(void)
36 asm volatile(
37 " cpsie i @ arch_local_irq_enable"
40 : "memory", "cc");
43 static inline void arch_local_irq_disable(void)
45 asm volatile(
46 " cpsid i @ arch_local_irq_disable"
49 : "memory", "cc");
52 #define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
53 #define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
54 #else
57 * Save the current interrupt enable state & disable IRQs
59 static inline unsigned long arch_local_irq_save(void)
61 unsigned long flags, temp;
63 asm volatile(
64 " mrs %0, cpsr @ arch_local_irq_save\n"
65 " orr %1, %0, #128\n"
66 " msr cpsr_c, %1"
67 : "=r" (flags), "=r" (temp)
69 : "memory", "cc");
70 return flags;
74 * Enable IRQs
76 static inline void arch_local_irq_enable(void)
78 unsigned long temp;
79 asm volatile(
80 " mrs %0, cpsr @ arch_local_irq_enable\n"
81 " bic %0, %0, #128\n"
82 " msr cpsr_c, %0"
83 : "=r" (temp)
85 : "memory", "cc");
89 * Disable IRQs
91 static inline void arch_local_irq_disable(void)
93 unsigned long temp;
94 asm volatile(
95 " mrs %0, cpsr @ arch_local_irq_disable\n"
96 " orr %0, %0, #128\n"
97 " msr cpsr_c, %0"
98 : "=r" (temp)
100 : "memory", "cc");
104 * Enable FIQs
106 #define local_fiq_enable() \
107 ({ \
108 unsigned long temp; \
109 __asm__ __volatile__( \
110 "mrs %0, cpsr @ stf\n" \
111 " bic %0, %0, #64\n" \
112 " msr cpsr_c, %0" \
113 : "=r" (temp) \
115 : "memory", "cc"); \
119 * Disable FIQs
121 #define local_fiq_disable() \
122 ({ \
123 unsigned long temp; \
124 __asm__ __volatile__( \
125 "mrs %0, cpsr @ clf\n" \
126 " orr %0, %0, #64\n" \
127 " msr cpsr_c, %0" \
128 : "=r" (temp) \
130 : "memory", "cc"); \
133 #endif
136 * Save the current interrupt enable state.
138 static inline unsigned long arch_local_save_flags(void)
140 unsigned long flags;
141 asm volatile(
142 " mrs %0, " IRQMASK_REG_NAME_R " @ local_save_flags"
143 : "=r" (flags) : : "memory", "cc");
144 return flags;
148 * restore saved IRQ & FIQ state
150 static inline void arch_local_irq_restore(unsigned long flags)
152 asm volatile(
153 " msr " IRQMASK_REG_NAME_W ", %0 @ local_irq_restore"
155 : "r" (flags)
156 : "memory", "cc");
159 static inline int arch_irqs_disabled_flags(unsigned long flags)
161 return flags & IRQMASK_I_BIT;
164 #endif /* ifdef __KERNEL__ */
165 #endif /* ifndef __ASM_ARM_IRQFLAGS_H */