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[cris-mirror.git] / arch / arm / mach-rpc / include / mach / hardware.h
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1 /*
2 * arch/arm/mach-rpc/include/mach/hardware.h
4 * Copyright (C) 1996-1999 Russell King.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This file contains the hardware definitions of the RiscPC series machines.
12 #ifndef __ASM_ARCH_HARDWARE_H
13 #define __ASM_ARCH_HARDWARE_H
15 #include <mach/memory.h>
18 * What hardware must be present
20 #define HAS_IOMD
21 #define HAS_VIDC20
23 /* Hardware addresses of major areas.
24 * *_START is the physical address
25 * *_SIZE is the size of the region
26 * *_BASE is the virtual address
28 #define RAM_SIZE 0x10000000
29 #define RAM_START 0x10000000
31 #define EASI_SIZE 0x08000000 /* EASI I/O */
32 #define EASI_START 0x08000000
33 #define EASI_BASE IOMEM(0xe5000000)
35 #define IO_START 0x03000000 /* I/O */
36 #define IO_SIZE 0x01000000
37 #define IO_BASE IOMEM(0xe0000000)
39 #define SCREEN_START 0x02000000 /* VRAM */
40 #define SCREEN_END 0xdfc00000
41 #define SCREEN_BASE 0xdf800000
43 #define UNCACHEABLE_ADDR 0xdf010000
46 * IO Addresses
48 #define ECARD_EASI_BASE (EASI_BASE)
49 #define VIDC_BASE (IO_BASE + 0x00400000)
50 #define EXPMASK_BASE (IO_BASE + 0x00360000)
51 #define ECARD_IOC4_BASE (IO_BASE + 0x00270000)
52 #define ECARD_IOC_BASE (IO_BASE + 0x00240000)
53 #define IOMD_BASE (IO_BASE + 0x00200000)
54 #define IOC_BASE (IO_BASE + 0x00200000)
55 #define ECARD_MEMC8_BASE (IO_BASE + 0x0002b000)
56 #define FLOPPYDMA_BASE (IO_BASE + 0x0002a000)
57 #define PCIO_BASE (IO_BASE + 0x00010000)
58 #define ECARD_MEMC_BASE (IO_BASE + 0x00000000)
60 #define vidc_writel(val) __raw_writel(val, VIDC_BASE)
62 #define NETSLOT_BASE 0x0302b000
63 #define NETSLOT_SIZE 0x00001000
65 #define PODSLOT_IOC0_BASE 0x03240000
66 #define PODSLOT_IOC4_BASE 0x03270000
67 #define PODSLOT_IOC_SIZE (1 << 14)
68 #define PODSLOT_MEMC_BASE 0x03000000
69 #define PODSLOT_MEMC_SIZE (1 << 14)
70 #define PODSLOT_EASI_BASE 0x08000000
71 #define PODSLOT_EASI_SIZE (1 << 24)
73 #define EXPMASK_STATUS (EXPMASK_BASE + 0x00)
74 #define EXPMASK_ENABLE (EXPMASK_BASE + 0x04)
76 #endif