Linux 3.11-rc3
[cris-mirror.git] / arch / blackfin / mach-bf537 / boards / cm_bf537u.c
blob0143d8bef909483be39128812faa86f926ddfdfd
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Bluetechnix
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
7 * Licensed under the GPL-2 or later.
8 */
10 #include <linux/device.h>
11 #include <linux/etherdevice.h>
12 #include <linux/export.h>
13 #include <linux/platform_device.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/partitions.h>
16 #include <linux/mtd/physmap.h>
17 #include <linux/spi/spi.h>
18 #include <linux/spi/flash.h>
19 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
20 #include <linux/usb/isp1362.h>
21 #endif
22 #include <linux/ata_platform.h>
23 #include <linux/irq.h>
24 #include <asm/dma.h>
25 #include <asm/bfin5xx_spi.h>
26 #include <asm/portmux.h>
27 #include <asm/dpmc.h>
28 #include <linux/spi/mmc_spi.h>
31 * Name the Board for the /proc/cpuinfo
33 const char bfin_board_name[] = "Bluetechnix CM BF537U";
35 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
36 /* all SPI peripherals info goes here */
38 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
39 static struct mtd_partition bfin_spi_flash_partitions[] = {
41 .name = "bootloader(spi)",
42 .size = 0x00020000,
43 .offset = 0,
44 .mask_flags = MTD_CAP_ROM
45 }, {
46 .name = "linux kernel(spi)",
47 .size = 0xe0000,
48 .offset = 0x20000
49 }, {
50 .name = "file system(spi)",
51 .size = 0x700000,
52 .offset = 0x00100000,
56 static struct flash_platform_data bfin_spi_flash_data = {
57 .name = "m25p80",
58 .parts = bfin_spi_flash_partitions,
59 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
60 .type = "m25p64",
63 /* SPI flash chip (m25p64) */
64 static struct bfin5xx_spi_chip spi_flash_chip_info = {
65 .enable_dma = 0, /* use dma transfer with this chip*/
67 #endif
69 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
70 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
71 .enable_dma = 0,
73 #endif
75 static struct spi_board_info bfin_spi_board_info[] __initdata = {
76 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
78 /* the modalias must be the same as spi device driver name */
79 .modalias = "m25p80", /* Name of spi_driver for this device */
80 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
81 .bus_num = 0, /* Framework bus number */
82 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
83 .platform_data = &bfin_spi_flash_data,
84 .controller_data = &spi_flash_chip_info,
85 .mode = SPI_MODE_3,
87 #endif
89 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
91 .modalias = "ad183x",
92 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
93 .bus_num = 0,
94 .chip_select = 4,
96 #endif
98 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
100 .modalias = "mmc_spi",
101 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
102 .bus_num = 0,
103 .chip_select = 1,
104 .controller_data = &mmc_spi_chip_info,
105 .mode = SPI_MODE_3,
107 #endif
110 /* SPI (0) */
111 static struct resource bfin_spi0_resource[] = {
112 [0] = {
113 .start = SPI0_REGBASE,
114 .end = SPI0_REGBASE + 0xFF,
115 .flags = IORESOURCE_MEM,
117 [1] = {
118 .start = CH_SPI,
119 .end = CH_SPI,
120 .flags = IORESOURCE_DMA,
122 [2] = {
123 .start = IRQ_SPI,
124 .end = IRQ_SPI,
125 .flags = IORESOURCE_IRQ,
129 /* SPI controller data */
130 static struct bfin5xx_spi_master bfin_spi0_info = {
131 .num_chipselect = 8,
132 .enable_dma = 1, /* master has the ability to do dma transfer */
133 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
136 static struct platform_device bfin_spi0_device = {
137 .name = "bfin-spi",
138 .id = 0, /* Bus number */
139 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
140 .resource = bfin_spi0_resource,
141 .dev = {
142 .platform_data = &bfin_spi0_info, /* Passed to driver */
145 #endif /* spi master and devices */
147 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
148 static struct platform_device rtc_device = {
149 .name = "rtc-bfin",
150 .id = -1,
152 #endif
154 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
155 static struct platform_device hitachi_fb_device = {
156 .name = "hitachi-tx09",
158 #endif
160 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
161 #include <linux/smc91x.h>
163 static struct smc91x_platdata smc91x_info = {
164 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
165 .leda = RPC_LED_100_10,
166 .ledb = RPC_LED_TX_RX,
169 static struct resource smc91x_resources[] = {
171 .start = 0x20200300,
172 .end = 0x20200300 + 16,
173 .flags = IORESOURCE_MEM,
174 }, {
175 .start = IRQ_PF14,
176 .end = IRQ_PF14,
177 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
181 static struct platform_device smc91x_device = {
182 .name = "smc91x",
183 .id = 0,
184 .num_resources = ARRAY_SIZE(smc91x_resources),
185 .resource = smc91x_resources,
186 .dev = {
187 .platform_data = &smc91x_info,
190 #endif
192 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
193 static struct resource isp1362_hcd_resources[] = {
195 .start = 0x20308000,
196 .end = 0x20308000,
197 .flags = IORESOURCE_MEM,
198 }, {
199 .start = 0x20308004,
200 .end = 0x20308004,
201 .flags = IORESOURCE_MEM,
202 }, {
203 .start = IRQ_PG15,
204 .end = IRQ_PG15,
205 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
209 static struct isp1362_platform_data isp1362_priv = {
210 .sel15Kres = 1,
211 .clknotstop = 0,
212 .oc_enable = 0,
213 .int_act_high = 0,
214 .int_edge_triggered = 0,
215 .remote_wakeup_connected = 0,
216 .no_power_switching = 1,
217 .power_switching_mode = 0,
220 static struct platform_device isp1362_hcd_device = {
221 .name = "isp1362-hcd",
222 .id = 0,
223 .dev = {
224 .platform_data = &isp1362_priv,
226 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
227 .resource = isp1362_hcd_resources,
229 #endif
231 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
232 static struct resource net2272_bfin_resources[] = {
234 .start = 0x20200000,
235 .end = 0x20200000 + 0x100,
236 .flags = IORESOURCE_MEM,
237 }, {
238 .start = IRQ_PH14,
239 .end = IRQ_PH14,
240 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
244 static struct platform_device net2272_bfin_device = {
245 .name = "net2272",
246 .id = -1,
247 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
248 .resource = net2272_bfin_resources,
250 #endif
252 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
253 static struct mtd_partition cm_partitions[] = {
255 .name = "bootloader(nor)",
256 .size = 0x40000,
257 .offset = 0,
258 }, {
259 .name = "linux kernel(nor)",
260 .size = 0x100000,
261 .offset = MTDPART_OFS_APPEND,
262 }, {
263 .name = "file system(nor)",
264 .size = MTDPART_SIZ_FULL,
265 .offset = MTDPART_OFS_APPEND,
269 static struct physmap_flash_data cm_flash_data = {
270 .width = 2,
271 .parts = cm_partitions,
272 .nr_parts = ARRAY_SIZE(cm_partitions),
275 static unsigned cm_flash_gpios[] = { GPIO_PH0 };
277 static struct resource cm_flash_resource[] = {
279 .name = "cfi_probe",
280 .start = 0x20000000,
281 .end = 0x201fffff,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = (unsigned long)cm_flash_gpios,
285 .end = ARRAY_SIZE(cm_flash_gpios),
286 .flags = IORESOURCE_IRQ,
290 static struct platform_device cm_flash_device = {
291 .name = "gpio-addr-flash",
292 .id = 0,
293 .dev = {
294 .platform_data = &cm_flash_data,
296 .num_resources = ARRAY_SIZE(cm_flash_resource),
297 .resource = cm_flash_resource,
299 #endif
301 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
302 #ifdef CONFIG_SERIAL_BFIN_UART0
303 static struct resource bfin_uart0_resources[] = {
305 .start = UART0_THR,
306 .end = UART0_GCTL+2,
307 .flags = IORESOURCE_MEM,
310 .start = IRQ_UART0_TX,
311 .end = IRQ_UART0_TX,
312 .flags = IORESOURCE_IRQ,
315 .start = IRQ_UART0_RX,
316 .end = IRQ_UART0_RX,
317 .flags = IORESOURCE_IRQ,
320 .start = IRQ_UART0_ERROR,
321 .end = IRQ_UART0_ERROR,
322 .flags = IORESOURCE_IRQ,
325 .start = CH_UART0_TX,
326 .end = CH_UART0_TX,
327 .flags = IORESOURCE_DMA,
330 .start = CH_UART0_RX,
331 .end = CH_UART0_RX,
332 .flags = IORESOURCE_DMA,
336 static unsigned short bfin_uart0_peripherals[] = {
337 P_UART0_TX, P_UART0_RX, 0
340 static struct platform_device bfin_uart0_device = {
341 .name = "bfin-uart",
342 .id = 0,
343 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
344 .resource = bfin_uart0_resources,
345 .dev = {
346 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
349 #endif
350 #ifdef CONFIG_SERIAL_BFIN_UART1
351 static struct resource bfin_uart1_resources[] = {
353 .start = UART1_THR,
354 .end = UART1_GCTL+2,
355 .flags = IORESOURCE_MEM,
358 .start = IRQ_UART1_TX,
359 .end = IRQ_UART1_TX,
360 .flags = IORESOURCE_IRQ,
363 .start = IRQ_UART1_RX,
364 .end = IRQ_UART1_RX,
365 .flags = IORESOURCE_IRQ,
368 .start = IRQ_UART1_ERROR,
369 .end = IRQ_UART1_ERROR,
370 .flags = IORESOURCE_IRQ,
373 .start = CH_UART1_TX,
374 .end = CH_UART1_TX,
375 .flags = IORESOURCE_DMA,
378 .start = CH_UART1_RX,
379 .end = CH_UART1_RX,
380 .flags = IORESOURCE_DMA,
384 static unsigned short bfin_uart1_peripherals[] = {
385 P_UART1_TX, P_UART1_RX, 0
388 static struct platform_device bfin_uart1_device = {
389 .name = "bfin-uart",
390 .id = 1,
391 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
392 .resource = bfin_uart1_resources,
393 .dev = {
394 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
397 #endif
398 #endif
400 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
401 #ifdef CONFIG_BFIN_SIR0
402 static struct resource bfin_sir0_resources[] = {
404 .start = 0xFFC00400,
405 .end = 0xFFC004FF,
406 .flags = IORESOURCE_MEM,
409 .start = IRQ_UART0_RX,
410 .end = IRQ_UART0_RX+1,
411 .flags = IORESOURCE_IRQ,
414 .start = CH_UART0_RX,
415 .end = CH_UART0_RX+1,
416 .flags = IORESOURCE_DMA,
419 static struct platform_device bfin_sir0_device = {
420 .name = "bfin_sir",
421 .id = 0,
422 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
423 .resource = bfin_sir0_resources,
425 #endif
426 #ifdef CONFIG_BFIN_SIR1
427 static struct resource bfin_sir1_resources[] = {
429 .start = 0xFFC02000,
430 .end = 0xFFC020FF,
431 .flags = IORESOURCE_MEM,
434 .start = IRQ_UART1_RX,
435 .end = IRQ_UART1_RX+1,
436 .flags = IORESOURCE_IRQ,
439 .start = CH_UART1_RX,
440 .end = CH_UART1_RX+1,
441 .flags = IORESOURCE_DMA,
444 static struct platform_device bfin_sir1_device = {
445 .name = "bfin_sir",
446 .id = 1,
447 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
448 .resource = bfin_sir1_resources,
450 #endif
451 #endif
453 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
454 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
456 static struct resource bfin_twi0_resource[] = {
457 [0] = {
458 .start = TWI0_REGBASE,
459 .end = TWI0_REGBASE,
460 .flags = IORESOURCE_MEM,
462 [1] = {
463 .start = IRQ_TWI,
464 .end = IRQ_TWI,
465 .flags = IORESOURCE_IRQ,
469 static struct platform_device i2c_bfin_twi_device = {
470 .name = "i2c-bfin-twi",
471 .id = 0,
472 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
473 .resource = bfin_twi0_resource,
474 .dev = {
475 .platform_data = &bfin_twi0_pins,
478 #endif
480 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
481 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
482 static struct resource bfin_sport0_uart_resources[] = {
484 .start = SPORT0_TCR1,
485 .end = SPORT0_MRCS3+4,
486 .flags = IORESOURCE_MEM,
489 .start = IRQ_SPORT0_RX,
490 .end = IRQ_SPORT0_RX+1,
491 .flags = IORESOURCE_IRQ,
494 .start = IRQ_SPORT0_ERROR,
495 .end = IRQ_SPORT0_ERROR,
496 .flags = IORESOURCE_IRQ,
500 static unsigned short bfin_sport0_peripherals[] = {
501 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
502 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
505 static struct platform_device bfin_sport0_uart_device = {
506 .name = "bfin-sport-uart",
507 .id = 0,
508 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
509 .resource = bfin_sport0_uart_resources,
510 .dev = {
511 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
514 #endif
515 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
516 static struct resource bfin_sport1_uart_resources[] = {
518 .start = SPORT1_TCR1,
519 .end = SPORT1_MRCS3+4,
520 .flags = IORESOURCE_MEM,
523 .start = IRQ_SPORT1_RX,
524 .end = IRQ_SPORT1_RX+1,
525 .flags = IORESOURCE_IRQ,
528 .start = IRQ_SPORT1_ERROR,
529 .end = IRQ_SPORT1_ERROR,
530 .flags = IORESOURCE_IRQ,
534 static unsigned short bfin_sport1_peripherals[] = {
535 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
536 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
539 static struct platform_device bfin_sport1_uart_device = {
540 .name = "bfin-sport-uart",
541 .id = 1,
542 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
543 .resource = bfin_sport1_uart_resources,
544 .dev = {
545 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
548 #endif
549 #endif
551 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
552 #include <linux/bfin_mac.h>
553 static const unsigned short bfin_mac_peripherals[] = P_MII0;
555 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
557 .addr = 1,
558 .irq = IRQ_MAC_PHYINT,
562 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
563 .phydev_number = 1,
564 .phydev_data = bfin_phydev_data,
565 .phy_mode = PHY_INTERFACE_MODE_MII,
566 .mac_peripherals = bfin_mac_peripherals,
569 static struct platform_device bfin_mii_bus = {
570 .name = "bfin_mii_bus",
571 .dev = {
572 .platform_data = &bfin_mii_bus_data,
576 static struct platform_device bfin_mac_device = {
577 .name = "bfin_mac",
578 .dev = {
579 .platform_data = &bfin_mii_bus,
582 #endif
584 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
585 #define PATA_INT IRQ_PF14
587 static struct pata_platform_info bfin_pata_platform_data = {
588 .ioport_shift = 2,
589 .irq_type = IRQF_TRIGGER_HIGH,
592 static struct resource bfin_pata_resources[] = {
594 .start = 0x2030C000,
595 .end = 0x2030C01F,
596 .flags = IORESOURCE_MEM,
599 .start = 0x2030D018,
600 .end = 0x2030D01B,
601 .flags = IORESOURCE_MEM,
604 .start = PATA_INT,
605 .end = PATA_INT,
606 .flags = IORESOURCE_IRQ,
610 static struct platform_device bfin_pata_device = {
611 .name = "pata_platform",
612 .id = -1,
613 .num_resources = ARRAY_SIZE(bfin_pata_resources),
614 .resource = bfin_pata_resources,
615 .dev = {
616 .platform_data = &bfin_pata_platform_data,
619 #endif
621 static const unsigned int cclk_vlev_datasheet[] =
623 VRPAIR(VLEV_085, 250000000),
624 VRPAIR(VLEV_090, 376000000),
625 VRPAIR(VLEV_095, 426000000),
626 VRPAIR(VLEV_100, 426000000),
627 VRPAIR(VLEV_105, 476000000),
628 VRPAIR(VLEV_110, 476000000),
629 VRPAIR(VLEV_115, 476000000),
630 VRPAIR(VLEV_120, 500000000),
631 VRPAIR(VLEV_125, 533000000),
632 VRPAIR(VLEV_130, 600000000),
635 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
636 .tuple_tab = cclk_vlev_datasheet,
637 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
638 .vr_settling_time = 25 /* us */,
641 static struct platform_device bfin_dpmc = {
642 .name = "bfin dpmc",
643 .dev = {
644 .platform_data = &bfin_dmpc_vreg_data,
648 static struct platform_device *cm_bf537u_devices[] __initdata = {
650 &bfin_dpmc,
652 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
653 &hitachi_fb_device,
654 #endif
656 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
657 &rtc_device,
658 #endif
660 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
661 #ifdef CONFIG_SERIAL_BFIN_UART0
662 &bfin_uart0_device,
663 #endif
664 #ifdef CONFIG_SERIAL_BFIN_UART1
665 &bfin_uart1_device,
666 #endif
667 #endif
669 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
670 #ifdef CONFIG_BFIN_SIR0
671 &bfin_sir0_device,
672 #endif
673 #ifdef CONFIG_BFIN_SIR1
674 &bfin_sir1_device,
675 #endif
676 #endif
678 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
679 &i2c_bfin_twi_device,
680 #endif
682 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
683 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
684 &bfin_sport0_uart_device,
685 #endif
686 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
687 &bfin_sport1_uart_device,
688 #endif
689 #endif
691 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
692 &isp1362_hcd_device,
693 #endif
695 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
696 &smc91x_device,
697 #endif
699 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
700 &bfin_mii_bus,
701 &bfin_mac_device,
702 #endif
704 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
705 &net2272_bfin_device,
706 #endif
708 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
709 &bfin_spi0_device,
710 #endif
712 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
713 &bfin_pata_device,
714 #endif
716 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
717 &cm_flash_device,
718 #endif
721 static int __init net2272_init(void)
723 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
724 int ret;
726 ret = gpio_request(GPIO_PH15, driver_name);
727 if (ret)
728 return ret;
730 ret = gpio_request(GPIO_PH13, "net2272");
731 if (ret) {
732 gpio_free(GPIO_PH15);
733 return ret;
736 /* Set PH15 Low make /AMS2 work properly */
737 gpio_direction_output(GPIO_PH15, 0);
739 /* enable CLKBUF output */
740 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
742 /* Reset the USB chip */
743 gpio_direction_output(GPIO_PH13, 0);
744 mdelay(2);
745 gpio_set_value(GPIO_PH13, 1);
746 #endif
748 return 0;
751 static int __init cm_bf537u_init(void)
753 printk(KERN_INFO "%s(): registering device resources\n", __func__);
754 platform_add_devices(cm_bf537u_devices, ARRAY_SIZE(cm_bf537u_devices));
755 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
756 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
757 #endif
759 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
760 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
761 #endif
763 if (net2272_init())
764 pr_warning("unable to configure net2272; it probably won't work\n");
766 return 0;
769 arch_initcall(cm_bf537u_init);
771 static struct platform_device *cm_bf537u_early_devices[] __initdata = {
772 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
773 #ifdef CONFIG_SERIAL_BFIN_UART0
774 &bfin_uart0_device,
775 #endif
776 #ifdef CONFIG_SERIAL_BFIN_UART1
777 &bfin_uart1_device,
778 #endif
779 #endif
781 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
782 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
783 &bfin_sport0_uart_device,
784 #endif
785 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
786 &bfin_sport1_uart_device,
787 #endif
788 #endif
791 void __init native_machine_early_platform_add_devices(void)
793 printk(KERN_INFO "register early platform devices\n");
794 early_platform_add_devices(cm_bf537u_early_devices,
795 ARRAY_SIZE(cm_bf537u_early_devices));
798 int bfin_get_ether_addr(char *addr)
800 return 1;
802 EXPORT_SYMBOL(bfin_get_ether_addr);