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Linux 3.11-rc3
[cris-mirror.git] / arch / blackfin / mach-bf548 / boards / ezkit.c
blob372eb54944eff3cbb12269c7a69947f9b1c86ee4
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <asm/bfin5xx_spi.h>
21 #include <asm/dma.h>
22 #include <asm/gpio.h>
23 #include <asm/nand.h>
24 #include <asm/dpmc.h>
25 #include <asm/bfin_sport.h>
26 #include <asm/portmux.h>
27 #include <asm/bfin_sdh.h>
28 #include <mach/bf54x_keys.h>
29 #include <linux/input.h>
30 #include <linux/spi/ad7877.h>
31
32 /*
33 * Name the Board for the /proc/cpuinfo
34 */
35 const char bfin_board_name[] = "ADI BF548-EZKIT";
36
37 /*
38 * Driver needs to know address, irq and flag pin.
39 */
40
41 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
42 #include <linux/usb/isp1760.h>
43 static struct resource bfin_isp1760_resources[] = {
44 [0] = {
45 .start = 0x2C0C0000,
46 .end = 0x2C0C0000 + 0xfffff,
47 .flags = IORESOURCE_MEM,
48 },
49 [1] = {
50 .start = IRQ_PG7,
51 .end = IRQ_PG7,
52 .flags = IORESOURCE_IRQ,
53 },
54 };
55
56 static struct isp1760_platform_data isp1760_priv = {
57 .is_isp1761 = 0,
58 .bus_width_16 = 1,
59 .port1_otg = 0,
60 .analog_oc = 0,
61 .dack_polarity_high = 0,
62 .dreq_polarity_high = 0,
63 };
64
65 static struct platform_device bfin_isp1760_device = {
66 .name = "isp1760",
67 .id = 0,
68 .dev = {
69 .platform_data = &isp1760_priv,
70 },
71 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
72 .resource = bfin_isp1760_resources,
73 };
74 #endif
75
76 #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
77
78 #include <mach/bf54x-lq043.h>
79
80 static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
81 .width = 95,
82 .height = 54,
83 .xres = {480, 480, 480},
84 .yres = {272, 272, 272},
85 .bpp = {24, 24, 24},
86 .disp = GPIO_PE3,
87 };
88
89 static struct resource bf54x_lq043_resources[] = {
90 {
91 .start = IRQ_EPPI0_ERR,
92 .end = IRQ_EPPI0_ERR,
93 .flags = IORESOURCE_IRQ,
94 },
95 };
96
97 static struct platform_device bf54x_lq043_device = {
98 .name = "bf54x-lq043",
99 .id = -1,
100 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
101 .resource = bf54x_lq043_resources,
102 .dev = {
103 .platform_data = &bf54x_lq043_data,
104 },
105 };
106 #endif
107
108 #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
109 static const unsigned int bf548_keymap[] = {
110 KEYVAL(0, 0, KEY_ENTER),
111 KEYVAL(0, 1, KEY_HELP),
112 KEYVAL(0, 2, KEY_0),
113 KEYVAL(0, 3, KEY_BACKSPACE),
114 KEYVAL(1, 0, KEY_TAB),
115 KEYVAL(1, 1, KEY_9),
116 KEYVAL(1, 2, KEY_8),
117 KEYVAL(1, 3, KEY_7),
118 KEYVAL(2, 0, KEY_DOWN),
119 KEYVAL(2, 1, KEY_6),
120 KEYVAL(2, 2, KEY_5),
121 KEYVAL(2, 3, KEY_4),
122 KEYVAL(3, 0, KEY_UP),
123 KEYVAL(3, 1, KEY_3),
124 KEYVAL(3, 2, KEY_2),
125 KEYVAL(3, 3, KEY_1),
126 };
127
128 static struct bfin_kpad_platform_data bf54x_kpad_data = {
129 .rows = 4,
130 .cols = 4,
131 .keymap = bf548_keymap,
132 .keymapsize = ARRAY_SIZE(bf548_keymap),
133 .repeat = 0,
134 .debounce_time = 5000, /* ns (5ms) */
135 .coldrive_time = 1000, /* ns (1ms) */
136 .keyup_test_interval = 50, /* ms (50ms) */
137 };
138
139 static struct resource bf54x_kpad_resources[] = {
140 {
141 .start = IRQ_KEY,
142 .end = IRQ_KEY,
143 .flags = IORESOURCE_IRQ,
144 },
145 };
146
147 static struct platform_device bf54x_kpad_device = {
148 .name = "bf54x-keys",
149 .id = -1,
150 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
151 .resource = bf54x_kpad_resources,
152 .dev = {
153 .platform_data = &bf54x_kpad_data,
154 },
155 };
156 #endif
157
158 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
159 #include <asm/bfin_rotary.h>
160
161 static struct bfin_rotary_platform_data bfin_rotary_data = {
162 /*.rotary_up_key = KEY_UP,*/
163 /*.rotary_down_key = KEY_DOWN,*/
164 .rotary_rel_code = REL_WHEEL,
165 .rotary_button_key = KEY_ENTER,
166 .debounce = 10, /* 0..17 */
167 .mode = ROT_QUAD_ENC | ROT_DEBE,
168 .pm_wakeup = 1,
169 };
170
171 static struct resource bfin_rotary_resources[] = {
172 {
173 .start = IRQ_CNT,
174 .end = IRQ_CNT,
175 .flags = IORESOURCE_IRQ,
176 },
177 };
178
179 static struct platform_device bfin_rotary_device = {
180 .name = "bfin-rotary",
181 .id = -1,
182 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
183 .resource = bfin_rotary_resources,
184 .dev = {
185 .platform_data = &bfin_rotary_data,
186 },
187 };
188 #endif
189
190 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
191 #include <linux/input/adxl34x.h>
192 static const struct adxl34x_platform_data adxl34x_info = {
193 .x_axis_offset = 0,
194 .y_axis_offset = 0,
195 .z_axis_offset = 0,
196 .tap_threshold = 0x31,
197 .tap_duration = 0x10,
198 .tap_latency = 0x60,
199 .tap_window = 0xF0,
200 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
201 .act_axis_control = 0xFF,
202 .activity_threshold = 5,
203 .inactivity_threshold = 3,
204 .inactivity_time = 4,
205 .free_fall_threshold = 0x7,
206 .free_fall_time = 0x20,
207 .data_rate = 0x8,
208 .data_range = ADXL_FULL_RES,
209
210 .ev_type = EV_ABS,
211 .ev_code_x = ABS_X, /* EV_REL */
212 .ev_code_y = ABS_Y, /* EV_REL */
213 .ev_code_z = ABS_Z, /* EV_REL */
214
215 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
216
217 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
218 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
219 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
220 .fifo_mode = ADXL_FIFO_STREAM,
221 .orientation_enable = ADXL_EN_ORIENTATION_3D,
222 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
223 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
224 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
225 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
226 };
227 #endif
228
229 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
230 static struct platform_device rtc_device = {
231 .name = "rtc-bfin",
232 .id = -1,
233 };
234 #endif
235
236 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
237 #ifdef CONFIG_SERIAL_BFIN_UART0
238 static struct resource bfin_uart0_resources[] = {
239 {
240 .start = UART0_DLL,
241 .end = UART0_RBR+2,
242 .flags = IORESOURCE_MEM,
243 },
244 {
245 .start = IRQ_UART0_TX,
246 .end = IRQ_UART0_TX,
247 .flags = IORESOURCE_IRQ,
248 },
249 {
250 .start = IRQ_UART0_RX,
251 .end = IRQ_UART0_RX,
252 .flags = IORESOURCE_IRQ,
253 },
254 {
255 .start = IRQ_UART0_ERROR,
256 .end = IRQ_UART0_ERROR,
257 .flags = IORESOURCE_IRQ,
258 },
259 {
260 .start = CH_UART0_TX,
261 .end = CH_UART0_TX,
262 .flags = IORESOURCE_DMA,
263 },
264 {
265 .start = CH_UART0_RX,
266 .end = CH_UART0_RX,
267 .flags = IORESOURCE_DMA,
268 },
269 };
270
271 static unsigned short bfin_uart0_peripherals[] = {
272 P_UART0_TX, P_UART0_RX, 0
273 };
274
275 static struct platform_device bfin_uart0_device = {
276 .name = "bfin-uart",
277 .id = 0,
278 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
279 .resource = bfin_uart0_resources,
280 .dev = {
281 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
282 },
283 };
284 #endif
285 #ifdef CONFIG_SERIAL_BFIN_UART1
286 static struct resource bfin_uart1_resources[] = {
287 {
288 .start = UART1_DLL,
289 .end = UART1_RBR+2,
290 .flags = IORESOURCE_MEM,
291 },
292 {
293 .start = IRQ_UART1_TX,
294 .end = IRQ_UART1_TX,
295 .flags = IORESOURCE_IRQ,
296 },
297 {
298 .start = IRQ_UART1_RX,
299 .end = IRQ_UART1_RX,
300 .flags = IORESOURCE_IRQ,
301 },
302 {
303 .start = IRQ_UART1_ERROR,
304 .end = IRQ_UART1_ERROR,
305 .flags = IORESOURCE_IRQ,
306 },
307 {
308 .start = CH_UART1_TX,
309 .end = CH_UART1_TX,
310 .flags = IORESOURCE_DMA,
311 },
312 {
313 .start = CH_UART1_RX,
314 .end = CH_UART1_RX,
315 .flags = IORESOURCE_DMA,
316 },
317 #ifdef CONFIG_BFIN_UART1_CTSRTS
318 { /* CTS pin -- 0 means not supported */
319 .start = GPIO_PE10,
320 .end = GPIO_PE10,
321 .flags = IORESOURCE_IO,
322 },
323 { /* RTS pin -- 0 means not supported */
324 .start = GPIO_PE9,
325 .end = GPIO_PE9,
326 .flags = IORESOURCE_IO,
327 },
328 #endif
329 };
330
331 static unsigned short bfin_uart1_peripherals[] = {
332 P_UART1_TX, P_UART1_RX,
333 #ifdef CONFIG_BFIN_UART1_CTSRTS
334 P_UART1_RTS, P_UART1_CTS,
335 #endif
336 0
337 };
338
339 static struct platform_device bfin_uart1_device = {
340 .name = "bfin-uart",
341 .id = 1,
342 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
343 .resource = bfin_uart1_resources,
344 .dev = {
345 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
346 },
347 };
348 #endif
349 #ifdef CONFIG_SERIAL_BFIN_UART2
350 static struct resource bfin_uart2_resources[] = {
351 {
352 .start = UART2_DLL,
353 .end = UART2_RBR+2,
354 .flags = IORESOURCE_MEM,
355 },
356 {
357 .start = IRQ_UART2_TX,
358 .end = IRQ_UART2_TX,
359 .flags = IORESOURCE_IRQ,
360 },
361 {
362 .start = IRQ_UART2_RX,
363 .end = IRQ_UART2_RX,
364 .flags = IORESOURCE_IRQ,
365 },
366 {
367 .start = IRQ_UART2_ERROR,
368 .end = IRQ_UART2_ERROR,
369 .flags = IORESOURCE_IRQ,
370 },
371 {
372 .start = CH_UART2_TX,
373 .end = CH_UART2_TX,
374 .flags = IORESOURCE_DMA,
375 },
376 {
377 .start = CH_UART2_RX,
378 .end = CH_UART2_RX,
379 .flags = IORESOURCE_DMA,
380 },
381 };
382
383 static unsigned short bfin_uart2_peripherals[] = {
384 P_UART2_TX, P_UART2_RX, 0
385 };
386
387 static struct platform_device bfin_uart2_device = {
388 .name = "bfin-uart",
389 .id = 2,
390 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
391 .resource = bfin_uart2_resources,
392 .dev = {
393 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
394 },
395 };
396 #endif
397 #ifdef CONFIG_SERIAL_BFIN_UART3
398 static struct resource bfin_uart3_resources[] = {
399 {
400 .start = UART3_DLL,
401 .end = UART3_RBR+2,
402 .flags = IORESOURCE_MEM,
403 },
404 {
405 .start = IRQ_UART3_TX,
406 .end = IRQ_UART3_TX,
407 .flags = IORESOURCE_IRQ,
408 },
409 {
410 .start = IRQ_UART3_RX,
411 .end = IRQ_UART3_RX,
412 .flags = IORESOURCE_IRQ,
413 },
414 {
415 .start = IRQ_UART3_ERROR,
416 .end = IRQ_UART3_ERROR,
417 .flags = IORESOURCE_IRQ,
418 },
419 {
420 .start = CH_UART3_TX,
421 .end = CH_UART3_TX,
422 .flags = IORESOURCE_DMA,
423 },
424 {
425 .start = CH_UART3_RX,
426 .end = CH_UART3_RX,
427 .flags = IORESOURCE_DMA,
428 },
429 #ifdef CONFIG_BFIN_UART3_CTSRTS
430 { /* CTS pin -- 0 means not supported */
431 .start = GPIO_PB3,
432 .end = GPIO_PB3,
433 .flags = IORESOURCE_IO,
434 },
435 { /* RTS pin -- 0 means not supported */
436 .start = GPIO_PB2,
437 .end = GPIO_PB2,
438 .flags = IORESOURCE_IO,
439 },
440 #endif
441 };
442
443 static unsigned short bfin_uart3_peripherals[] = {
444 P_UART3_TX, P_UART3_RX,
445 #ifdef CONFIG_BFIN_UART3_CTSRTS
446 P_UART3_RTS, P_UART3_CTS,
447 #endif
448 0
449 };
450
451 static struct platform_device bfin_uart3_device = {
452 .name = "bfin-uart",
453 .id = 3,
454 .num_resources = ARRAY_SIZE(bfin_uart3_resources),
455 .resource = bfin_uart3_resources,
456 .dev = {
457 .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
458 },
459 };
460 #endif
461 #endif
462
463 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
464 #ifdef CONFIG_BFIN_SIR0
465 static struct resource bfin_sir0_resources[] = {
466 {
467 .start = 0xFFC00400,
468 .end = 0xFFC004FF,
469 .flags = IORESOURCE_MEM,
470 },
471 {
472 .start = IRQ_UART0_RX,
473 .end = IRQ_UART0_RX+1,
474 .flags = IORESOURCE_IRQ,
475 },
476 {
477 .start = CH_UART0_RX,
478 .end = CH_UART0_RX+1,
479 .flags = IORESOURCE_DMA,
480 },
481 };
482 static struct platform_device bfin_sir0_device = {
483 .name = "bfin_sir",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
486 .resource = bfin_sir0_resources,
487 };
488 #endif
489 #ifdef CONFIG_BFIN_SIR1
490 static struct resource bfin_sir1_resources[] = {
491 {
492 .start = 0xFFC02000,
493 .end = 0xFFC020FF,
494 .flags = IORESOURCE_MEM,
495 },
496 {
497 .start = IRQ_UART1_RX,
498 .end = IRQ_UART1_RX+1,
499 .flags = IORESOURCE_IRQ,
500 },
501 {
502 .start = CH_UART1_RX,
503 .end = CH_UART1_RX+1,
504 .flags = IORESOURCE_DMA,
505 },
506 };
507 static struct platform_device bfin_sir1_device = {
508 .name = "bfin_sir",
509 .id = 1,
510 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
511 .resource = bfin_sir1_resources,
512 };
513 #endif
514 #ifdef CONFIG_BFIN_SIR2
515 static struct resource bfin_sir2_resources[] = {
516 {
517 .start = 0xFFC02100,
518 .end = 0xFFC021FF,
519 .flags = IORESOURCE_MEM,
520 },
521 {
522 .start = IRQ_UART2_RX,
523 .end = IRQ_UART2_RX+1,
524 .flags = IORESOURCE_IRQ,
525 },
526 {
527 .start = CH_UART2_RX,
528 .end = CH_UART2_RX+1,
529 .flags = IORESOURCE_DMA,
530 },
531 };
532 static struct platform_device bfin_sir2_device = {
533 .name = "bfin_sir",
534 .id = 2,
535 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
536 .resource = bfin_sir2_resources,
537 };
538 #endif
539 #ifdef CONFIG_BFIN_SIR3
540 static struct resource bfin_sir3_resources[] = {
541 {
542 .start = 0xFFC03100,
543 .end = 0xFFC031FF,
544 .flags = IORESOURCE_MEM,
545 },
546 {
547 .start = IRQ_UART3_RX,
548 .end = IRQ_UART3_RX+1,
549 .flags = IORESOURCE_IRQ,
550 },
551 {
552 .start = CH_UART3_RX,
553 .end = CH_UART3_RX+1,
554 .flags = IORESOURCE_DMA,
555 },
556 };
557 static struct platform_device bfin_sir3_device = {
558 .name = "bfin_sir",
559 .id = 3,
560 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
561 .resource = bfin_sir3_resources,
562 };
563 #endif
564 #endif
565
566 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
567 #include <linux/smsc911x.h>
568
569 static struct resource smsc911x_resources[] = {
570 {
571 .name = "smsc911x-memory",
572 .start = 0x24000000,
573 .end = 0x24000000 + 0xFF,
574 .flags = IORESOURCE_MEM,
575 },
576 {
577 .start = IRQ_PE8,
578 .end = IRQ_PE8,
579 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
580 },
581 };
582
583 static struct smsc911x_platform_config smsc911x_config = {
584 .flags = SMSC911X_USE_32BIT,
585 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
586 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
587 .phy_interface = PHY_INTERFACE_MODE_MII,
588 };
589
590 static struct platform_device smsc911x_device = {
591 .name = "smsc911x",
592 .id = 0,
593 .num_resources = ARRAY_SIZE(smsc911x_resources),
594 .resource = smsc911x_resources,
595 .dev = {
596 .platform_data = &smsc911x_config,
597 },
598 };
599 #endif
600
601 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
602 static struct resource musb_resources[] = {
603 [0] = {
604 .start = 0xFFC03C00,
605 .end = 0xFFC040FF,
606 .flags = IORESOURCE_MEM,
607 },
608 [1] = { /* general IRQ */
609 .start = IRQ_USB_INT0,
610 .end = IRQ_USB_INT0,
611 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
612 .name = "mc"
613 },
614 [2] = { /* DMA IRQ */
615 .start = IRQ_USB_DMA,
616 .end = IRQ_USB_DMA,
617 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
618 .name = "dma"
619 },
620 };
621
622 static struct musb_hdrc_config musb_config = {
623 .multipoint = 0,
624 .dyn_fifo = 0,
625 .soft_con = 1,
626 .dma = 1,
627 .num_eps = 8,
628 .dma_channels = 8,
629 .gpio_vrsel = GPIO_PE7,
630 /* Some custom boards need to be active low, just set it to "0"
631 * if it is the case.
632 */
633 .gpio_vrsel_active = 1,
634 .clkin = 24, /* musb CLKIN in MHZ */
635 };
636
637 static struct musb_hdrc_platform_data musb_plat = {
638 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
639 .mode = MUSB_OTG,
640 #elif defined(CONFIG_USB_MUSB_HDRC)
641 .mode = MUSB_HOST,
642 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
643 .mode = MUSB_PERIPHERAL,
644 #endif
645 .config = &musb_config,
646 };
647
648 static u64 musb_dmamask = ~(u32)0;
649
650 static struct platform_device musb_device = {
651 .name = "musb-blackfin",
652 .id = 0,
653 .dev = {
654 .dma_mask = &musb_dmamask,
655 .coherent_dma_mask = 0xffffffff,
656 .platform_data = &musb_plat,
657 },
658 .num_resources = ARRAY_SIZE(musb_resources),
659 .resource = musb_resources,
660 };
661 #endif
662
663 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
664 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
665 static struct resource bfin_sport0_uart_resources[] = {
666 {
667 .start = SPORT0_TCR1,
668 .end = SPORT0_MRCS3+4,
669 .flags = IORESOURCE_MEM,
670 },
671 {
672 .start = IRQ_SPORT0_RX,
673 .end = IRQ_SPORT0_RX+1,
674 .flags = IORESOURCE_IRQ,
675 },
676 {
677 .start = IRQ_SPORT0_ERROR,
678 .end = IRQ_SPORT0_ERROR,
679 .flags = IORESOURCE_IRQ,
680 },
681 };
682
683 static unsigned short bfin_sport0_peripherals[] = {
684 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
685 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
686 };
687
688 static struct platform_device bfin_sport0_uart_device = {
689 .name = "bfin-sport-uart",
690 .id = 0,
691 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
692 .resource = bfin_sport0_uart_resources,
693 .dev = {
694 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
695 },
696 };
697 #endif
698 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
699 static struct resource bfin_sport1_uart_resources[] = {
700 {
701 .start = SPORT1_TCR1,
702 .end = SPORT1_MRCS3+4,
703 .flags = IORESOURCE_MEM,
704 },
705 {
706 .start = IRQ_SPORT1_RX,
707 .end = IRQ_SPORT1_RX+1,
708 .flags = IORESOURCE_IRQ,
709 },
710 {
711 .start = IRQ_SPORT1_ERROR,
712 .end = IRQ_SPORT1_ERROR,
713 .flags = IORESOURCE_IRQ,
714 },
715 };
716
717 static unsigned short bfin_sport1_peripherals[] = {
718 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
719 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
720 };
721
722 static struct platform_device bfin_sport1_uart_device = {
723 .name = "bfin-sport-uart",
724 .id = 1,
725 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
726 .resource = bfin_sport1_uart_resources,
727 .dev = {
728 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
729 },
730 };
731 #endif
732 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
733 static struct resource bfin_sport2_uart_resources[] = {
734 {
735 .start = SPORT2_TCR1,
736 .end = SPORT2_MRCS3+4,
737 .flags = IORESOURCE_MEM,
738 },
739 {
740 .start = IRQ_SPORT2_RX,
741 .end = IRQ_SPORT2_RX+1,
742 .flags = IORESOURCE_IRQ,
743 },
744 {
745 .start = IRQ_SPORT2_ERROR,
746 .end = IRQ_SPORT2_ERROR,
747 .flags = IORESOURCE_IRQ,
748 },
749 };
750
751 static unsigned short bfin_sport2_peripherals[] = {
752 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
753 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
754 };
755
756 static struct platform_device bfin_sport2_uart_device = {
757 .name = "bfin-sport-uart",
758 .id = 2,
759 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
760 .resource = bfin_sport2_uart_resources,
761 .dev = {
762 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
763 },
764 };
765 #endif
766 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
767 static struct resource bfin_sport3_uart_resources[] = {
768 {
769 .start = SPORT3_TCR1,
770 .end = SPORT3_MRCS3+4,
771 .flags = IORESOURCE_MEM,
772 },
773 {
774 .start = IRQ_SPORT3_RX,
775 .end = IRQ_SPORT3_RX+1,
776 .flags = IORESOURCE_IRQ,
777 },
778 {
779 .start = IRQ_SPORT3_ERROR,
780 .end = IRQ_SPORT3_ERROR,
781 .flags = IORESOURCE_IRQ,
782 },
783 };
784
785 static unsigned short bfin_sport3_peripherals[] = {
786 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
787 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
788 };
789
790 static struct platform_device bfin_sport3_uart_device = {
791 .name = "bfin-sport-uart",
792 .id = 3,
793 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
794 .resource = bfin_sport3_uart_resources,
795 .dev = {
796 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
797 },
798 };
799 #endif
800 #endif
801
802 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
803
804 static unsigned short bfin_can0_peripherals[] = {
805 P_CAN0_RX, P_CAN0_TX, 0
806 };
807
808 static struct resource bfin_can0_resources[] = {
809 {
810 .start = 0xFFC02A00,
811 .end = 0xFFC02FFF,
812 .flags = IORESOURCE_MEM,
813 },
814 {
815 .start = IRQ_CAN0_RX,
816 .end = IRQ_CAN0_RX,
817 .flags = IORESOURCE_IRQ,
818 },
819 {
820 .start = IRQ_CAN0_TX,
821 .end = IRQ_CAN0_TX,
822 .flags = IORESOURCE_IRQ,
823 },
824 {
825 .start = IRQ_CAN0_ERROR,
826 .end = IRQ_CAN0_ERROR,
827 .flags = IORESOURCE_IRQ,
828 },
829 };
830
831 static struct platform_device bfin_can0_device = {
832 .name = "bfin_can",
833 .id = 0,
834 .num_resources = ARRAY_SIZE(bfin_can0_resources),
835 .resource = bfin_can0_resources,
836 .dev = {
837 .platform_data = &bfin_can0_peripherals, /* Passed to driver */
838 },
839 };
840
841 static unsigned short bfin_can1_peripherals[] = {
842 P_CAN1_RX, P_CAN1_TX, 0
843 };
844
845 static struct resource bfin_can1_resources[] = {
846 {
847 .start = 0xFFC03200,
848 .end = 0xFFC037FF,
849 .flags = IORESOURCE_MEM,
850 },
851 {
852 .start = IRQ_CAN1_RX,
853 .end = IRQ_CAN1_RX,
854 .flags = IORESOURCE_IRQ,
855 },
856 {
857 .start = IRQ_CAN1_TX,
858 .end = IRQ_CAN1_TX,
859 .flags = IORESOURCE_IRQ,
860 },
861 {
862 .start = IRQ_CAN1_ERROR,
863 .end = IRQ_CAN1_ERROR,
864 .flags = IORESOURCE_IRQ,
865 },
866 };
867
868 static struct platform_device bfin_can1_device = {
869 .name = "bfin_can",
870 .id = 1,
871 .num_resources = ARRAY_SIZE(bfin_can1_resources),
872 .resource = bfin_can1_resources,
873 .dev = {
874 .platform_data = &bfin_can1_peripherals, /* Passed to driver */
875 },
876 };
877
878 #endif
879
880 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
881 static struct resource bfin_atapi_resources[] = {
882 {
883 .start = 0xFFC03800,
884 .end = 0xFFC0386F,
885 .flags = IORESOURCE_MEM,
886 },
887 {
888 .start = IRQ_ATAPI_ERR,
889 .end = IRQ_ATAPI_ERR,
890 .flags = IORESOURCE_IRQ,
891 },
892 };
893
894 static struct platform_device bfin_atapi_device = {
895 .name = "pata-bf54x",
896 .id = -1,
897 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
898 .resource = bfin_atapi_resources,
899 };
900 #endif
901
902 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
903 static struct mtd_partition partition_info[] = {
904 {
905 .name = "bootloader(nand)",
906 .offset = 0,
907 .size = 0x80000,
908 }, {
909 .name = "linux kernel(nand)",
910 .offset = MTDPART_OFS_APPEND,
911 .size = 4 * 1024 * 1024,
912 },
913 {
914 .name = "file system(nand)",
915 .offset = MTDPART_OFS_APPEND,
916 .size = MTDPART_SIZ_FULL,
917 },
918 };
919
920 static struct bf5xx_nand_platform bf5xx_nand_platform = {
921 .data_width = NFC_NWIDTH_8,
922 .partitions = partition_info,
923 .nr_partitions = ARRAY_SIZE(partition_info),
924 .rd_dly = 3,
925 .wr_dly = 3,
926 };
927
928 static struct resource bf5xx_nand_resources[] = {
929 {
930 .start = 0xFFC03B00,
931 .end = 0xFFC03B4F,
932 .flags = IORESOURCE_MEM,
933 },
934 {
935 .start = CH_NFC,
936 .end = CH_NFC,
937 .flags = IORESOURCE_IRQ,
938 },
939 };
940
941 static struct platform_device bf5xx_nand_device = {
942 .name = "bf5xx-nand",
943 .id = 0,
944 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
945 .resource = bf5xx_nand_resources,
946 .dev = {
947 .platform_data = &bf5xx_nand_platform,
948 },
949 };
950 #endif
951
952 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
953
954 static struct bfin_sd_host bfin_sdh_data = {
955 .dma_chan = CH_SDH,
956 .irq_int0 = IRQ_SDH_MASK0,
957 .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
958 };
959
960 static struct platform_device bf54x_sdh_device = {
961 .name = "bfin-sdh",
962 .id = 0,
963 .dev = {
964 .platform_data = &bfin_sdh_data,
965 },
966 };
967 #endif
968
969 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
970 static struct mtd_partition ezkit_partitions[] = {
971 {
972 .name = "bootloader(nor)",
973 .size = 0x80000,
974 .offset = 0,
975 }, {
976 .name = "linux kernel(nor)",
977 .size = 0x400000,
978 .offset = MTDPART_OFS_APPEND,
979 }, {
980 .name = "file system(nor)",
981 .size = 0x1000000 - 0x80000 - 0x400000 - 0x8000 * 4,
982 .offset = MTDPART_OFS_APPEND,
983 }, {
984 .name = "config(nor)",
985 .size = 0x8000 * 3,
986 .offset = MTDPART_OFS_APPEND,
987 }, {
988 .name = "u-boot env(nor)",
989 .size = 0x8000,
990 .offset = MTDPART_OFS_APPEND,
991 }
992 };
993
994 static struct physmap_flash_data ezkit_flash_data = {
995 .width = 2,
996 .parts = ezkit_partitions,
997 .nr_parts = ARRAY_SIZE(ezkit_partitions),
998 };
999
1000 static struct resource ezkit_flash_resource = {
1001 .start = 0x20000000,
1002 .end = 0x21ffffff,
1003 .flags = IORESOURCE_MEM,
1004 };
1005
1006 static struct platform_device ezkit_flash_device = {
1007 .name = "physmap-flash",
1008 .id = 0,
1009 .dev = {
1010 .platform_data = &ezkit_flash_data,
1011 },
1012 .num_resources = 1,
1013 .resource = &ezkit_flash_resource,
1014 };
1015 #endif
1016
1017 #if defined(CONFIG_MTD_M25P80) \
1018 || defined(CONFIG_MTD_M25P80_MODULE)
1019 /* SPI flash chip (m25p16) */
1020 static struct mtd_partition bfin_spi_flash_partitions[] = {
1021 {
1022 .name = "bootloader(spi)",
1023 .size = 0x00080000,
1024 .offset = 0,
1025 .mask_flags = MTD_CAP_ROM
1026 }, {
1027 .name = "linux kernel(spi)",
1028 .size = MTDPART_SIZ_FULL,
1029 .offset = MTDPART_OFS_APPEND,
1030 }
1031 };
1032
1033 static struct flash_platform_data bfin_spi_flash_data = {
1034 .name = "m25p80",
1035 .parts = bfin_spi_flash_partitions,
1036 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
1037 .type = "m25p16",
1038 };
1039
1040 static struct bfin5xx_spi_chip spi_flash_chip_info = {
1041 .enable_dma = 0, /* use dma transfer with this chip*/
1042 };
1043 #endif
1044
1045 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1046 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
1047 .model = 7877,
1048 .vref_delay_usecs = 50, /* internal, no capacitor */
1049 .x_plate_ohms = 419,
1050 .y_plate_ohms = 486,
1051 .pressure_max = 1000,
1052 .pressure_min = 0,
1053 .stopacq_polarity = 1,
1054 .first_conversion_delay = 3,
1055 .acquisition_time = 1,
1056 .averaging = 1,
1057 .pen_down_acc_interval = 1,
1058 };
1059 #endif
1060
1061 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1062 #if defined(CONFIG_MTD_M25P80) \
1063 || defined(CONFIG_MTD_M25P80_MODULE)
1064 {
1065 /* the modalias must be the same as spi device driver name */
1066 .modalias = "m25p80", /* Name of spi_driver for this device */
1067 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
1068 .bus_num = 0, /* Framework bus number */
1069 .chip_select = 1, /* SPI_SSEL1*/
1070 .platform_data = &bfin_spi_flash_data,
1071 .controller_data = &spi_flash_chip_info,
1072 .mode = SPI_MODE_3,
1073 },
1074 #endif
1075 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
1076 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1077 {
1078 .modalias = "ad183x",
1079 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1080 .bus_num = 1,
1081 .chip_select = 4,
1082 },
1083 #endif
1084 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1085 {
1086 .modalias = "ad7877",
1087 .platform_data = &bfin_ad7877_ts_info,
1088 .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
1089 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1090 .bus_num = 0,
1091 .chip_select = 2,
1092 },
1093 #endif
1094 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1095 {
1096 .modalias = "spidev",
1097 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1098 .bus_num = 0,
1099 .chip_select = 1,
1100 },
1101 #endif
1102 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1103 {
1104 .modalias = "adxl34x",
1105 .platform_data = &adxl34x_info,
1106 .irq = IRQ_PC5,
1107 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1108 .bus_num = 1,
1109 .chip_select = 2,
1110 .mode = SPI_MODE_3,
1111 },
1112 #endif
1113 };
1114 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1115 /* SPI (0) */
1116 static struct resource bfin_spi0_resource[] = {
1117 [0] = {
1118 .start = SPI0_REGBASE,
1119 .end = SPI0_REGBASE + 0xFF,
1120 .flags = IORESOURCE_MEM,
1121 },
1122 [1] = {
1123 .start = CH_SPI0,
1124 .end = CH_SPI0,
1125 .flags = IORESOURCE_DMA,
1126 },
1127 [2] = {
1128 .start = IRQ_SPI0,
1129 .end = IRQ_SPI0,
1130 .flags = IORESOURCE_IRQ,
1131 }
1132 };
1133
1134 /* SPI (1) */
1135 static struct resource bfin_spi1_resource[] = {
1136 [0] = {
1137 .start = SPI1_REGBASE,
1138 .end = SPI1_REGBASE + 0xFF,
1139 .flags = IORESOURCE_MEM,
1140 },
1141 [1] = {
1142 .start = CH_SPI1,
1143 .end = CH_SPI1,
1144 .flags = IORESOURCE_DMA,
1145 },
1146 [2] = {
1147 .start = IRQ_SPI1,
1148 .end = IRQ_SPI1,
1149 .flags = IORESOURCE_IRQ,
1150 }
1151 };
1152
1153 /* SPI controller data */
1154 static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
1155 .num_chipselect = 4,
1156 .enable_dma = 1, /* master has the ability to do dma transfer */
1157 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1158 };
1159
1160 static struct platform_device bf54x_spi_master0 = {
1161 .name = "bfin-spi",
1162 .id = 0, /* Bus number */
1163 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1164 .resource = bfin_spi0_resource,
1165 .dev = {
1166 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
1167 },
1168 };
1169
1170 static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
1171 .num_chipselect = 4,
1172 .enable_dma = 1, /* master has the ability to do dma transfer */
1173 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1174 };
1175
1176 static struct platform_device bf54x_spi_master1 = {
1177 .name = "bfin-spi",
1178 .id = 1, /* Bus number */
1179 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1180 .resource = bfin_spi1_resource,
1181 .dev = {
1182 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
1183 },
1184 };
1185 #endif /* spi master and devices */
1186
1187 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1188 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1189 #include <linux/videodev2.h>
1190 #include <media/blackfin/bfin_capture.h>
1191 #include <media/blackfin/ppi.h>
1192
1193 static const unsigned short ppi_req[] = {
1194 P_PPI1_D0, P_PPI1_D1, P_PPI1_D2, P_PPI1_D3,
1195 P_PPI1_D4, P_PPI1_D5, P_PPI1_D6, P_PPI1_D7,
1196 P_PPI1_CLK, P_PPI1_FS1, P_PPI1_FS2,
1197 0,
1198 };
1199
1200 static const struct ppi_info ppi_info = {
1201 .type = PPI_TYPE_EPPI,
1202 .dma_ch = CH_EPPI1,
1203 .irq_err = IRQ_EPPI1_ERROR,
1204 .base = (void __iomem *)EPPI1_STATUS,
1205 .pin_req = ppi_req,
1206 };
1207
1208 #if defined(CONFIG_VIDEO_VS6624) \
1209 || defined(CONFIG_VIDEO_VS6624_MODULE)
1210 static struct v4l2_input vs6624_inputs[] = {
1211 {
1212 .index = 0,
1213 .name = "Camera",
1214 .type = V4L2_INPUT_TYPE_CAMERA,
1215 .std = V4L2_STD_UNKNOWN,
1216 },
1217 };
1218
1219 static struct bcap_route vs6624_routes[] = {
1220 {
1221 .input = 0,
1222 .output = 0,
1223 },
1224 };
1225
1226 static const unsigned vs6624_ce_pin = GPIO_PG6;
1227
1228 static struct bfin_capture_config bfin_capture_data = {
1229 .card_name = "BF548",
1230 .inputs = vs6624_inputs,
1231 .num_inputs = ARRAY_SIZE(vs6624_inputs),
1232 .routes = vs6624_routes,
1233 .i2c_adapter_id = 0,
1234 .board_info = {
1235 .type = "vs6624",
1236 .addr = 0x10,
1237 .platform_data = (void *)&vs6624_ce_pin,
1238 },
1239 .ppi_info = &ppi_info,
1240 .ppi_control = (POLC | PACKEN | DLEN_8 | XFR_TYPE | 0x20),
1241 .int_mask = 0xFFFFFFFF, /* disable error interrupt on eppi */
1242 .blank_clocks = 8, /* 8 clocks as SAV and EAV */
1243 };
1244 #endif
1245
1246 static struct platform_device bfin_capture_device = {
1247 .name = "bfin_capture",
1248 .dev = {
1249 .platform_data = &bfin_capture_data,
1250 },
1251 };
1252 #endif
1253
1254 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1255 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1256
1257 static struct resource bfin_twi0_resource[] = {
1258 [0] = {
1259 .start = TWI0_REGBASE,
1260 .end = TWI0_REGBASE + 0xFF,
1261 .flags = IORESOURCE_MEM,
1262 },
1263 [1] = {
1264 .start = IRQ_TWI0,
1265 .end = IRQ_TWI0,
1266 .flags = IORESOURCE_IRQ,
1267 },
1268 };
1269
1270 static struct platform_device i2c_bfin_twi0_device = {
1271 .name = "i2c-bfin-twi",
1272 .id = 0,
1273 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1274 .resource = bfin_twi0_resource,
1275 .dev = {
1276 .platform_data = &bfin_twi0_pins,
1277 },
1278 };
1279
1280 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1281 static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
1282
1283 static struct resource bfin_twi1_resource[] = {
1284 [0] = {
1285 .start = TWI1_REGBASE,
1286 .end = TWI1_REGBASE + 0xFF,
1287 .flags = IORESOURCE_MEM,
1288 },
1289 [1] = {
1290 .start = IRQ_TWI1,
1291 .end = IRQ_TWI1,
1292 .flags = IORESOURCE_IRQ,
1293 },
1294 };
1295
1296 static struct platform_device i2c_bfin_twi1_device = {
1297 .name = "i2c-bfin-twi",
1298 .id = 1,
1299 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1300 .resource = bfin_twi1_resource,
1301 .dev = {
1302 .platform_data = &bfin_twi1_pins,
1303 },
1304 };
1305 #endif
1306 #endif
1307
1308 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1309 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1310 {
1311 I2C_BOARD_INFO("ssm2602", 0x1b),
1312 },
1313 #endif
1314 };
1315
1316 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1317 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1318 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1319 {
1320 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
1321 },
1322 #endif
1323 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
1324 {
1325 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
1326 .irq = 212,
1327 },
1328 #endif
1329 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1330 {
1331 I2C_BOARD_INFO("adxl34x", 0x53),
1332 .irq = IRQ_PC5,
1333 .platform_data = (void *)&adxl34x_info,
1334 },
1335 #endif
1336 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1337 {
1338 I2C_BOARD_INFO("ad5252", 0x2f),
1339 },
1340 #endif
1341 };
1342 #endif
1343
1344 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1345 #include <linux/gpio_keys.h>
1346
1347 static struct gpio_keys_button bfin_gpio_keys_table[] = {
1348 {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
1349 {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
1350 {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
1351 {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
1352 };
1353
1354 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1355 .buttons = bfin_gpio_keys_table,
1356 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1357 };
1358
1359 static struct platform_device bfin_device_gpiokeys = {
1360 .name = "gpio-keys",
1361 .dev = {
1362 .platform_data = &bfin_gpio_keys_data,
1363 },
1364 };
1365 #endif
1366
1367 static const unsigned int cclk_vlev_datasheet[] =
1368 {
1369 /*
1370 * Internal VLEV BF54XSBBC1533
1371 ****temporarily using these values until data sheet is updated
1372 */
1373 VRPAIR(VLEV_085, 150000000),
1374 VRPAIR(VLEV_090, 250000000),
1375 VRPAIR(VLEV_110, 276000000),
1376 VRPAIR(VLEV_115, 301000000),
1377 VRPAIR(VLEV_120, 525000000),
1378 VRPAIR(VLEV_125, 550000000),
1379 VRPAIR(VLEV_130, 600000000),
1380 };
1381
1382 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1383 .tuple_tab = cclk_vlev_datasheet,
1384 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1385 .vr_settling_time = 25 /* us */,
1386 };
1387
1388 static struct platform_device bfin_dpmc = {
1389 .name = "bfin dpmc",
1390 .dev = {
1391 .platform_data = &bfin_dmpc_vreg_data,
1392 },
1393 };
1394
1395 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
1396 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1397
1398 #define SPORT_REQ(x) \
1399 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
1400 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
1401
1402 static const u16 bfin_snd_pin[][7] = {
1403 SPORT_REQ(0),
1404 SPORT_REQ(1),
1405 SPORT_REQ(2),
1406 SPORT_REQ(3),
1407 };
1408
1409 static struct bfin_snd_platform_data bfin_snd_data[] = {
1410 {
1411 .pin_req = &bfin_snd_pin[0][0],
1412 },
1413 {
1414 .pin_req = &bfin_snd_pin[1][0],
1415 },
1416 {
1417 .pin_req = &bfin_snd_pin[2][0],
1418 },
1419 {
1420 .pin_req = &bfin_snd_pin[3][0],
1421 },
1422 };
1423
1424 #define BFIN_SND_RES(x) \
1425 [x] = { \
1426 { \
1427 .start = SPORT##x##_TCR1, \
1428 .end = SPORT##x##_TCR1, \
1429 .flags = IORESOURCE_MEM \
1430 }, \
1431 { \
1432 .start = CH_SPORT##x##_RX, \
1433 .end = CH_SPORT##x##_RX, \
1434 .flags = IORESOURCE_DMA, \
1435 }, \
1436 { \
1437 .start = CH_SPORT##x##_TX, \
1438 .end = CH_SPORT##x##_TX, \
1439 .flags = IORESOURCE_DMA, \
1440 }, \
1441 { \
1442 .start = IRQ_SPORT##x##_ERROR, \
1443 .end = IRQ_SPORT##x##_ERROR, \
1444 .flags = IORESOURCE_IRQ, \
1445 } \
1446 }
1447
1448 static struct resource bfin_snd_resources[][4] = {
1449 BFIN_SND_RES(0),
1450 BFIN_SND_RES(1),
1451 BFIN_SND_RES(2),
1452 BFIN_SND_RES(3),
1453 };
1454 #endif
1455
1456 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1457 static struct platform_device bfin_i2s_pcm = {
1458 .name = "bfin-i2s-pcm-audio",
1459 .id = -1,
1460 };
1461 #endif
1462
1463 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1464 static struct platform_device bfin_ac97_pcm = {
1465 .name = "bfin-ac97-pcm-audio",
1466 .id = -1,
1467 };
1468 #endif
1469
1470 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
1471 static struct platform_device bfin_ad73311_codec_device = {
1472 .name = "ad73311",
1473 .id = -1,
1474 };
1475 #endif
1476
1477 #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
1478 static struct platform_device bfin_ad1980_codec_device = {
1479 .name = "ad1980",
1480 .id = -1,
1481 };
1482 #endif
1483
1484 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
1485 static struct platform_device bfin_i2s = {
1486 .name = "bfin-i2s",
1487 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1488 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
1489 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
1490 .dev = {
1491 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
1492 },
1493 };
1494 #endif
1495
1496 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
1497 static struct platform_device bfin_ac97 = {
1498 .name = "bfin-ac97",
1499 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1500 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
1501 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
1502 .dev = {
1503 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
1504 },
1505 };
1506 #endif
1507
1508 static struct platform_device *ezkit_devices[] __initdata = {
1509
1510 &bfin_dpmc,
1511
1512 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1513 &rtc_device,
1514 #endif
1515
1516 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1517 #ifdef CONFIG_SERIAL_BFIN_UART0
1518 &bfin_uart0_device,
1519 #endif
1520 #ifdef CONFIG_SERIAL_BFIN_UART1
1521 &bfin_uart1_device,
1522 #endif
1523 #ifdef CONFIG_SERIAL_BFIN_UART2
1524 &bfin_uart2_device,
1525 #endif
1526 #ifdef CONFIG_SERIAL_BFIN_UART3
1527 &bfin_uart3_device,
1528 #endif
1529 #endif
1530
1531 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1532 #ifdef CONFIG_BFIN_SIR0
1533 &bfin_sir0_device,
1534 #endif
1535 #ifdef CONFIG_BFIN_SIR1
1536 &bfin_sir1_device,
1537 #endif
1538 #ifdef CONFIG_BFIN_SIR2
1539 &bfin_sir2_device,
1540 #endif
1541 #ifdef CONFIG_BFIN_SIR3
1542 &bfin_sir3_device,
1543 #endif
1544 #endif
1545
1546 #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
1547 &bf54x_lq043_device,
1548 #endif
1549
1550 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
1551 &smsc911x_device,
1552 #endif
1553
1554 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1555 &musb_device,
1556 #endif
1557
1558 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1559 &bfin_isp1760_device,
1560 #endif
1561
1562 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1563 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1564 &bfin_sport0_uart_device,
1565 #endif
1566 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1567 &bfin_sport1_uart_device,
1568 #endif
1569 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1570 &bfin_sport2_uart_device,
1571 #endif
1572 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1573 &bfin_sport3_uart_device,
1574 #endif
1575 #endif
1576
1577 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1578 &bfin_can0_device,
1579 &bfin_can1_device,
1580 #endif
1581
1582 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
1583 &bfin_atapi_device,
1584 #endif
1585
1586 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1587 &bf5xx_nand_device,
1588 #endif
1589
1590 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1591 &bf54x_sdh_device,
1592 #endif
1593
1594 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1595 &bf54x_spi_master0,
1596 &bf54x_spi_master1,
1597 #endif
1598 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1599 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1600 &bfin_capture_device,
1601 #endif
1602
1603 #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
1604 &bf54x_kpad_device,
1605 #endif
1606
1607 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1608 &bfin_rotary_device,
1609 #endif
1610
1611 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1612 &i2c_bfin_twi0_device,
1613 #if !defined(CONFIG_BF542)
1614 &i2c_bfin_twi1_device,
1615 #endif
1616 #endif
1617
1618 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1619 &bfin_device_gpiokeys,
1620 #endif
1621
1622 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1623 &ezkit_flash_device,
1624 #endif
1625
1626 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1627 &bfin_i2s_pcm,
1628 #endif
1629
1630 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1631 &bfin_ac97_pcm,
1632 #endif
1633
1634 #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
1635 &bfin_ad1980_codec_device,
1636 #endif
1637
1638 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1639 &bfin_i2s,
1640 #endif
1641
1642 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1643 &bfin_ac97,
1644 #endif
1645 };
1646
1647 static int __init ezkit_init(void)
1648 {
1649 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1650
1651 i2c_register_board_info(0, bfin_i2c_board_info0,
1652 ARRAY_SIZE(bfin_i2c_board_info0));
1653 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1654 i2c_register_board_info(1, bfin_i2c_board_info1,
1655 ARRAY_SIZE(bfin_i2c_board_info1));
1656 #endif
1657
1658 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1659
1660 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1661
1662 return 0;
1663 }
1664
1665 arch_initcall(ezkit_init);
1666
1667 static struct platform_device *ezkit_early_devices[] __initdata = {
1668 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1669 #ifdef CONFIG_SERIAL_BFIN_UART0
1670 &bfin_uart0_device,
1671 #endif
1672 #ifdef CONFIG_SERIAL_BFIN_UART1
1673 &bfin_uart1_device,
1674 #endif
1675 #ifdef CONFIG_SERIAL_BFIN_UART2
1676 &bfin_uart2_device,
1677 #endif
1678 #ifdef CONFIG_SERIAL_BFIN_UART3
1679 &bfin_uart3_device,
1680 #endif
1681 #endif
1682
1683 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1684 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1685 &bfin_sport0_uart_device,
1686 #endif
1687 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1688 &bfin_sport1_uart_device,
1689 #endif
1690 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1691 &bfin_sport2_uart_device,
1692 #endif
1693 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1694 &bfin_sport3_uart_device,
1695 #endif
1696 #endif
1697 };
1698
1699 void __init native_machine_early_platform_add_devices(void)
1700 {
1701 printk(KERN_INFO "register early platform devices\n");
1702 early_platform_add_devices(ezkit_early_devices,
1703 ARRAY_SIZE(ezkit_early_devices));
1704 }
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