arch/x86/include/asm/numaq.h

   1 /*
   2  * Written by: Patricia Gaughen, IBM Corporation
   3  *
   4  * Copyright (C) 2002, IBM Corp.
   5  *
   6  * All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  16  * NON INFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  * Send feedback to <gone@us.ibm.com>
  24  */
  25
  26 #ifndef _ASM_X86_NUMAQ_H
  27 #define _ASM_X86_NUMAQ_H
  28
  29 #ifdef CONFIG_X86_NUMAQ
  30
  31 extern int found_numaq;
  32 extern int numaq_numa_init(void);
  33 extern int pci_numaq_init(void);
  34
  35 extern void *xquad_portio;
  36
  37 #define XQUAD_PORTIO_BASE 0xfe400000
  38 #define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */
  39 #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
  40
  41 /*
  42  * SYS_CFG_DATA_PRIV_ADDR, struct eachquadmem, and struct sys_cfg_data are the
  43  */
  44 #define SYS_CFG_DATA_PRIV_ADDR          0x0009d000 /* place for scd in private
  45                                                       quad space */
  46
  47 /*
  48  * Communication area for each processor on lynxer-processor tests.
  49  *
  50  * NOTE: If you change the size of this eachproc structure you need
  51  *       to change the definition for EACH_QUAD_SIZE.
  52  */
  53 struct eachquadmem {
  54         unsigned int    priv_mem_start;         /* Starting address of this */
  55                                                 /* quad's private memory. */
  56                                                 /* This is always 0. */
  57                                                 /* In MB. */
  58         unsigned int    priv_mem_size;          /* Size of this quad's */
  59                                                 /* private memory. */
  60                                                 /* In MB. */
  61         unsigned int    low_shrd_mem_strp_start;/* Starting address of this */
  62                                                 /* quad's low shared block */
  63                                                 /* (untranslated). */
  64                                                 /* In MB. */
  65         unsigned int    low_shrd_mem_start;     /* Starting address of this */
  66                                                 /* quad's low shared memory */
  67                                                 /* (untranslated). */
  68                                                 /* In MB. */
  69         unsigned int    low_shrd_mem_size;      /* Size of this quad's low */
  70                                                 /* shared memory. */
  71                                                 /* In MB. */
  72         unsigned int    lmmio_copb_start;       /* Starting address of this */
  73                                                 /* quad's local memory */
  74                                                 /* mapped I/O in the */
  75                                                 /* compatibility OPB. */
  76                                                 /* In MB. */
  77         unsigned int    lmmio_copb_size;        /* Size of this quad's local */
  78                                                 /* memory mapped I/O in the */
  79                                                 /* compatibility OPB. */
  80                                                 /* In MB. */
  81         unsigned int    lmmio_nopb_start;       /* Starting address of this */
  82                                                 /* quad's local memory */
  83                                                 /* mapped I/O in the */
  84                                                 /* non-compatibility OPB. */
  85                                                 /* In MB. */
  86         unsigned int    lmmio_nopb_size;        /* Size of this quad's local */
  87                                                 /* memory mapped I/O in the */
  88                                                 /* non-compatibility OPB. */
  89                                                 /* In MB. */
  90         unsigned int    io_apic_0_start;        /* Starting address of I/O */
  91                                                 /* APIC 0. */
  92         unsigned int    io_apic_0_sz;           /* Size I/O APIC 0. */
  93         unsigned int    io_apic_1_start;        /* Starting address of I/O */
  94                                                 /* APIC 1. */
  95         unsigned int    io_apic_1_sz;           /* Size I/O APIC 1. */
  96         unsigned int    hi_shrd_mem_start;      /* Starting address of this */
  97                                                 /* quad's high shared memory.*/
  98                                                 /* In MB. */
  99         unsigned int    hi_shrd_mem_size;       /* Size of this quad's high */
 100                                                 /* shared memory. */
 101                                                 /* In MB. */
 102         unsigned int    mps_table_addr;         /* Address of this quad's */
 103                                                 /* MPS tables from BIOS, */
 104                                                 /* in system space.*/
 105         unsigned int    lcl_MDC_pio_addr;       /* Port-I/O address for */
 106                                                 /* local access of MDC. */
 107         unsigned int    rmt_MDC_mmpio_addr;     /* MM-Port-I/O address for */
 108                                                 /* remote access of MDC. */
 109         unsigned int    mm_port_io_start;       /* Starting address of this */
 110                                                 /* quad's memory mapped Port */
 111                                                 /* I/O space. */
 112         unsigned int    mm_port_io_size;        /* Size of this quad's memory*/
 113                                                 /* mapped Port I/O space. */
 114         unsigned int    mm_rmt_io_apic_start;   /* Starting address of this */
 115                                                 /* quad's memory mapped */
 116                                                 /* remote I/O APIC space. */
 117         unsigned int    mm_rmt_io_apic_size;    /* Size of this quad's memory*/
 118                                                 /* mapped remote I/O APIC */
 119                                                 /* space. */
 120         unsigned int    mm_isa_start;           /* Starting address of this */
 121                                                 /* quad's memory mapped ISA */
 122                                                 /* space (contains MDC */
 123                                                 /* memory space). */
 124         unsigned int    mm_isa_size;            /* Size of this quad's memory*/
 125                                                 /* mapped ISA space (contains*/
 126                                                 /* MDC memory space). */
 127         unsigned int    rmt_qmi_addr;           /* Remote addr to access QMI.*/
 128         unsigned int    lcl_qmi_addr;           /* Local addr to access QMI. */
 129 };
 130
 131 /*
 132  * Note: This structure must be NOT be changed unless the multiproc and
 133  * OS are changed to reflect the new structure.
 134  */
 135 struct sys_cfg_data {
 136         unsigned int    quad_id;
 137         unsigned int    bsp_proc_id; /* Boot Strap Processor in this quad. */
 138         unsigned int    scd_version; /* Version number of this table. */
 139         unsigned int    first_quad_id;
 140         unsigned int    quads_present31_0; /* 1 bit for each quad */
 141         unsigned int    quads_present63_32; /* 1 bit for each quad */
 142         unsigned int    config_flags;
 143         unsigned int    boot_flags;
 144         unsigned int    csr_start_addr; /* Absolute value (not in MB) */
 145         unsigned int    csr_size; /* Absolute value (not in MB) */
 146         unsigned int    lcl_apic_start_addr; /* Absolute value (not in MB) */
 147         unsigned int    lcl_apic_size; /* Absolute value (not in MB) */
 148         unsigned int    low_shrd_mem_base; /* 0 or 512MB or 1GB */
 149         unsigned int    low_shrd_mem_quad_offset; /* 0,128M,256M,512M,1G */
 150                                         /* may not be totally populated */
 151         unsigned int    split_mem_enbl; /* 0 for no low shared memory */
 152         unsigned int    mmio_sz; /* Size of total system memory mapped I/O */
 153                                  /* (in MB). */
 154         unsigned int    quad_spin_lock; /* Spare location used for quad */
 155                                         /* bringup. */
 156         unsigned int    nonzero55; /* For checksumming. */
 157         unsigned int    nonzeroaa; /* For checksumming. */
 158         unsigned int    scd_magic_number;
 159         unsigned int    system_type;
 160         unsigned int    checksum;
 161         /*
 162          *      memory configuration area for each quad
 163          */
 164         struct          eachquadmem eq[MAX_NUMNODES];   /* indexed by quad id */
 165 };
 166
 167 void numaq_tsc_disable(void);
 168
 169 #endif /* CONFIG_X86_NUMAQ */
 170 #endif /* _ASM_X86_NUMAQ_H */
 171