arch/x86/platform/ce4100/ce4100.c

   1 /*
   2  * Intel CE4100  platform specific setup code
   3  *
   4  * (C) Copyright 2010 Intel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; version 2
   9  * of the License.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/kernel.h>
  13 #include <linux/irq.h>
  14 #include <linux/module.h>
  15 #include <linux/serial_reg.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/reboot.h>
  18
  19 #include <asm/ce4100.h>
  20 #include <asm/prom.h>
  21 #include <asm/setup.h>
  22 #include <asm/i8259.h>
  23 #include <asm/io.h>
  24 #include <asm/io_apic.h>
  25 #include <asm/emergency-restart.h>
  26
  27 static int ce4100_i8042_detect(void)
  28 {
  29         return 0;
  30 }
  31
  32 /*
  33  * The CE4100 platform has an internal 8051 Microcontroller which is
  34  * responsible for signaling to the external Power Management Unit the
  35  * intention to reset, reboot or power off the system. This 8051 device has
  36  * its command register mapped at I/O port 0xcf9 and the value 0x4 is used
  37  * to power off the system.
  38  */
  39 static void ce4100_power_off(void)
  40 {
  41         outb(0x4, 0xcf9);
  42 }
  43
  44 #ifdef CONFIG_SERIAL_8250
  45
  46 static unsigned int mem_serial_in(struct uart_port *p, int offset)
  47 {
  48         offset = offset << p->regshift;
  49         return readl(p->membase + offset);
  50 }
  51
  52 /*
  53  * The UART Tx interrupts are not set under some conditions and therefore serial
  54  * transmission hangs. This is a silicon issue and has not been root caused. The
  55  * workaround for this silicon issue checks UART_LSR_THRE bit and UART_LSR_TEMT
  56  * bit of LSR register in interrupt handler to see whether at least one of these
  57  * two bits is set, if so then process the transmit request. If this workaround
  58  * is not applied, then the serial transmission may hang. This workaround is for
  59  * errata number 9 in Errata - B step.
  60 */
  61
  62 static unsigned int ce4100_mem_serial_in(struct uart_port *p, int offset)
  63 {
  64         unsigned int ret, ier, lsr;
  65
  66         if (offset == UART_IIR) {
  67                 offset = offset << p->regshift;
  68                 ret = readl(p->membase + offset);
  69                 if (ret & UART_IIR_NO_INT) {
  70                         /* see if the TX interrupt should have really set */
  71                         ier = mem_serial_in(p, UART_IER);
  72                         /* see if the UART's XMIT interrupt is enabled */
  73                         if (ier & UART_IER_THRI) {
  74                                 lsr = mem_serial_in(p, UART_LSR);
  75                                 /* now check to see if the UART should be
  76                                    generating an interrupt (but isn't) */
  77                                 if (lsr & (UART_LSR_THRE | UART_LSR_TEMT))
  78                                         ret &= ~UART_IIR_NO_INT;
  79                         }
  80                 }
  81         } else
  82                 ret =  mem_serial_in(p, offset);
  83         return ret;
  84 }
  85
  86 static void ce4100_mem_serial_out(struct uart_port *p, int offset, int value)
  87 {
  88         offset = offset << p->regshift;
  89         writel(value, p->membase + offset);
  90 }
  91
  92 static void ce4100_serial_fixup(int port, struct uart_port *up,
  93         unsigned short *capabilites)
  94 {
  95 #ifdef CONFIG_EARLY_PRINTK
  96         /*
  97          * Over ride the legacy port configuration that comes from
  98          * asm/serial.h. Using the ioport driver then switching to the
  99          * PCI memmaped driver hangs the IOAPIC
 100          */
 101         if (up->iotype !=  UPIO_MEM32) {
 102                 up->uartclk  = 14745600;
 103                 up->mapbase = 0xdffe0200;
 104                 set_fixmap_nocache(FIX_EARLYCON_MEM_BASE,
 105                                 up->mapbase & PAGE_MASK);
 106                 up->membase =
 107                         (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE);
 108                 up->membase += up->mapbase & ~PAGE_MASK;
 109                 up->mapbase += port * 0x100;
 110                 up->membase += port * 0x100;
 111                 up->iotype   = UPIO_MEM32;
 112                 up->regshift = 2;
 113                 up->irq = 4;
 114         }
 115 #endif
 116         up->iobase = 0;
 117         up->serial_in = ce4100_mem_serial_in;
 118         up->serial_out = ce4100_mem_serial_out;
 119
 120         *capabilites |= (1 << 12);
 121 }
 122
 123 static __init void sdv_serial_fixup(void)
 124 {
 125         serial8250_set_isa_configurator(ce4100_serial_fixup);
 126 }
 127
 128 #else
 129 static inline void sdv_serial_fixup(void) {};
 130 #endif
 131
 132 static void __init sdv_arch_setup(void)
 133 {
 134         sdv_serial_fixup();
 135 }
 136
 137 #ifdef CONFIG_X86_IO_APIC
 138 static void sdv_pci_init(void)
 139 {
 140         x86_of_pci_init();
 141         /* We can't set this earlier, because we need to calibrate the timer */
 142         legacy_pic = &null_legacy_pic;
 143 }
 144 #endif
 145
 146 /*
 147  * CE4100 specific x86_init function overrides and early setup
 148  * calls.
 149  */
 150 void __init x86_ce4100_early_setup(void)
 151 {
 152         x86_init.oem.arch_setup = sdv_arch_setup;
 153         x86_platform.i8042_detect = ce4100_i8042_detect;
 154         x86_init.resources.probe_roms = x86_init_noop;
 155         x86_init.mpparse.get_smp_config = x86_init_uint_noop;
 156         x86_init.mpparse.find_smp_config = x86_init_noop;
 157         x86_init.pci.init = ce4100_pci_init;
 158
 159         /*
 160          * By default, the reboot method is ACPI which is supported by the
 161          * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue
 162          * the bootloader will however issue a system power off instead of
 163          * reboot. By using BOOT_KBD we ensure proper system reboot as
 164          * expected.
 165          */
 166         reboot_type = BOOT_KBD;
 167
 168 #ifdef CONFIG_X86_IO_APIC
 169         x86_init.pci.init_irq = sdv_pci_init;
 170         x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
 171 #endif
 172
 173         pm_power_off = ce4100_power_off;
 174 }