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[cris-mirror.git] / arch / xtensa / include / asm / vectors.h
blobc52b656d0310cb994085844a9b90e32543b36d5b
1 /*
2 * arch/xtensa/include/asm/xchal_vaddr_remap.h
4 * Xtensa macros for MMU V3 Support. Deals with re-mapping the Virtual
5 * Memory Addresses from "Virtual == Physical" to their prevvious V2 MMU
6 * mappings (KSEG at 0xD0000000 and KIO at 0XF0000000).
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
12 * Copyright (C) 2008 - 2012 Tensilica Inc.
14 * Pete Delaney <piet@tensilica.com>
15 * Marc Gauthier <marc@tensilica.com
18 #ifndef _XTENSA_VECTORS_H
19 #define _XTENSA_VECTORS_H
21 #include <variant/core.h>
23 #if defined(CONFIG_MMU)
25 /* Will Become VECBASE */
26 #define VIRTUAL_MEMORY_ADDRESS 0xD0000000
28 /* Image Virtual Start Address */
29 #define KERNELOFFSET 0xD0003000
31 #if defined(XCHAL_HAVE_PTP_MMU) && XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
32 /* MMU v3 - XCHAL_HAVE_PTP_MMU == 1 */
33 #define PHYSICAL_MEMORY_ADDRESS 0x00000000
34 #define LOAD_MEMORY_ADDRESS 0x00003000
35 #else
36 /* MMU V2 - XCHAL_HAVE_PTP_MMU == 0 */
37 #define PHYSICAL_MEMORY_ADDRESS 0xD0000000
38 #define LOAD_MEMORY_ADDRESS 0xD0003000
39 #endif
41 #else /* !defined(CONFIG_MMU) */
42 /* MMU Not being used - Virtual == Physical */
44 /* VECBASE */
45 #define VIRTUAL_MEMORY_ADDRESS 0x00002000
47 /* Location of the start of the kernel text, _start */
48 #define KERNELOFFSET 0x00003000
49 #define PHYSICAL_MEMORY_ADDRESS 0x00000000
51 /* Loaded just above possibly live vectors */
52 #define LOAD_MEMORY_ADDRESS 0x00003000
54 #endif /* CONFIG_MMU */
56 #define XC_VADDR(offset) (VIRTUAL_MEMORY_ADDRESS + offset)
57 #define XC_PADDR(offset) (PHYSICAL_MEMORY_ADDRESS + offset)
59 /* Used to set VECBASE register */
60 #define VECBASE_RESET_VADDR VIRTUAL_MEMORY_ADDRESS
62 #define RESET_VECTOR_VECOFS (XCHAL_RESET_VECTOR_VADDR - \
63 VECBASE_RESET_VADDR)
64 #define RESET_VECTOR_VADDR XC_VADDR(RESET_VECTOR_VECOFS)
66 #define RESET_VECTOR1_VECOFS (XCHAL_RESET_VECTOR1_VADDR - \
67 VECBASE_RESET_VADDR)
68 #define RESET_VECTOR1_VADDR XC_VADDR(RESET_VECTOR1_VECOFS)
70 #if XCHAL_HAVE_VECBASE
72 #define USER_VECTOR_VADDR XC_VADDR(XCHAL_USER_VECOFS)
73 #define KERNEL_VECTOR_VADDR XC_VADDR(XCHAL_KERNEL_VECOFS)
74 #define DOUBLEEXC_VECTOR_VADDR XC_VADDR(XCHAL_DOUBLEEXC_VECOFS)
75 #define WINDOW_VECTORS_VADDR XC_VADDR(XCHAL_WINDOW_OF4_VECOFS)
76 #define INTLEVEL2_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL2_VECOFS)
77 #define INTLEVEL3_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL3_VECOFS)
78 #define INTLEVEL4_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL4_VECOFS)
79 #define INTLEVEL5_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL5_VECOFS)
80 #define INTLEVEL6_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL6_VECOFS)
82 #define DEBUG_VECTOR_VADDR XC_VADDR(XCHAL_DEBUG_VECOFS)
84 #undef XCHAL_NMI_VECTOR_VADDR
85 #define XCHAL_NMI_VECTOR_VADDR XC_VADDR(XCHAL_NMI_VECOFS)
87 #undef XCHAL_INTLEVEL7_VECTOR_VADDR
88 #define XCHAL_INTLEVEL7_VECTOR_VADDR XC_VADDR(XCHAL_INTLEVEL7_VECOFS)
91 * These XCHAL_* #defines from varian/core.h
92 * are not valid to use with V3 MMU. Non-XCHAL
93 * constants are defined above and should be used.
95 #undef XCHAL_VECBASE_RESET_VADDR
96 #undef XCHAL_RESET_VECTOR0_VADDR
97 #undef XCHAL_USER_VECTOR_VADDR
98 #undef XCHAL_KERNEL_VECTOR_VADDR
99 #undef XCHAL_DOUBLEEXC_VECTOR_VADDR
100 #undef XCHAL_WINDOW_VECTORS_VADDR
101 #undef XCHAL_INTLEVEL2_VECTOR_VADDR
102 #undef XCHAL_INTLEVEL3_VECTOR_VADDR
103 #undef XCHAL_INTLEVEL4_VECTOR_VADDR
104 #undef XCHAL_INTLEVEL5_VECTOR_VADDR
105 #undef XCHAL_INTLEVEL6_VECTOR_VADDR
106 #undef XCHAL_DEBUG_VECTOR_VADDR
107 #undef XCHAL_NMI_VECTOR_VADDR
108 #undef XCHAL_INTLEVEL7_VECTOR_VADDR
110 #else
112 #define USER_VECTOR_VADDR XCHAL_USER_VECTOR_VADDR
113 #define KERNEL_VECTOR_VADDR XCHAL_KERNEL_VECTOR_VADDR
114 #define DOUBLEEXC_VECTOR_VADDR XCHAL_DOUBLEEXC_VECTOR_VADDR
115 #define WINDOW_VECTORS_VADDR XCHAL_WINDOW_VECTORS_VADDR
116 #define INTLEVEL2_VECTOR_VADDR XCHAL_INTLEVEL2_VECTOR_VADDR
117 #define INTLEVEL3_VECTOR_VADDR XCHAL_INTLEVEL3_VECTOR_VADDR
118 #define INTLEVEL4_VECTOR_VADDR XCHAL_INTLEVEL4_VECTOR_VADDR
119 #define INTLEVEL5_VECTOR_VADDR XCHAL_INTLEVEL5_VECTOR_VADDR
120 #define INTLEVEL6_VECTOR_VADDR XCHAL_INTLEVEL6_VECTOR_VADDR
121 #define DEBUG_VECTOR_VADDR XCHAL_DEBUG_VECTOR_VADDR
123 #endif
125 #endif /* _XTENSA_VECTORS_H */