Linux 3.11-rc3
[cris-mirror.git] / drivers / bcma / scan.c
blob8bffa5c9818c8e598a7f1408bd56a511f5773f29
1 /*
2 * Broadcom specific AMBA
3 * Bus scanning
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
8 #include "scan.h"
9 #include "bcma_private.h"
11 #include <linux/bcma/bcma.h>
12 #include <linux/bcma/bcma_regs.h>
13 #include <linux/pci.h>
14 #include <linux/io.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/slab.h>
18 struct bcma_device_id_name {
19 u16 id;
20 const char *name;
23 static const struct bcma_device_id_name bcma_arm_device_names[] = {
24 { BCMA_CORE_4706_MAC_GBIT_COMMON, "BCM4706 GBit MAC Common" },
25 { BCMA_CORE_ARM_1176, "ARM 1176" },
26 { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
27 { BCMA_CORE_ARM_CM3, "ARM CM3" },
30 static const struct bcma_device_id_name bcma_bcm_device_names[] = {
31 { BCMA_CORE_OOB_ROUTER, "OOB Router" },
32 { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
33 { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
34 { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
35 { BCMA_CORE_AMEMC, "AMEMC (DDR)" },
36 { BCMA_CORE_ALTA, "ALTA (I2S)" },
37 { BCMA_CORE_INVALID, "Invalid" },
38 { BCMA_CORE_CHIPCOMMON, "ChipCommon" },
39 { BCMA_CORE_ILINE20, "ILine 20" },
40 { BCMA_CORE_SRAM, "SRAM" },
41 { BCMA_CORE_SDRAM, "SDRAM" },
42 { BCMA_CORE_PCI, "PCI" },
43 { BCMA_CORE_ETHERNET, "Fast Ethernet" },
44 { BCMA_CORE_V90, "V90" },
45 { BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
46 { BCMA_CORE_ADSL, "ADSL" },
47 { BCMA_CORE_ILINE100, "ILine 100" },
48 { BCMA_CORE_IPSEC, "IPSEC" },
49 { BCMA_CORE_UTOPIA, "UTOPIA" },
50 { BCMA_CORE_PCMCIA, "PCMCIA" },
51 { BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
52 { BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
53 { BCMA_CORE_OFDM, "OFDM" },
54 { BCMA_CORE_EXTIF, "EXTIF" },
55 { BCMA_CORE_80211, "IEEE 802.11" },
56 { BCMA_CORE_PHY_A, "PHY A" },
57 { BCMA_CORE_PHY_B, "PHY B" },
58 { BCMA_CORE_PHY_G, "PHY G" },
59 { BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
60 { BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
61 { BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
62 { BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
63 { BCMA_CORE_SDIO_HOST, "SDIO Host" },
64 { BCMA_CORE_ROBOSWITCH, "Roboswitch" },
65 { BCMA_CORE_PARA_ATA, "PATA" },
66 { BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
67 { BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
68 { BCMA_CORE_PCIE, "PCIe" },
69 { BCMA_CORE_PHY_N, "PHY N" },
70 { BCMA_CORE_SRAM_CTL, "SRAM Controller" },
71 { BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
72 { BCMA_CORE_PHY_LP, "PHY LP" },
73 { BCMA_CORE_PMU, "PMU" },
74 { BCMA_CORE_PHY_SSN, "PHY SSN" },
75 { BCMA_CORE_SDIO_DEV, "SDIO Device" },
76 { BCMA_CORE_PHY_HT, "PHY HT" },
77 { BCMA_CORE_MAC_GBIT, "GBit MAC" },
78 { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
79 { BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
80 { BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
81 { BCMA_CORE_SHARED_COMMON, "Common Shared" },
82 { BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
83 { BCMA_CORE_SPI_HOST, "SPI Host" },
84 { BCMA_CORE_I2S, "I2S" },
85 { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
86 { BCMA_CORE_SHIM, "SHIM" },
87 { BCMA_CORE_PCIE2, "PCIe Gen2" },
88 { BCMA_CORE_ARM_CR4, "ARM CR4" },
89 { BCMA_CORE_DEFAULT, "Default" },
92 static const struct bcma_device_id_name bcma_mips_device_names[] = {
93 { BCMA_CORE_MIPS, "MIPS" },
94 { BCMA_CORE_MIPS_3302, "MIPS 3302" },
95 { BCMA_CORE_MIPS_74K, "MIPS 74K" },
98 static const char *bcma_device_name(const struct bcma_device_id *id)
100 const struct bcma_device_id_name *names;
101 int size, i;
103 /* search manufacturer specific names */
104 switch (id->manuf) {
105 case BCMA_MANUF_ARM:
106 names = bcma_arm_device_names;
107 size = ARRAY_SIZE(bcma_arm_device_names);
108 break;
109 case BCMA_MANUF_BCM:
110 names = bcma_bcm_device_names;
111 size = ARRAY_SIZE(bcma_bcm_device_names);
112 break;
113 case BCMA_MANUF_MIPS:
114 names = bcma_mips_device_names;
115 size = ARRAY_SIZE(bcma_mips_device_names);
116 break;
117 default:
118 return "UNKNOWN";
121 for (i = 0; i < size; i++) {
122 if (names[i].id == id->id)
123 return names[i].name;
126 return "UNKNOWN";
129 static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
130 u16 offset)
132 return readl(bus->mmio + offset);
135 static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
137 if (bus->hosttype == BCMA_HOSTTYPE_PCI)
138 pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
139 addr);
142 static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 __iomem **eromptr)
144 u32 ent = readl(*eromptr);
145 (*eromptr)++;
146 return ent;
149 static void bcma_erom_push_ent(u32 __iomem **eromptr)
151 (*eromptr)--;
154 static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 __iomem **eromptr)
156 u32 ent = bcma_erom_get_ent(bus, eromptr);
157 if (!(ent & SCAN_ER_VALID))
158 return -ENOENT;
159 if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
160 return -ENOENT;
161 return ent;
164 static bool bcma_erom_is_end(struct bcma_bus *bus, u32 __iomem **eromptr)
166 u32 ent = bcma_erom_get_ent(bus, eromptr);
167 bcma_erom_push_ent(eromptr);
168 return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
171 static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 __iomem **eromptr)
173 u32 ent = bcma_erom_get_ent(bus, eromptr);
174 bcma_erom_push_ent(eromptr);
175 return (((ent & SCAN_ER_VALID)) &&
176 ((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
177 ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
180 static void bcma_erom_skip_component(struct bcma_bus *bus, u32 __iomem **eromptr)
182 u32 ent;
183 while (1) {
184 ent = bcma_erom_get_ent(bus, eromptr);
185 if ((ent & SCAN_ER_VALID) &&
186 ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
187 break;
188 if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
189 break;
191 bcma_erom_push_ent(eromptr);
194 static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 __iomem **eromptr)
196 u32 ent = bcma_erom_get_ent(bus, eromptr);
197 if (!(ent & SCAN_ER_VALID))
198 return -ENOENT;
199 if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
200 return -ENOENT;
201 return ent;
204 static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
205 u32 type, u8 port)
207 u32 addrl, addrh, sizel, sizeh = 0;
208 u32 size;
210 u32 ent = bcma_erom_get_ent(bus, eromptr);
211 if ((!(ent & SCAN_ER_VALID)) ||
212 ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
213 ((ent & SCAN_ADDR_TYPE) != type) ||
214 (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
215 bcma_erom_push_ent(eromptr);
216 return -EINVAL;
219 addrl = ent & SCAN_ADDR_ADDR;
220 if (ent & SCAN_ADDR_AG32)
221 addrh = bcma_erom_get_ent(bus, eromptr);
222 else
223 addrh = 0;
225 if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
226 size = bcma_erom_get_ent(bus, eromptr);
227 sizel = size & SCAN_SIZE_SZ;
228 if (size & SCAN_SIZE_SG32)
229 sizeh = bcma_erom_get_ent(bus, eromptr);
230 } else
231 sizel = SCAN_ADDR_SZ_BASE <<
232 ((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
234 return addrl;
237 static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus,
238 u16 index)
240 struct bcma_device *core;
242 list_for_each_entry(core, &bus->cores, list) {
243 if (core->core_index == index)
244 return core;
246 return NULL;
249 static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid)
251 struct bcma_device *core;
253 list_for_each_entry_reverse(core, &bus->cores, list) {
254 if (core->id.id == coreid)
255 return core;
257 return NULL;
260 static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
261 struct bcma_device_id *match, int core_num,
262 struct bcma_device *core)
264 s32 tmp;
265 u8 i, j;
266 s32 cia, cib;
267 u8 ports[2], wrappers[2];
269 /* get CIs */
270 cia = bcma_erom_get_ci(bus, eromptr);
271 if (cia < 0) {
272 bcma_erom_push_ent(eromptr);
273 if (bcma_erom_is_end(bus, eromptr))
274 return -ESPIPE;
275 return -EILSEQ;
277 cib = bcma_erom_get_ci(bus, eromptr);
278 if (cib < 0)
279 return -EILSEQ;
281 /* parse CIs */
282 core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
283 core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
284 core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
285 ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
286 ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
287 wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
288 wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
289 core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
291 if (((core->id.manuf == BCMA_MANUF_ARM) &&
292 (core->id.id == 0xFFF)) ||
293 (ports[1] == 0)) {
294 bcma_erom_skip_component(bus, eromptr);
295 return -ENXIO;
298 /* check if component is a core at all */
299 if (wrappers[0] + wrappers[1] == 0) {
300 /* Some specific cores don't need wrappers */
301 switch (core->id.id) {
302 case BCMA_CORE_4706_MAC_GBIT_COMMON:
303 /* Not used yet: case BCMA_CORE_OOB_ROUTER: */
304 break;
305 default:
306 bcma_erom_skip_component(bus, eromptr);
307 return -ENXIO;
311 if (bcma_erom_is_bridge(bus, eromptr)) {
312 bcma_erom_skip_component(bus, eromptr);
313 return -ENXIO;
316 if (bcma_find_core_by_index(bus, core_num)) {
317 bcma_erom_skip_component(bus, eromptr);
318 return -ENODEV;
321 if (match && ((match->manuf != BCMA_ANY_MANUF &&
322 match->manuf != core->id.manuf) ||
323 (match->id != BCMA_ANY_ID && match->id != core->id.id) ||
324 (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) ||
325 (match->class != BCMA_ANY_CLASS && match->class != core->id.class)
326 )) {
327 bcma_erom_skip_component(bus, eromptr);
328 return -ENODEV;
331 /* get & parse master ports */
332 for (i = 0; i < ports[0]; i++) {
333 s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
334 if (mst_port_d < 0)
335 return -EILSEQ;
338 /* First Slave Address Descriptor should be port 0:
339 * the main register space for the core
341 tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
342 if (tmp <= 0) {
343 /* Try again to see if it is a bridge */
344 tmp = bcma_erom_get_addr_desc(bus, eromptr,
345 SCAN_ADDR_TYPE_BRIDGE, 0);
346 if (tmp <= 0) {
347 return -EILSEQ;
348 } else {
349 bcma_info(bus, "Bridge found\n");
350 return -ENXIO;
353 core->addr = tmp;
355 /* get & parse slave ports */
356 for (i = 0; i < ports[1]; i++) {
357 for (j = 0; ; j++) {
358 tmp = bcma_erom_get_addr_desc(bus, eromptr,
359 SCAN_ADDR_TYPE_SLAVE, i);
360 if (tmp < 0) {
361 /* no more entries for port _i_ */
362 /* pr_debug("erom: slave port %d "
363 * "has %d descriptors\n", i, j); */
364 break;
365 } else {
366 if (i == 0 && j == 0)
367 core->addr1 = tmp;
372 /* get & parse master wrappers */
373 for (i = 0; i < wrappers[0]; i++) {
374 for (j = 0; ; j++) {
375 tmp = bcma_erom_get_addr_desc(bus, eromptr,
376 SCAN_ADDR_TYPE_MWRAP, i);
377 if (tmp < 0) {
378 /* no more entries for port _i_ */
379 /* pr_debug("erom: master wrapper %d "
380 * "has %d descriptors\n", i, j); */
381 break;
382 } else {
383 if (i == 0 && j == 0)
384 core->wrap = tmp;
389 /* get & parse slave wrappers */
390 for (i = 0; i < wrappers[1]; i++) {
391 u8 hack = (ports[1] == 1) ? 0 : 1;
392 for (j = 0; ; j++) {
393 tmp = bcma_erom_get_addr_desc(bus, eromptr,
394 SCAN_ADDR_TYPE_SWRAP, i + hack);
395 if (tmp < 0) {
396 /* no more entries for port _i_ */
397 /* pr_debug("erom: master wrapper %d "
398 * has %d descriptors\n", i, j); */
399 break;
400 } else {
401 if (wrappers[0] == 0 && !i && !j)
402 core->wrap = tmp;
406 if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
407 core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
408 if (!core->io_addr)
409 return -ENOMEM;
410 core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE);
411 if (!core->io_wrap) {
412 iounmap(core->io_addr);
413 return -ENOMEM;
416 return 0;
419 void bcma_init_bus(struct bcma_bus *bus)
421 s32 tmp;
422 struct bcma_chipinfo *chipinfo = &(bus->chipinfo);
424 if (bus->init_done)
425 return;
427 INIT_LIST_HEAD(&bus->cores);
428 bus->nr_cores = 0;
430 bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
432 tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
433 chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
434 chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
435 chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
436 bcma_info(bus, "Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
437 chipinfo->id, chipinfo->rev, chipinfo->pkg);
439 bus->init_done = true;
442 int bcma_bus_scan(struct bcma_bus *bus)
444 u32 erombase;
445 u32 __iomem *eromptr, *eromend;
447 int err, core_num = 0;
449 bcma_init_bus(bus);
451 erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
452 if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
453 eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
454 if (!eromptr)
455 return -ENOMEM;
456 } else {
457 eromptr = bus->mmio;
460 eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
462 bcma_scan_switch_core(bus, erombase);
464 while (eromptr < eromend) {
465 struct bcma_device *other_core;
466 struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
467 if (!core) {
468 err = -ENOMEM;
469 goto out;
471 INIT_LIST_HEAD(&core->list);
472 core->bus = bus;
474 err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core);
475 if (err < 0) {
476 kfree(core);
477 if (err == -ENODEV) {
478 core_num++;
479 continue;
480 } else if (err == -ENXIO) {
481 continue;
482 } else if (err == -ESPIPE) {
483 break;
485 goto out;
488 core->core_index = core_num++;
489 bus->nr_cores++;
490 other_core = bcma_find_core_reverse(bus, core->id.id);
491 core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
493 bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
494 core->core_index, bcma_device_name(&core->id),
495 core->id.manuf, core->id.id, core->id.rev,
496 core->id.class);
498 list_add_tail(&core->list, &bus->cores);
501 err = 0;
502 out:
503 if (bus->hosttype == BCMA_HOSTTYPE_SOC)
504 iounmap(eromptr);
506 return err;
509 int __init bcma_bus_scan_early(struct bcma_bus *bus,
510 struct bcma_device_id *match,
511 struct bcma_device *core)
513 u32 erombase;
514 u32 __iomem *eromptr, *eromend;
516 int err = -ENODEV;
517 int core_num = 0;
519 erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
520 if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
521 eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
522 if (!eromptr)
523 return -ENOMEM;
524 } else {
525 eromptr = bus->mmio;
528 eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
530 bcma_scan_switch_core(bus, erombase);
532 while (eromptr < eromend) {
533 memset(core, 0, sizeof(*core));
534 INIT_LIST_HEAD(&core->list);
535 core->bus = bus;
537 err = bcma_get_next_core(bus, &eromptr, match, core_num, core);
538 if (err == -ENODEV) {
539 core_num++;
540 continue;
541 } else if (err == -ENXIO)
542 continue;
543 else if (err == -ESPIPE)
544 break;
545 else if (err < 0)
546 goto out;
548 core->core_index = core_num++;
549 bus->nr_cores++;
550 bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
551 core->core_index, bcma_device_name(&core->id),
552 core->id.manuf, core->id.id, core->id.rev,
553 core->id.class);
555 list_add_tail(&core->list, &bus->cores);
556 err = 0;
557 break;
560 out:
561 if (bus->hosttype == BCMA_HOSTTYPE_SOC)
562 iounmap(eromptr);
564 return err;