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Linux 3.11-rc3
[cris-mirror.git] / drivers / block / nvme-scsi.c
blob102de2f52b5c5fa7b4dd877121f156041bb20be7
1 /*
2 * NVM Express device driver
3 * Copyright (c) 2011, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 */
18
19 /*
20 * Refer to the SCSI-NVMe Translation spec for details on how
21 * each command is translated.
22 */
23
24 #include <linux/nvme.h>
25 #include <linux/bio.h>
26 #include <linux/bitops.h>
27 #include <linux/blkdev.h>
28 #include <linux/delay.h>
29 #include <linux/errno.h>
30 #include <linux/fs.h>
31 #include <linux/genhd.h>
32 #include <linux/idr.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/io.h>
36 #include <linux/kdev_t.h>
37 #include <linux/kthread.h>
38 #include <linux/kernel.h>
39 #include <linux/mm.h>
40 #include <linux/module.h>
41 #include <linux/moduleparam.h>
42 #include <linux/pci.h>
43 #include <linux/poison.h>
44 #include <linux/sched.h>
45 #include <linux/slab.h>
46 #include <linux/types.h>
47 #include <scsi/sg.h>
48 #include <scsi/scsi.h>
49
50
51 static int sg_version_num = 30534; /* 2 digits for each component */
52
53 #define SNTI_TRANSLATION_SUCCESS 0
54 #define SNTI_INTERNAL_ERROR 1
55
56 /* VPD Page Codes */
57 #define VPD_SUPPORTED_PAGES 0x00
58 #define VPD_SERIAL_NUMBER 0x80
59 #define VPD_DEVICE_IDENTIFIERS 0x83
60 #define VPD_EXTENDED_INQUIRY 0x86
61 #define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
62
63 /* CDB offsets */
64 #define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
65 #define REPORT_LUNS_SR_OFFSET 2
66 #define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
67 #define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
68 #define REQUEST_SENSE_DESC_OFFSET 1
69 #define REQUEST_SENSE_DESC_MASK 0x01
70 #define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
71 #define INQUIRY_EVPD_BYTE_OFFSET 1
72 #define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
73 #define INQUIRY_EVPD_BIT_MASK 1
74 #define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
75 #define START_STOP_UNIT_CDB_IMMED_OFFSET 1
76 #define START_STOP_UNIT_CDB_IMMED_MASK 0x1
77 #define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
78 #define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
79 #define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
80 #define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
81 #define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
82 #define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
83 #define START_STOP_UNIT_CDB_START_OFFSET 4
84 #define START_STOP_UNIT_CDB_START_MASK 0x1
85 #define WRITE_BUFFER_CDB_MODE_OFFSET 1
86 #define WRITE_BUFFER_CDB_MODE_MASK 0x1F
87 #define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
88 #define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
89 #define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
90 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
91 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
92 #define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
93 #define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
94 #define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
95 #define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
96 #define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
97 #define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
98 #define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
99 #define FORMAT_UNIT_PROT_INT_OFFSET 3
100 #define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
101 #define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
102 #define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
103
104 /* Misc. defines */
105 #define NIBBLE_SHIFT 4
106 #define FIXED_SENSE_DATA 0x70
107 #define DESC_FORMAT_SENSE_DATA 0x72
108 #define FIXED_SENSE_DATA_ADD_LENGTH 10
109 #define LUN_ENTRY_SIZE 8
110 #define LUN_DATA_HEADER_SIZE 8
111 #define ALL_LUNS_RETURNED 0x02
112 #define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
113 #define RESTRICTED_LUNS_RETURNED 0x00
114 #define NVME_POWER_STATE_START_VALID 0x00
115 #define NVME_POWER_STATE_ACTIVE 0x01
116 #define NVME_POWER_STATE_IDLE 0x02
117 #define NVME_POWER_STATE_STANDBY 0x03
118 #define NVME_POWER_STATE_LU_CONTROL 0x07
119 #define POWER_STATE_0 0
120 #define POWER_STATE_1 1
121 #define POWER_STATE_2 2
122 #define POWER_STATE_3 3
123 #define DOWNLOAD_SAVE_ACTIVATE 0x05
124 #define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
125 #define ACTIVATE_DEFERRED_MICROCODE 0x0F
126 #define FORMAT_UNIT_IMMED_MASK 0x2
127 #define FORMAT_UNIT_IMMED_OFFSET 1
128 #define KELVIN_TEMP_FACTOR 273
129 #define FIXED_FMT_SENSE_DATA_SIZE 18
130 #define DESC_FMT_SENSE_DATA_SIZE 8
131
132 /* SCSI/NVMe defines and bit masks */
133 #define INQ_STANDARD_INQUIRY_PAGE 0x00
134 #define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
135 #define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
136 #define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
137 #define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
138 #define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
139 #define INQ_SERIAL_NUMBER_LENGTH 0x14
140 #define INQ_NUM_SUPPORTED_VPD_PAGES 5
141 #define VERSION_SPC_4 0x06
142 #define ACA_UNSUPPORTED 0
143 #define STANDARD_INQUIRY_LENGTH 36
144 #define ADDITIONAL_STD_INQ_LENGTH 31
145 #define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
146 #define RESERVED_FIELD 0
147
148 /* SCSI READ/WRITE Defines */
149 #define IO_CDB_WP_MASK 0xE0
150 #define IO_CDB_WP_SHIFT 5
151 #define IO_CDB_FUA_MASK 0x8
152 #define IO_6_CDB_LBA_OFFSET 0
153 #define IO_6_CDB_LBA_MASK 0x001FFFFF
154 #define IO_6_CDB_TX_LEN_OFFSET 4
155 #define IO_6_DEFAULT_TX_LEN 256
156 #define IO_10_CDB_LBA_OFFSET 2
157 #define IO_10_CDB_TX_LEN_OFFSET 7
158 #define IO_10_CDB_WP_OFFSET 1
159 #define IO_10_CDB_FUA_OFFSET 1
160 #define IO_12_CDB_LBA_OFFSET 2
161 #define IO_12_CDB_TX_LEN_OFFSET 6
162 #define IO_12_CDB_WP_OFFSET 1
163 #define IO_12_CDB_FUA_OFFSET 1
164 #define IO_16_CDB_FUA_OFFSET 1
165 #define IO_16_CDB_WP_OFFSET 1
166 #define IO_16_CDB_LBA_OFFSET 2
167 #define IO_16_CDB_TX_LEN_OFFSET 10
168
169 /* Mode Sense/Select defines */
170 #define MODE_PAGE_INFO_EXCEP 0x1C
171 #define MODE_PAGE_CACHING 0x08
172 #define MODE_PAGE_CONTROL 0x0A
173 #define MODE_PAGE_POWER_CONDITION 0x1A
174 #define MODE_PAGE_RETURN_ALL 0x3F
175 #define MODE_PAGE_BLK_DES_LEN 0x08
176 #define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
177 #define MODE_PAGE_CACHING_LEN 0x14
178 #define MODE_PAGE_CONTROL_LEN 0x0C
179 #define MODE_PAGE_POW_CND_LEN 0x28
180 #define MODE_PAGE_INF_EXC_LEN 0x0C
181 #define MODE_PAGE_ALL_LEN 0x54
182 #define MODE_SENSE6_MPH_SIZE 4
183 #define MODE_SENSE6_ALLOC_LEN_OFFSET 4
184 #define MODE_SENSE_PAGE_CONTROL_OFFSET 2
185 #define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
186 #define MODE_SENSE_PAGE_CODE_OFFSET 2
187 #define MODE_SENSE_PAGE_CODE_MASK 0x3F
188 #define MODE_SENSE_LLBAA_OFFSET 1
189 #define MODE_SENSE_LLBAA_MASK 0x10
190 #define MODE_SENSE_LLBAA_SHIFT 4
191 #define MODE_SENSE_DBD_OFFSET 1
192 #define MODE_SENSE_DBD_MASK 8
193 #define MODE_SENSE_DBD_SHIFT 3
194 #define MODE_SENSE10_MPH_SIZE 8
195 #define MODE_SENSE10_ALLOC_LEN_OFFSET 7
196 #define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
197 #define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
198 #define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
199 #define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
200 #define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
201 #define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
202 #define MODE_SELECT_6_BD_OFFSET 3
203 #define MODE_SELECT_10_BD_OFFSET 6
204 #define MODE_SELECT_10_LLBAA_OFFSET 4
205 #define MODE_SELECT_10_LLBAA_MASK 1
206 #define MODE_SELECT_6_MPH_SIZE 4
207 #define MODE_SELECT_10_MPH_SIZE 8
208 #define CACHING_MODE_PAGE_WCE_MASK 0x04
209 #define MODE_SENSE_BLK_DESC_ENABLED 0
210 #define MODE_SENSE_BLK_DESC_COUNT 1
211 #define MODE_SELECT_PAGE_CODE_MASK 0x3F
212 #define SHORT_DESC_BLOCK 8
213 #define LONG_DESC_BLOCK 16
214 #define MODE_PAGE_POW_CND_LEN_FIELD 0x26
215 #define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
216 #define MODE_PAGE_CACHING_LEN_FIELD 0x12
217 #define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
218 #define MODE_SENSE_PC_CURRENT_VALUES 0
219
220 /* Log Sense defines */
221 #define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
222 #define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
223 #define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
224 #define LOG_PAGE_TEMPERATURE_PAGE 0x0D
225 #define LOG_SENSE_CDB_SP_OFFSET 1
226 #define LOG_SENSE_CDB_SP_NOT_ENABLED 0
227 #define LOG_SENSE_CDB_PC_OFFSET 2
228 #define LOG_SENSE_CDB_PC_MASK 0xC0
229 #define LOG_SENSE_CDB_PC_SHIFT 6
230 #define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
231 #define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
232 #define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
233 #define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
234 #define LOG_INFO_EXCP_PAGE_LENGTH 0xC
235 #define REMAINING_TEMP_PAGE_LENGTH 0xC
236 #define LOG_TEMP_PAGE_LENGTH 0x10
237 #define LOG_TEMP_UNKNOWN 0xFF
238 #define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
239
240 /* Read Capacity defines */
241 #define READ_CAP_10_RESP_SIZE 8
242 #define READ_CAP_16_RESP_SIZE 32
243
244 /* NVMe Namespace and Command Defines */
245 #define NVME_GET_SMART_LOG_PAGE 0x02
246 #define NVME_GET_FEAT_TEMP_THRESH 0x04
247 #define BYTES_TO_DWORDS 4
248 #define NVME_MAX_FIRMWARE_SLOT 7
249
250 /* Report LUNs defines */
251 #define REPORT_LUNS_FIRST_LUN_OFFSET 8
252
253 /* SCSI ADDITIONAL SENSE Codes */
254
255 #define SCSI_ASC_NO_SENSE 0x00
256 #define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
257 #define SCSI_ASC_LUN_NOT_READY 0x04
258 #define SCSI_ASC_WARNING 0x0B
259 #define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
260 #define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
261 #define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
262 #define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
263 #define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
264 #define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
265 #define SCSI_ASC_ILLEGAL_COMMAND 0x20
266 #define SCSI_ASC_ILLEGAL_BLOCK 0x21
267 #define SCSI_ASC_INVALID_CDB 0x24
268 #define SCSI_ASC_INVALID_LUN 0x25
269 #define SCSI_ASC_INVALID_PARAMETER 0x26
270 #define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
271 #define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
272
273 /* SCSI ADDITIONAL SENSE Code Qualifiers */
274
275 #define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
276 #define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
277 #define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
278 #define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
279 #define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
280 #define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
281 #define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
282 #define SCSI_ASCQ_INVALID_LUN_ID 0x09
283
284 /**
285 * DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
286 * enable DPOFUA support type 0x10 value.
287 */
288 #define DEVICE_SPECIFIC_PARAMETER 0
289 #define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
290
291 /* MACROs to extract information from CDBs */
292
293 #define GET_OPCODE(cdb) cdb[0]
294
295 #define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
296
297 #define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
298
299 #define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
300 (cdb[index + 1] << 8) | \
301 (cdb[index + 2] << 0))
302
303 #define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
304 (cdb[index + 1] << 16) | \
305 (cdb[index + 2] << 8) | \
306 (cdb[index + 3] << 0))
307
308 #define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
309 (((u64)cdb[index + 1]) << 48) | \
310 (((u64)cdb[index + 2]) << 40) | \
311 (((u64)cdb[index + 3]) << 32) | \
312 (((u64)cdb[index + 4]) << 24) | \
313 (((u64)cdb[index + 5]) << 16) | \
314 (((u64)cdb[index + 6]) << 8) | \
315 (((u64)cdb[index + 7]) << 0))
316
317 /* Inquiry Helper Macros */
318 #define GET_INQ_EVPD_BIT(cdb) \
319 ((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
320 INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
321
322 #define GET_INQ_PAGE_CODE(cdb) \
323 (GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
324
325 #define GET_INQ_ALLOC_LENGTH(cdb) \
326 (GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
327
328 /* Report LUNs Helper Macros */
329 #define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
330 (GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
331
332 /* Read Capacity Helper Macros */
333 #define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
334 (GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
335
336 #define IS_READ_CAP_16(cdb) \
337 ((cdb[0] == SERVICE_ACTION_IN && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
338
339 /* Request Sense Helper Macros */
340 #define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
341 (GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
342
343 /* Mode Sense Helper Macros */
344 #define GET_MODE_SENSE_DBD(cdb) \
345 ((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
346 MODE_SENSE_DBD_SHIFT)
347
348 #define GET_MODE_SENSE_LLBAA(cdb) \
349 ((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
350 MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
351
352 #define GET_MODE_SENSE_MPH_SIZE(cdb10) \
353 (cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
354
355
356 /* Struct to gather data that needs to be extracted from a SCSI CDB.
357 Not conforming to any particular CDB variant, but compatible with all. */
358
359 struct nvme_trans_io_cdb {
360 u8 fua;
361 u8 prot_info;
362 u64 lba;
363 u32 xfer_len;
364 };
365
366
367 /* Internal Helper Functions */
368
369
370 /* Copy data to userspace memory */
371
372 static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
373 unsigned long n)
374 {
375 int res = SNTI_TRANSLATION_SUCCESS;
376 unsigned long not_copied;
377 int i;
378 void *index = from;
379 size_t remaining = n;
380 size_t xfer_len;
381
382 if (hdr->iovec_count > 0) {
383 struct sg_iovec sgl;
384
385 for (i = 0; i < hdr->iovec_count; i++) {
386 not_copied = copy_from_user(&sgl, hdr->dxferp +
387 i * sizeof(struct sg_iovec),
388 sizeof(struct sg_iovec));
389 if (not_copied)
390 return -EFAULT;
391 xfer_len = min(remaining, sgl.iov_len);
392 not_copied = copy_to_user(sgl.iov_base, index,
393 xfer_len);
394 if (not_copied) {
395 res = -EFAULT;
396 break;
397 }
398 index += xfer_len;
399 remaining -= xfer_len;
400 if (remaining == 0)
401 break;
402 }
403 return res;
404 }
405 not_copied = copy_to_user(hdr->dxferp, from, n);
406 if (not_copied)
407 res = -EFAULT;
408 return res;
409 }
410
411 /* Copy data from userspace memory */
412
413 static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
414 unsigned long n)
415 {
416 int res = SNTI_TRANSLATION_SUCCESS;
417 unsigned long not_copied;
418 int i;
419 void *index = to;
420 size_t remaining = n;
421 size_t xfer_len;
422
423 if (hdr->iovec_count > 0) {
424 struct sg_iovec sgl;
425
426 for (i = 0; i < hdr->iovec_count; i++) {
427 not_copied = copy_from_user(&sgl, hdr->dxferp +
428 i * sizeof(struct sg_iovec),
429 sizeof(struct sg_iovec));
430 if (not_copied)
431 return -EFAULT;
432 xfer_len = min(remaining, sgl.iov_len);
433 not_copied = copy_from_user(index, sgl.iov_base,
434 xfer_len);
435 if (not_copied) {
436 res = -EFAULT;
437 break;
438 }
439 index += xfer_len;
440 remaining -= xfer_len;
441 if (remaining == 0)
442 break;
443 }
444 return res;
445 }
446
447 not_copied = copy_from_user(to, hdr->dxferp, n);
448 if (not_copied)
449 res = -EFAULT;
450 return res;
451 }
452
453 /* Status/Sense Buffer Writeback */
454
455 static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
456 u8 asc, u8 ascq)
457 {
458 int res = SNTI_TRANSLATION_SUCCESS;
459 u8 xfer_len;
460 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
461
462 if (scsi_status_is_good(status)) {
463 hdr->status = SAM_STAT_GOOD;
464 hdr->masked_status = GOOD;
465 hdr->host_status = DID_OK;
466 hdr->driver_status = DRIVER_OK;
467 hdr->sb_len_wr = 0;
468 } else {
469 hdr->status = status;
470 hdr->masked_status = status >> 1;
471 hdr->host_status = DID_OK;
472 hdr->driver_status = DRIVER_OK;
473
474 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
475 resp[0] = DESC_FORMAT_SENSE_DATA;
476 resp[1] = sense_key;
477 resp[2] = asc;
478 resp[3] = ascq;
479
480 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
481 hdr->sb_len_wr = xfer_len;
482 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
483 res = -EFAULT;
484 }
485
486 return res;
487 }
488
489 static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
490 {
491 u8 status, sense_key, asc, ascq;
492 int res = SNTI_TRANSLATION_SUCCESS;
493
494 /* For non-nvme (Linux) errors, simply return the error code */
495 if (nvme_sc < 0)
496 return nvme_sc;
497
498 /* Mask DNR, More, and reserved fields */
499 nvme_sc &= 0x7FF;
500
501 switch (nvme_sc) {
502 /* Generic Command Status */
503 case NVME_SC_SUCCESS:
504 status = SAM_STAT_GOOD;
505 sense_key = NO_SENSE;
506 asc = SCSI_ASC_NO_SENSE;
507 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
508 break;
509 case NVME_SC_INVALID_OPCODE:
510 status = SAM_STAT_CHECK_CONDITION;
511 sense_key = ILLEGAL_REQUEST;
512 asc = SCSI_ASC_ILLEGAL_COMMAND;
513 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
514 break;
515 case NVME_SC_INVALID_FIELD:
516 status = SAM_STAT_CHECK_CONDITION;
517 sense_key = ILLEGAL_REQUEST;
518 asc = SCSI_ASC_INVALID_CDB;
519 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
520 break;
521 case NVME_SC_DATA_XFER_ERROR:
522 status = SAM_STAT_CHECK_CONDITION;
523 sense_key = MEDIUM_ERROR;
524 asc = SCSI_ASC_NO_SENSE;
525 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
526 break;
527 case NVME_SC_POWER_LOSS:
528 status = SAM_STAT_TASK_ABORTED;
529 sense_key = ABORTED_COMMAND;
530 asc = SCSI_ASC_WARNING;
531 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
532 break;
533 case NVME_SC_INTERNAL:
534 status = SAM_STAT_CHECK_CONDITION;
535 sense_key = HARDWARE_ERROR;
536 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
537 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
538 break;
539 case NVME_SC_ABORT_REQ:
540 status = SAM_STAT_TASK_ABORTED;
541 sense_key = ABORTED_COMMAND;
542 asc = SCSI_ASC_NO_SENSE;
543 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
544 break;
545 case NVME_SC_ABORT_QUEUE:
546 status = SAM_STAT_TASK_ABORTED;
547 sense_key = ABORTED_COMMAND;
548 asc = SCSI_ASC_NO_SENSE;
549 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
550 break;
551 case NVME_SC_FUSED_FAIL:
552 status = SAM_STAT_TASK_ABORTED;
553 sense_key = ABORTED_COMMAND;
554 asc = SCSI_ASC_NO_SENSE;
555 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
556 break;
557 case NVME_SC_FUSED_MISSING:
558 status = SAM_STAT_TASK_ABORTED;
559 sense_key = ABORTED_COMMAND;
560 asc = SCSI_ASC_NO_SENSE;
561 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
562 break;
563 case NVME_SC_INVALID_NS:
564 status = SAM_STAT_CHECK_CONDITION;
565 sense_key = ILLEGAL_REQUEST;
566 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
567 ascq = SCSI_ASCQ_INVALID_LUN_ID;
568 break;
569 case NVME_SC_LBA_RANGE:
570 status = SAM_STAT_CHECK_CONDITION;
571 sense_key = ILLEGAL_REQUEST;
572 asc = SCSI_ASC_ILLEGAL_BLOCK;
573 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
574 break;
575 case NVME_SC_CAP_EXCEEDED:
576 status = SAM_STAT_CHECK_CONDITION;
577 sense_key = MEDIUM_ERROR;
578 asc = SCSI_ASC_NO_SENSE;
579 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
580 break;
581 case NVME_SC_NS_NOT_READY:
582 status = SAM_STAT_CHECK_CONDITION;
583 sense_key = NOT_READY;
584 asc = SCSI_ASC_LUN_NOT_READY;
585 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
586 break;
587
588 /* Command Specific Status */
589 case NVME_SC_INVALID_FORMAT:
590 status = SAM_STAT_CHECK_CONDITION;
591 sense_key = ILLEGAL_REQUEST;
592 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
593 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
594 break;
595 case NVME_SC_BAD_ATTRIBUTES:
596 status = SAM_STAT_CHECK_CONDITION;
597 sense_key = ILLEGAL_REQUEST;
598 asc = SCSI_ASC_INVALID_CDB;
599 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
600 break;
601
602 /* Media Errors */
603 case NVME_SC_WRITE_FAULT:
604 status = SAM_STAT_CHECK_CONDITION;
605 sense_key = MEDIUM_ERROR;
606 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
607 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
608 break;
609 case NVME_SC_READ_ERROR:
610 status = SAM_STAT_CHECK_CONDITION;
611 sense_key = MEDIUM_ERROR;
612 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
613 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
614 break;
615 case NVME_SC_GUARD_CHECK:
616 status = SAM_STAT_CHECK_CONDITION;
617 sense_key = MEDIUM_ERROR;
618 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
619 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
620 break;
621 case NVME_SC_APPTAG_CHECK:
622 status = SAM_STAT_CHECK_CONDITION;
623 sense_key = MEDIUM_ERROR;
624 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
625 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
626 break;
627 case NVME_SC_REFTAG_CHECK:
628 status = SAM_STAT_CHECK_CONDITION;
629 sense_key = MEDIUM_ERROR;
630 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
631 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
632 break;
633 case NVME_SC_COMPARE_FAILED:
634 status = SAM_STAT_CHECK_CONDITION;
635 sense_key = MISCOMPARE;
636 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
637 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
638 break;
639 case NVME_SC_ACCESS_DENIED:
640 status = SAM_STAT_CHECK_CONDITION;
641 sense_key = ILLEGAL_REQUEST;
642 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
643 ascq = SCSI_ASCQ_INVALID_LUN_ID;
644 break;
645
646 /* Unspecified/Default */
647 case NVME_SC_CMDID_CONFLICT:
648 case NVME_SC_CMD_SEQ_ERROR:
649 case NVME_SC_CQ_INVALID:
650 case NVME_SC_QID_INVALID:
651 case NVME_SC_QUEUE_SIZE:
652 case NVME_SC_ABORT_LIMIT:
653 case NVME_SC_ABORT_MISSING:
654 case NVME_SC_ASYNC_LIMIT:
655 case NVME_SC_FIRMWARE_SLOT:
656 case NVME_SC_FIRMWARE_IMAGE:
657 case NVME_SC_INVALID_VECTOR:
658 case NVME_SC_INVALID_LOG_PAGE:
659 default:
660 status = SAM_STAT_CHECK_CONDITION;
661 sense_key = ILLEGAL_REQUEST;
662 asc = SCSI_ASC_NO_SENSE;
663 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
664 break;
665 }
666
667 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
668
669 return res;
670 }
671
672 /* INQUIRY Helper Functions */
673
674 static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
675 struct sg_io_hdr *hdr, u8 *inq_response,
676 int alloc_len)
677 {
678 struct nvme_dev *dev = ns->dev;
679 dma_addr_t dma_addr;
680 void *mem;
681 struct nvme_id_ns *id_ns;
682 int res = SNTI_TRANSLATION_SUCCESS;
683 int nvme_sc;
684 int xfer_len;
685 u8 resp_data_format = 0x02;
686 u8 protect;
687 u8 cmdque = 0x01 << 1;
688
689 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
690 &dma_addr, GFP_KERNEL);
691 if (mem == NULL) {
692 res = -ENOMEM;
693 goto out_dma;
694 }
695
696 /* nvme ns identify - use DPS value for PROTECT field */
697 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
698 res = nvme_trans_status_code(hdr, nvme_sc);
699 /*
700 * If nvme_sc was -ve, res will be -ve here.
701 * If nvme_sc was +ve, the status would bace been translated, and res
702 * can only be 0 or -ve.
703 * - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
704 * - If -ve, return because its a Linux error.
705 */
706 if (res)
707 goto out_free;
708 if (nvme_sc) {
709 res = nvme_sc;
710 goto out_free;
711 }
712 id_ns = mem;
713 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
714
715 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
716 inq_response[2] = VERSION_SPC_4;
717 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
718 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
719 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
720 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
721 strncpy(&inq_response[8], "NVMe ", 8);
722 strncpy(&inq_response[16], dev->model, 16);
723 strncpy(&inq_response[32], dev->firmware_rev, 4);
724
725 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
726 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
727
728 out_free:
729 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
730 dma_addr);
731 out_dma:
732 return res;
733 }
734
735 static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
736 struct sg_io_hdr *hdr, u8 *inq_response,
737 int alloc_len)
738 {
739 int res = SNTI_TRANSLATION_SUCCESS;
740 int xfer_len;
741
742 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
743 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
744 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
745 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
746 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
747 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
748 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
749 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
750
751 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
752 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
753
754 return res;
755 }
756
757 static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
758 struct sg_io_hdr *hdr, u8 *inq_response,
759 int alloc_len)
760 {
761 struct nvme_dev *dev = ns->dev;
762 int res = SNTI_TRANSLATION_SUCCESS;
763 int xfer_len;
764
765 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
766 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
767 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
768 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
769
770 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
771 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
772
773 return res;
774 }
775
776 static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
777 u8 *inq_response, int alloc_len)
778 {
779 struct nvme_dev *dev = ns->dev;
780 dma_addr_t dma_addr;
781 void *mem;
782 struct nvme_id_ctrl *id_ctrl;
783 int res = SNTI_TRANSLATION_SUCCESS;
784 int nvme_sc;
785 u8 ieee[4];
786 int xfer_len;
787 __be32 tmp_id = cpu_to_be32(ns->ns_id);
788
789 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
790 &dma_addr, GFP_KERNEL);
791 if (mem == NULL) {
792 res = -ENOMEM;
793 goto out_dma;
794 }
795
796 /* nvme controller identify */
797 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
798 res = nvme_trans_status_code(hdr, nvme_sc);
799 if (res)
800 goto out_free;
801 if (nvme_sc) {
802 res = nvme_sc;
803 goto out_free;
804 }
805 id_ctrl = mem;
806
807 /* Since SCSI tried to save 4 bits... [SPC-4(r34) Table 591] */
808 ieee[0] = id_ctrl->ieee[0] << 4;
809 ieee[1] = id_ctrl->ieee[0] >> 4 | id_ctrl->ieee[1] << 4;
810 ieee[2] = id_ctrl->ieee[1] >> 4 | id_ctrl->ieee[2] << 4;
811 ieee[3] = id_ctrl->ieee[2] >> 4;
812
813 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
814 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
815 inq_response[3] = 20; /* Page Length */
816 /* Designation Descriptor start */
817 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
818 inq_response[5] = 0x03; /* PIV=0b | Asso=00b | Designator Type=3h */
819 inq_response[6] = 0x00; /* Rsvd */
820 inq_response[7] = 16; /* Designator Length */
821 /* Designator start */
822 inq_response[8] = 0x60 | ieee[3]; /* NAA=6h | IEEE ID MSB, High nibble*/
823 inq_response[9] = ieee[2]; /* IEEE ID */
824 inq_response[10] = ieee[1]; /* IEEE ID */
825 inq_response[11] = ieee[0]; /* IEEE ID| Vendor Specific ID... */
826 inq_response[12] = (dev->pci_dev->vendor & 0xFF00) >> 8;
827 inq_response[13] = (dev->pci_dev->vendor & 0x00FF);
828 inq_response[14] = dev->serial[0];
829 inq_response[15] = dev->serial[1];
830 inq_response[16] = dev->model[0];
831 inq_response[17] = dev->model[1];
832 memcpy(&inq_response[18], &tmp_id, sizeof(u32));
833 /* Last 2 bytes are zero */
834
835 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
836 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
837
838 out_free:
839 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
840 dma_addr);
841 out_dma:
842 return res;
843 }
844
845 static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
846 int alloc_len)
847 {
848 u8 *inq_response;
849 int res = SNTI_TRANSLATION_SUCCESS;
850 int nvme_sc;
851 struct nvme_dev *dev = ns->dev;
852 dma_addr_t dma_addr;
853 void *mem;
854 struct nvme_id_ctrl *id_ctrl;
855 struct nvme_id_ns *id_ns;
856 int xfer_len;
857 u8 microcode = 0x80;
858 u8 spt;
859 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
860 u8 grd_chk, app_chk, ref_chk, protect;
861 u8 uask_sup = 0x20;
862 u8 v_sup;
863 u8 luiclr = 0x01;
864
865 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
866 if (inq_response == NULL) {
867 res = -ENOMEM;
868 goto out_mem;
869 }
870
871 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
872 &dma_addr, GFP_KERNEL);
873 if (mem == NULL) {
874 res = -ENOMEM;
875 goto out_dma;
876 }
877
878 /* nvme ns identify */
879 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
880 res = nvme_trans_status_code(hdr, nvme_sc);
881 if (res)
882 goto out_free;
883 if (nvme_sc) {
884 res = nvme_sc;
885 goto out_free;
886 }
887 id_ns = mem;
888 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
889 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
890 grd_chk = protect << 2;
891 app_chk = protect << 1;
892 ref_chk = protect;
893
894 /* nvme controller identify */
895 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
896 res = nvme_trans_status_code(hdr, nvme_sc);
897 if (res)
898 goto out_free;
899 if (nvme_sc) {
900 res = nvme_sc;
901 goto out_free;
902 }
903 id_ctrl = mem;
904 v_sup = id_ctrl->vwc;
905
906 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
907 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
908 inq_response[2] = 0x00; /* Page Length MSB */
909 inq_response[3] = 0x3C; /* Page Length LSB */
910 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
911 inq_response[5] = uask_sup;
912 inq_response[6] = v_sup;
913 inq_response[7] = luiclr;
914 inq_response[8] = 0;
915 inq_response[9] = 0;
916
917 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
918 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
919
920 out_free:
921 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
922 dma_addr);
923 out_dma:
924 kfree(inq_response);
925 out_mem:
926 return res;
927 }
928
929 static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
930 int alloc_len)
931 {
932 u8 *inq_response;
933 int res = SNTI_TRANSLATION_SUCCESS;
934 int xfer_len;
935
936 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
937 if (inq_response == NULL) {
938 res = -ENOMEM;
939 goto out_mem;
940 }
941
942 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
943 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
944 inq_response[2] = 0x00; /* Page Length MSB */
945 inq_response[3] = 0x3C; /* Page Length LSB */
946 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
947 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
948 inq_response[6] = 0x00; /* Form Factor */
949
950 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
951 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
952
953 kfree(inq_response);
954 out_mem:
955 return res;
956 }
957
958 /* LOG SENSE Helper Functions */
959
960 static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
961 int alloc_len)
962 {
963 int res = SNTI_TRANSLATION_SUCCESS;
964 int xfer_len;
965 u8 *log_response;
966
967 log_response = kmalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
968 if (log_response == NULL) {
969 res = -ENOMEM;
970 goto out_mem;
971 }
972 memset(log_response, 0, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
973
974 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
975 /* Subpage=0x00, Page Length MSB=0 */
976 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
977 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
978 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
979 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
980
981 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
982 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
983
984 kfree(log_response);
985 out_mem:
986 return res;
987 }
988
989 static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
990 struct sg_io_hdr *hdr, int alloc_len)
991 {
992 int res = SNTI_TRANSLATION_SUCCESS;
993 int xfer_len;
994 u8 *log_response;
995 struct nvme_command c;
996 struct nvme_dev *dev = ns->dev;
997 struct nvme_smart_log *smart_log;
998 dma_addr_t dma_addr;
999 void *mem;
1000 u8 temp_c;
1001 u16 temp_k;
1002
1003 log_response = kmalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
1004 if (log_response == NULL) {
1005 res = -ENOMEM;
1006 goto out_mem;
1007 }
1008 memset(log_response, 0, LOG_INFO_EXCP_PAGE_LENGTH);
1009
1010 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1011 sizeof(struct nvme_smart_log),
1012 &dma_addr, GFP_KERNEL);
1013 if (mem == NULL) {
1014 res = -ENOMEM;
1015 goto out_dma;
1016 }
1017
1018 /* Get SMART Log Page */
1019 memset(&c, 0, sizeof(c));
1020 c.common.opcode = nvme_admin_get_log_page;
1021 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1022 c.common.prp1 = cpu_to_le64(dma_addr);
1023 c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
1024 BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
1025 res = nvme_submit_admin_cmd(dev, &c, NULL);
1026 if (res != NVME_SC_SUCCESS) {
1027 temp_c = LOG_TEMP_UNKNOWN;
1028 } else {
1029 smart_log = mem;
1030 temp_k = (smart_log->temperature[1] << 8) +
1031 (smart_log->temperature[0]);
1032 temp_c = temp_k - KELVIN_TEMP_FACTOR;
1033 }
1034
1035 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1036 /* Subpage=0x00, Page Length MSB=0 */
1037 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
1038 /* Informational Exceptions Log Parameter 1 Start */
1039 /* Parameter Code=0x0000 bytes 4,5 */
1040 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
1041 log_response[7] = 0x04; /* PARAMETER LENGTH */
1042 /* Add sense Code and qualifier = 0x00 each */
1043 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1044 log_response[10] = temp_c;
1045
1046 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
1047 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1048
1049 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1050 mem, dma_addr);
1051 out_dma:
1052 kfree(log_response);
1053 out_mem:
1054 return res;
1055 }
1056
1057 static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1058 int alloc_len)
1059 {
1060 int res = SNTI_TRANSLATION_SUCCESS;
1061 int xfer_len;
1062 u8 *log_response;
1063 struct nvme_command c;
1064 struct nvme_dev *dev = ns->dev;
1065 struct nvme_smart_log *smart_log;
1066 dma_addr_t dma_addr;
1067 void *mem;
1068 u32 feature_resp;
1069 u8 temp_c_cur, temp_c_thresh;
1070 u16 temp_k;
1071
1072 log_response = kmalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
1073 if (log_response == NULL) {
1074 res = -ENOMEM;
1075 goto out_mem;
1076 }
1077 memset(log_response, 0, LOG_TEMP_PAGE_LENGTH);
1078
1079 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1080 sizeof(struct nvme_smart_log),
1081 &dma_addr, GFP_KERNEL);
1082 if (mem == NULL) {
1083 res = -ENOMEM;
1084 goto out_dma;
1085 }
1086
1087 /* Get SMART Log Page */
1088 memset(&c, 0, sizeof(c));
1089 c.common.opcode = nvme_admin_get_log_page;
1090 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1091 c.common.prp1 = cpu_to_le64(dma_addr);
1092 c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
1093 BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
1094 res = nvme_submit_admin_cmd(dev, &c, NULL);
1095 if (res != NVME_SC_SUCCESS) {
1096 temp_c_cur = LOG_TEMP_UNKNOWN;
1097 } else {
1098 smart_log = mem;
1099 temp_k = (smart_log->temperature[1] << 8) +
1100 (smart_log->temperature[0]);
1101 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
1102 }
1103
1104 /* Get Features for Temp Threshold */
1105 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
1106 &feature_resp);
1107 if (res != NVME_SC_SUCCESS)
1108 temp_c_thresh = LOG_TEMP_UNKNOWN;
1109 else
1110 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
1111
1112 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
1113 /* Subpage=0x00, Page Length MSB=0 */
1114 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
1115 /* Temperature Log Parameter 1 (Temperature) Start */
1116 /* Parameter Code = 0x0000 */
1117 log_response[6] = 0x01; /* Format and Linking = 01b */
1118 log_response[7] = 0x02; /* Parameter Length */
1119 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1120 log_response[9] = temp_c_cur;
1121 /* Temperature Log Parameter 2 (Reference Temperature) Start */
1122 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
1123 log_response[12] = 0x01; /* Format and Linking = 01b */
1124 log_response[13] = 0x02; /* Parameter Length */
1125 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
1126 log_response[15] = temp_c_thresh;
1127
1128 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
1129 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1130
1131 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1132 mem, dma_addr);
1133 out_dma:
1134 kfree(log_response);
1135 out_mem:
1136 return res;
1137 }
1138
1139 /* MODE SENSE Helper Functions */
1140
1141 static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
1142 u16 mode_data_length, u16 blk_desc_len)
1143 {
1144 /* Quick check to make sure I don't stomp on my own memory... */
1145 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
1146 return SNTI_INTERNAL_ERROR;
1147
1148 if (cdb10) {
1149 resp[0] = (mode_data_length & 0xFF00) >> 8;
1150 resp[1] = (mode_data_length & 0x00FF);
1151 /* resp[2] and [3] are zero */
1152 resp[4] = llbaa;
1153 resp[5] = RESERVED_FIELD;
1154 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1155 resp[7] = (blk_desc_len & 0x00FF);
1156 } else {
1157 resp[0] = (mode_data_length & 0x00FF);
1158 /* resp[1] and [2] are zero */
1159 resp[3] = (blk_desc_len & 0x00FF);
1160 }
1161
1162 return SNTI_TRANSLATION_SUCCESS;
1163 }
1164
1165 static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1166 u8 *resp, int len, u8 llbaa)
1167 {
1168 int res = SNTI_TRANSLATION_SUCCESS;
1169 int nvme_sc;
1170 struct nvme_dev *dev = ns->dev;
1171 dma_addr_t dma_addr;
1172 void *mem;
1173 struct nvme_id_ns *id_ns;
1174 u8 flbas;
1175 u32 lba_length;
1176
1177 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
1178 return SNTI_INTERNAL_ERROR;
1179 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
1180 return SNTI_INTERNAL_ERROR;
1181
1182 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1183 &dma_addr, GFP_KERNEL);
1184 if (mem == NULL) {
1185 res = -ENOMEM;
1186 goto out;
1187 }
1188
1189 /* nvme ns identify */
1190 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1191 res = nvme_trans_status_code(hdr, nvme_sc);
1192 if (res)
1193 goto out_dma;
1194 if (nvme_sc) {
1195 res = nvme_sc;
1196 goto out_dma;
1197 }
1198 id_ns = mem;
1199 flbas = (id_ns->flbas) & 0x0F;
1200 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1201
1202 if (llbaa == 0) {
1203 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
1204 /* Byte 4 is reserved */
1205 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
1206
1207 memcpy(resp, &tmp_cap, sizeof(u32));
1208 memcpy(&resp[4], &tmp_len, sizeof(u32));
1209 } else {
1210 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1211 __be32 tmp_len = cpu_to_be32(lba_length);
1212
1213 memcpy(resp, &tmp_cap, sizeof(u64));
1214 /* Bytes 8, 9, 10, 11 are reserved */
1215 memcpy(&resp[12], &tmp_len, sizeof(u32));
1216 }
1217
1218 out_dma:
1219 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1220 dma_addr);
1221 out:
1222 return res;
1223 }
1224
1225 static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1226 struct sg_io_hdr *hdr, u8 *resp,
1227 int len)
1228 {
1229 if (len < MODE_PAGE_CONTROL_LEN)
1230 return SNTI_INTERNAL_ERROR;
1231
1232 resp[0] = MODE_PAGE_CONTROL;
1233 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1234 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1235 * D_SENSE=1, GLTSD=1, RLEC=0 */
1236 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1237 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1238 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1239 /* resp[6] and [7] are obsolete, thus zero */
1240 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1241 resp[9] = 0xFF;
1242 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1243
1244 return SNTI_TRANSLATION_SUCCESS;
1245 }
1246
1247 static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1248 struct sg_io_hdr *hdr,
1249 u8 *resp, int len)
1250 {
1251 int res = SNTI_TRANSLATION_SUCCESS;
1252 int nvme_sc;
1253 struct nvme_dev *dev = ns->dev;
1254 u32 feature_resp;
1255 u8 vwc;
1256
1257 if (len < MODE_PAGE_CACHING_LEN)
1258 return SNTI_INTERNAL_ERROR;
1259
1260 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1261 &feature_resp);
1262 res = nvme_trans_status_code(hdr, nvme_sc);
1263 if (res)
1264 goto out;
1265 if (nvme_sc) {
1266 res = nvme_sc;
1267 goto out;
1268 }
1269 vwc = feature_resp & 0x00000001;
1270
1271 resp[0] = MODE_PAGE_CACHING;
1272 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1273 resp[2] = vwc << 2;
1274
1275 out:
1276 return res;
1277 }
1278
1279 static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1280 struct sg_io_hdr *hdr, u8 *resp,
1281 int len)
1282 {
1283 int res = SNTI_TRANSLATION_SUCCESS;
1284
1285 if (len < MODE_PAGE_POW_CND_LEN)
1286 return SNTI_INTERNAL_ERROR;
1287
1288 resp[0] = MODE_PAGE_POWER_CONDITION;
1289 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1290 /* All other bytes are zero */
1291
1292 return res;
1293 }
1294
1295 static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1296 struct sg_io_hdr *hdr, u8 *resp,
1297 int len)
1298 {
1299 int res = SNTI_TRANSLATION_SUCCESS;
1300
1301 if (len < MODE_PAGE_INF_EXC_LEN)
1302 return SNTI_INTERNAL_ERROR;
1303
1304 resp[0] = MODE_PAGE_INFO_EXCEP;
1305 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1306 resp[2] = 0x88;
1307 /* All other bytes are zero */
1308
1309 return res;
1310 }
1311
1312 static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1313 u8 *resp, int len)
1314 {
1315 int res = SNTI_TRANSLATION_SUCCESS;
1316 u16 mode_pages_offset_1 = 0;
1317 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1318
1319 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1320 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1321 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1322
1323 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1324 MODE_PAGE_CACHING_LEN);
1325 if (res != SNTI_TRANSLATION_SUCCESS)
1326 goto out;
1327 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1328 MODE_PAGE_CONTROL_LEN);
1329 if (res != SNTI_TRANSLATION_SUCCESS)
1330 goto out;
1331 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1332 MODE_PAGE_POW_CND_LEN);
1333 if (res != SNTI_TRANSLATION_SUCCESS)
1334 goto out;
1335 res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
1336 MODE_PAGE_INF_EXC_LEN);
1337 if (res != SNTI_TRANSLATION_SUCCESS)
1338 goto out;
1339
1340 out:
1341 return res;
1342 }
1343
1344 static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1345 {
1346 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1347 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1348 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1349 } else {
1350 return 0;
1351 }
1352 }
1353
1354 static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1355 struct sg_io_hdr *hdr, u8 *cmd,
1356 u16 alloc_len, u8 cdb10,
1357 int (*mode_page_fill_func)
1358 (struct nvme_ns *,
1359 struct sg_io_hdr *hdr, u8 *, int),
1360 u16 mode_pages_tot_len)
1361 {
1362 int res = SNTI_TRANSLATION_SUCCESS;
1363 int xfer_len;
1364 u8 *response;
1365 u8 dbd, llbaa;
1366 u16 resp_size;
1367 int mph_size;
1368 u16 mode_pages_offset_1;
1369 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1370
1371 dbd = GET_MODE_SENSE_DBD(cmd);
1372 llbaa = GET_MODE_SENSE_LLBAA(cmd);
1373 mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
1374 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1375
1376 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1377 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1378 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1379
1380 blk_desc_offset = mph_size;
1381 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1382
1383 response = kmalloc(resp_size, GFP_KERNEL);
1384 if (response == NULL) {
1385 res = -ENOMEM;
1386 goto out_mem;
1387 }
1388 memset(response, 0, resp_size);
1389
1390 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1391 llbaa, mode_data_length, blk_desc_len);
1392 if (res != SNTI_TRANSLATION_SUCCESS)
1393 goto out_free;
1394 if (blk_desc_len > 0) {
1395 res = nvme_trans_fill_blk_desc(ns, hdr,
1396 &response[blk_desc_offset],
1397 blk_desc_len, llbaa);
1398 if (res != SNTI_TRANSLATION_SUCCESS)
1399 goto out_free;
1400 }
1401 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1402 mode_pages_tot_len);
1403 if (res != SNTI_TRANSLATION_SUCCESS)
1404 goto out_free;
1405
1406 xfer_len = min(alloc_len, resp_size);
1407 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1408
1409 out_free:
1410 kfree(response);
1411 out_mem:
1412 return res;
1413 }
1414
1415 /* Read Capacity Helper Functions */
1416
1417 static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1418 u8 cdb16)
1419 {
1420 u8 flbas;
1421 u32 lba_length;
1422 u64 rlba;
1423 u8 prot_en;
1424 u8 p_type_lut[4] = {0, 0, 1, 2};
1425 __be64 tmp_rlba;
1426 __be32 tmp_rlba_32;
1427 __be32 tmp_len;
1428
1429 flbas = (id_ns->flbas) & 0x0F;
1430 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1431 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1432 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1433
1434 if (!cdb16) {
1435 if (rlba > 0xFFFFFFFF)
1436 rlba = 0xFFFFFFFF;
1437 tmp_rlba_32 = cpu_to_be32(rlba);
1438 tmp_len = cpu_to_be32(lba_length);
1439 memcpy(response, &tmp_rlba_32, sizeof(u32));
1440 memcpy(&response[4], &tmp_len, sizeof(u32));
1441 } else {
1442 tmp_rlba = cpu_to_be64(rlba);
1443 tmp_len = cpu_to_be32(lba_length);
1444 memcpy(response, &tmp_rlba, sizeof(u64));
1445 memcpy(&response[8], &tmp_len, sizeof(u32));
1446 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1447 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1448 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1449 /* Bytes 16-31 - Reserved */
1450 }
1451 }
1452
1453 /* Start Stop Unit Helper Functions */
1454
1455 static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1456 u8 pc, u8 pcmod, u8 start)
1457 {
1458 int res = SNTI_TRANSLATION_SUCCESS;
1459 int nvme_sc;
1460 struct nvme_dev *dev = ns->dev;
1461 dma_addr_t dma_addr;
1462 void *mem;
1463 struct nvme_id_ctrl *id_ctrl;
1464 int lowest_pow_st; /* max npss = lowest power consumption */
1465 unsigned ps_desired = 0;
1466
1467 /* NVMe Controller Identify */
1468 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1469 sizeof(struct nvme_id_ctrl),
1470 &dma_addr, GFP_KERNEL);
1471 if (mem == NULL) {
1472 res = -ENOMEM;
1473 goto out;
1474 }
1475 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1476 res = nvme_trans_status_code(hdr, nvme_sc);
1477 if (res)
1478 goto out_dma;
1479 if (nvme_sc) {
1480 res = nvme_sc;
1481 goto out_dma;
1482 }
1483 id_ctrl = mem;
1484 lowest_pow_st = id_ctrl->npss - 1;
1485
1486 switch (pc) {
1487 case NVME_POWER_STATE_START_VALID:
1488 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1489 if (pcmod == 0 && start == 0x1)
1490 ps_desired = POWER_STATE_0;
1491 if (pcmod == 0 && start == 0x0)
1492 ps_desired = lowest_pow_st;
1493 break;
1494 case NVME_POWER_STATE_ACTIVE:
1495 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1496 if (pcmod == 0)
1497 ps_desired = POWER_STATE_0;
1498 break;
1499 case NVME_POWER_STATE_IDLE:
1500 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
1501 /* min of desired state and (lps-1) because lps is STOP */
1502 if (pcmod == 0x0)
1503 ps_desired = min(POWER_STATE_1, (lowest_pow_st - 1));
1504 else if (pcmod == 0x1)
1505 ps_desired = min(POWER_STATE_2, (lowest_pow_st - 1));
1506 else if (pcmod == 0x2)
1507 ps_desired = min(POWER_STATE_3, (lowest_pow_st - 1));
1508 break;
1509 case NVME_POWER_STATE_STANDBY:
1510 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1511 if (pcmod == 0x0)
1512 ps_desired = max(0, (lowest_pow_st - 2));
1513 else if (pcmod == 0x1)
1514 ps_desired = max(0, (lowest_pow_st - 1));
1515 break;
1516 case NVME_POWER_STATE_LU_CONTROL:
1517 default:
1518 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1519 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1520 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1521 break;
1522 }
1523 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1524 NULL);
1525 res = nvme_trans_status_code(hdr, nvme_sc);
1526 if (res)
1527 goto out_dma;
1528 if (nvme_sc)
1529 res = nvme_sc;
1530 out_dma:
1531 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
1532 dma_addr);
1533 out:
1534 return res;
1535 }
1536
1537 /* Write Buffer Helper Functions */
1538 /* Also using this for Format Unit with hdr passed as NULL, and buffer_id, 0 */
1539
1540 static int nvme_trans_send_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1541 u8 opcode, u32 tot_len, u32 offset,
1542 u8 buffer_id)
1543 {
1544 int res = SNTI_TRANSLATION_SUCCESS;
1545 int nvme_sc;
1546 struct nvme_dev *dev = ns->dev;
1547 struct nvme_command c;
1548 struct nvme_iod *iod = NULL;
1549 unsigned length;
1550
1551 memset(&c, 0, sizeof(c));
1552 c.common.opcode = opcode;
1553 if (opcode == nvme_admin_download_fw) {
1554 if (hdr->iovec_count > 0) {
1555 /* Assuming SGL is not allowed for this command */
1556 res = nvme_trans_completion(hdr,
1557 SAM_STAT_CHECK_CONDITION,
1558 ILLEGAL_REQUEST,
1559 SCSI_ASC_INVALID_CDB,
1560 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1561 goto out;
1562 }
1563 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1564 (unsigned long)hdr->dxferp, tot_len);
1565 if (IS_ERR(iod)) {
1566 res = PTR_ERR(iod);
1567 goto out;
1568 }
1569 length = nvme_setup_prps(dev, &c.common, iod, tot_len,
1570 GFP_KERNEL);
1571 if (length != tot_len) {
1572 res = -ENOMEM;
1573 goto out_unmap;
1574 }
1575
1576 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1577 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
1578 } else if (opcode == nvme_admin_activate_fw) {
1579 u32 cdw10 = buffer_id | NVME_FWACT_REPL_ACTV;
1580 c.common.cdw10[0] = cpu_to_le32(cdw10);
1581 }
1582
1583 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1584 res = nvme_trans_status_code(hdr, nvme_sc);
1585 if (res)
1586 goto out_unmap;
1587 if (nvme_sc)
1588 res = nvme_sc;
1589
1590 out_unmap:
1591 if (opcode == nvme_admin_download_fw) {
1592 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1593 nvme_free_iod(dev, iod);
1594 }
1595 out:
1596 return res;
1597 }
1598
1599 /* Mode Select Helper Functions */
1600
1601 static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1602 u16 *bd_len, u8 *llbaa)
1603 {
1604 if (cdb10) {
1605 /* 10 Byte CDB */
1606 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1607 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
1608 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &&
1609 MODE_SELECT_10_LLBAA_MASK;
1610 } else {
1611 /* 6 Byte CDB */
1612 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1613 }
1614 }
1615
1616 static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1617 u16 idx, u16 bd_len, u8 llbaa)
1618 {
1619 u16 bd_num;
1620
1621 bd_num = bd_len / ((llbaa == 0) ?
1622 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1623 /* Store block descriptor info if a FORMAT UNIT comes later */
1624 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1625 if (llbaa == 0) {
1626 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1627 ns->mode_select_num_blocks =
1628 (parm_list[idx + 1] << 16) +
1629 (parm_list[idx + 2] << 8) +
1630 (parm_list[idx + 3]);
1631
1632 ns->mode_select_block_len =
1633 (parm_list[idx + 5] << 16) +
1634 (parm_list[idx + 6] << 8) +
1635 (parm_list[idx + 7]);
1636 } else {
1637 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1638 ns->mode_select_num_blocks =
1639 (((u64)parm_list[idx + 0]) << 56) +
1640 (((u64)parm_list[idx + 1]) << 48) +
1641 (((u64)parm_list[idx + 2]) << 40) +
1642 (((u64)parm_list[idx + 3]) << 32) +
1643 (((u64)parm_list[idx + 4]) << 24) +
1644 (((u64)parm_list[idx + 5]) << 16) +
1645 (((u64)parm_list[idx + 6]) << 8) +
1646 ((u64)parm_list[idx + 7]);
1647
1648 ns->mode_select_block_len =
1649 (parm_list[idx + 12] << 24) +
1650 (parm_list[idx + 13] << 16) +
1651 (parm_list[idx + 14] << 8) +
1652 (parm_list[idx + 15]);
1653 }
1654 }
1655
1656 static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1657 u8 *mode_page, u8 page_code)
1658 {
1659 int res = SNTI_TRANSLATION_SUCCESS;
1660 int nvme_sc;
1661 struct nvme_dev *dev = ns->dev;
1662 unsigned dword11;
1663
1664 switch (page_code) {
1665 case MODE_PAGE_CACHING:
1666 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1667 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1668 0, NULL);
1669 res = nvme_trans_status_code(hdr, nvme_sc);
1670 if (res)
1671 break;
1672 if (nvme_sc) {
1673 res = nvme_sc;
1674 break;
1675 }
1676 break;
1677 case MODE_PAGE_CONTROL:
1678 break;
1679 case MODE_PAGE_POWER_CONDITION:
1680 /* Verify the OS is not trying to set timers */
1681 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1682 res = nvme_trans_completion(hdr,
1683 SAM_STAT_CHECK_CONDITION,
1684 ILLEGAL_REQUEST,
1685 SCSI_ASC_INVALID_PARAMETER,
1686 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1687 if (!res)
1688 res = SNTI_INTERNAL_ERROR;
1689 break;
1690 }
1691 break;
1692 default:
1693 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1694 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1695 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1696 if (!res)
1697 res = SNTI_INTERNAL_ERROR;
1698 break;
1699 }
1700
1701 return res;
1702 }
1703
1704 static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1705 u8 *cmd, u16 parm_list_len, u8 pf,
1706 u8 sp, u8 cdb10)
1707 {
1708 int res = SNTI_TRANSLATION_SUCCESS;
1709 u8 *parm_list;
1710 u16 bd_len;
1711 u8 llbaa = 0;
1712 u16 index, saved_index;
1713 u8 page_code;
1714 u16 mp_size;
1715
1716 /* Get parm list from data-in/out buffer */
1717 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1718 if (parm_list == NULL) {
1719 res = -ENOMEM;
1720 goto out;
1721 }
1722
1723 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
1724 if (res != SNTI_TRANSLATION_SUCCESS)
1725 goto out_mem;
1726
1727 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1728 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1729
1730 if (bd_len != 0) {
1731 /* Block Descriptors present, parse */
1732 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1733 index += bd_len;
1734 }
1735 saved_index = index;
1736
1737 /* Multiple mode pages may be present; iterate through all */
1738 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1739 do {
1740 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1741 mp_size = parm_list[index + 1] + 2;
1742 if ((page_code != MODE_PAGE_CACHING) &&
1743 (page_code != MODE_PAGE_CONTROL) &&
1744 (page_code != MODE_PAGE_POWER_CONDITION)) {
1745 res = nvme_trans_completion(hdr,
1746 SAM_STAT_CHECK_CONDITION,
1747 ILLEGAL_REQUEST,
1748 SCSI_ASC_INVALID_CDB,
1749 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1750 goto out_mem;
1751 }
1752 index += mp_size;
1753 } while (index < parm_list_len);
1754
1755 /* In 2nd Iteration, do the NVME Commands */
1756 index = saved_index;
1757 do {
1758 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1759 mp_size = parm_list[index + 1] + 2;
1760 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1761 page_code);
1762 if (res != SNTI_TRANSLATION_SUCCESS)
1763 break;
1764 index += mp_size;
1765 } while (index < parm_list_len);
1766
1767 out_mem:
1768 kfree(parm_list);
1769 out:
1770 return res;
1771 }
1772
1773 /* Format Unit Helper Functions */
1774
1775 static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1776 struct sg_io_hdr *hdr)
1777 {
1778 int res = SNTI_TRANSLATION_SUCCESS;
1779 int nvme_sc;
1780 struct nvme_dev *dev = ns->dev;
1781 dma_addr_t dma_addr;
1782 void *mem;
1783 struct nvme_id_ns *id_ns;
1784 u8 flbas;
1785
1786 /*
1787 * SCSI Expects a MODE SELECT would have been issued prior to
1788 * a FORMAT UNIT, and the block size and number would be used
1789 * from the block descriptor in it. If a MODE SELECT had not
1790 * been issued, FORMAT shall use the current values for both.
1791 */
1792
1793 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
1794 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1795 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1796 if (mem == NULL) {
1797 res = -ENOMEM;
1798 goto out;
1799 }
1800 /* nvme ns identify */
1801 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1802 res = nvme_trans_status_code(hdr, nvme_sc);
1803 if (res)
1804 goto out_dma;
1805 if (nvme_sc) {
1806 res = nvme_sc;
1807 goto out_dma;
1808 }
1809 id_ns = mem;
1810
1811 if (ns->mode_select_num_blocks == 0)
1812 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
1813 if (ns->mode_select_block_len == 0) {
1814 flbas = (id_ns->flbas) & 0x0F;
1815 ns->mode_select_block_len =
1816 (1 << (id_ns->lbaf[flbas].ds));
1817 }
1818 out_dma:
1819 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1820 mem, dma_addr);
1821 }
1822 out:
1823 return res;
1824 }
1825
1826 static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1827 u8 format_prot_info, u8 *nvme_pf_code)
1828 {
1829 int res = SNTI_TRANSLATION_SUCCESS;
1830 u8 *parm_list;
1831 u8 pf_usage, pf_code;
1832
1833 parm_list = kmalloc(len, GFP_KERNEL);
1834 if (parm_list == NULL) {
1835 res = -ENOMEM;
1836 goto out;
1837 }
1838 res = nvme_trans_copy_from_user(hdr, parm_list, len);
1839 if (res != SNTI_TRANSLATION_SUCCESS)
1840 goto out_mem;
1841
1842 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1843 FORMAT_UNIT_IMMED_MASK) != 0) {
1844 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1845 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1846 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1847 goto out_mem;
1848 }
1849
1850 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1851 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1852 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1853 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1854 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1855 goto out_mem;
1856 }
1857 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1858 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1859 pf_code = (pf_usage << 2) | format_prot_info;
1860 switch (pf_code) {
1861 case 0:
1862 *nvme_pf_code = 0;
1863 break;
1864 case 2:
1865 *nvme_pf_code = 1;
1866 break;
1867 case 3:
1868 *nvme_pf_code = 2;
1869 break;
1870 case 7:
1871 *nvme_pf_code = 3;
1872 break;
1873 default:
1874 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1875 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1876 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1877 break;
1878 }
1879
1880 out_mem:
1881 kfree(parm_list);
1882 out:
1883 return res;
1884 }
1885
1886 static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1887 u8 prot_info)
1888 {
1889 int res = SNTI_TRANSLATION_SUCCESS;
1890 int nvme_sc;
1891 struct nvme_dev *dev = ns->dev;
1892 dma_addr_t dma_addr;
1893 void *mem;
1894 struct nvme_id_ns *id_ns;
1895 u8 i;
1896 u8 flbas, nlbaf;
1897 u8 selected_lbaf = 0xFF;
1898 u32 cdw10 = 0;
1899 struct nvme_command c;
1900
1901 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
1902 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1903 &dma_addr, GFP_KERNEL);
1904 if (mem == NULL) {
1905 res = -ENOMEM;
1906 goto out;
1907 }
1908 /* nvme ns identify */
1909 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1910 res = nvme_trans_status_code(hdr, nvme_sc);
1911 if (res)
1912 goto out_dma;
1913 if (nvme_sc) {
1914 res = nvme_sc;
1915 goto out_dma;
1916 }
1917 id_ns = mem;
1918 flbas = (id_ns->flbas) & 0x0F;
1919 nlbaf = id_ns->nlbaf;
1920
1921 for (i = 0; i < nlbaf; i++) {
1922 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1923 selected_lbaf = i;
1924 break;
1925 }
1926 }
1927 if (selected_lbaf > 0x0F) {
1928 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1929 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1930 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1931 }
1932 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
1933 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1934 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1935 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1936 }
1937
1938 cdw10 |= prot_info << 5;
1939 cdw10 |= selected_lbaf & 0x0F;
1940 memset(&c, 0, sizeof(c));
1941 c.format.opcode = nvme_admin_format_nvm;
1942 c.format.nsid = cpu_to_le32(ns->ns_id);
1943 c.format.cdw10 = cpu_to_le32(cdw10);
1944
1945 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1946 res = nvme_trans_status_code(hdr, nvme_sc);
1947 if (res)
1948 goto out_dma;
1949 if (nvme_sc)
1950 res = nvme_sc;
1951
1952 out_dma:
1953 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1954 dma_addr);
1955 out:
1956 return res;
1957 }
1958
1959 /* Read/Write Helper Functions */
1960
1961 static inline void nvme_trans_get_io_cdb6(u8 *cmd,
1962 struct nvme_trans_io_cdb *cdb_info)
1963 {
1964 cdb_info->fua = 0;
1965 cdb_info->prot_info = 0;
1966 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
1967 IO_6_CDB_LBA_MASK;
1968 cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
1969
1970 /* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
1971 if (cdb_info->xfer_len == 0)
1972 cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
1973 }
1974
1975 static inline void nvme_trans_get_io_cdb10(u8 *cmd,
1976 struct nvme_trans_io_cdb *cdb_info)
1977 {
1978 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
1979 IO_CDB_FUA_MASK;
1980 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
1981 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1982 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
1983 cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
1984 }
1985
1986 static inline void nvme_trans_get_io_cdb12(u8 *cmd,
1987 struct nvme_trans_io_cdb *cdb_info)
1988 {
1989 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
1990 IO_CDB_FUA_MASK;
1991 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
1992 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1993 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
1994 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
1995 }
1996
1997 static inline void nvme_trans_get_io_cdb16(u8 *cmd,
1998 struct nvme_trans_io_cdb *cdb_info)
1999 {
2000 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
2001 IO_CDB_FUA_MASK;
2002 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
2003 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
2004 cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
2005 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
2006 }
2007
2008 static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
2009 struct nvme_trans_io_cdb *cdb_info,
2010 u32 max_blocks)
2011 {
2012 /* If using iovecs, send one nvme command per vector */
2013 if (hdr->iovec_count > 0)
2014 return hdr->iovec_count;
2015 else if (cdb_info->xfer_len > max_blocks)
2016 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
2017 else
2018 return 1;
2019 }
2020
2021 static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
2022 struct nvme_trans_io_cdb *cdb_info)
2023 {
2024 u16 control = 0;
2025
2026 /* When Protection information support is added, implement here */
2027
2028 if (cdb_info->fua > 0)
2029 control |= NVME_RW_FUA;
2030
2031 return control;
2032 }
2033
2034 static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2035 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
2036 {
2037 int res = SNTI_TRANSLATION_SUCCESS;
2038 int nvme_sc;
2039 struct nvme_dev *dev = ns->dev;
2040 struct nvme_queue *nvmeq;
2041 u32 num_cmds;
2042 struct nvme_iod *iod;
2043 u64 unit_len;
2044 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
2045 u32 retcode;
2046 u32 i = 0;
2047 u64 nvme_offset = 0;
2048 void __user *next_mapping_addr;
2049 struct nvme_command c;
2050 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
2051 u16 control;
2052 u32 max_blocks = nvme_block_nr(ns, dev->max_hw_sectors);
2053
2054 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
2055
2056 /*
2057 * This loop handles two cases.
2058 * First, when an SGL is used in the form of an iovec list:
2059 * - Use iov_base as the next mapping address for the nvme command_id
2060 * - Use iov_len as the data transfer length for the command.
2061 * Second, when we have a single buffer
2062 * - If larger than max_blocks, split into chunks, offset
2063 * each nvme command accordingly.
2064 */
2065 for (i = 0; i < num_cmds; i++) {
2066 memset(&c, 0, sizeof(c));
2067 if (hdr->iovec_count > 0) {
2068 struct sg_iovec sgl;
2069
2070 retcode = copy_from_user(&sgl, hdr->dxferp +
2071 i * sizeof(struct sg_iovec),
2072 sizeof(struct sg_iovec));
2073 if (retcode)
2074 return -EFAULT;
2075 unit_len = sgl.iov_len;
2076 unit_num_blocks = unit_len >> ns->lba_shift;
2077 next_mapping_addr = sgl.iov_base;
2078 } else {
2079 unit_num_blocks = min((u64)max_blocks,
2080 (cdb_info->xfer_len - nvme_offset));
2081 unit_len = unit_num_blocks << ns->lba_shift;
2082 next_mapping_addr = hdr->dxferp +
2083 ((1 << ns->lba_shift) * nvme_offset);
2084 }
2085
2086 c.rw.opcode = opcode;
2087 c.rw.nsid = cpu_to_le32(ns->ns_id);
2088 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
2089 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
2090 control = nvme_trans_io_get_control(ns, cdb_info);
2091 c.rw.control = cpu_to_le16(control);
2092
2093 iod = nvme_map_user_pages(dev,
2094 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2095 (unsigned long)next_mapping_addr, unit_len);
2096 if (IS_ERR(iod)) {
2097 res = PTR_ERR(iod);
2098 goto out;
2099 }
2100 retcode = nvme_setup_prps(dev, &c.common, iod, unit_len,
2101 GFP_KERNEL);
2102 if (retcode != unit_len) {
2103 nvme_unmap_user_pages(dev,
2104 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2105 iod);
2106 nvme_free_iod(dev, iod);
2107 res = -ENOMEM;
2108 goto out;
2109 }
2110
2111 nvme_offset += unit_num_blocks;
2112
2113 nvmeq = get_nvmeq(dev);
2114 /*
2115 * Since nvme_submit_sync_cmd sleeps, we can't keep
2116 * preemption disabled. We may be preempted at any
2117 * point, and be rescheduled to a different CPU. That
2118 * will cause cacheline bouncing, but no additional
2119 * races since q_lock already protects against other
2120 * CPUs.
2121 */
2122 put_nvmeq(nvmeq);
2123 nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL,
2124 NVME_IO_TIMEOUT);
2125 if (nvme_sc != NVME_SC_SUCCESS) {
2126 nvme_unmap_user_pages(dev,
2127 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2128 iod);
2129 nvme_free_iod(dev, iod);
2130 res = nvme_trans_status_code(hdr, nvme_sc);
2131 goto out;
2132 }
2133 nvme_unmap_user_pages(dev,
2134 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2135 iod);
2136 nvme_free_iod(dev, iod);
2137 }
2138 res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2139
2140 out:
2141 return res;
2142 }
2143
2144
2145 /* SCSI Command Translation Functions */
2146
2147 static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
2148 u8 *cmd)
2149 {
2150 int res = SNTI_TRANSLATION_SUCCESS;
2151 struct nvme_trans_io_cdb cdb_info;
2152 u8 opcode = cmd[0];
2153 u64 xfer_bytes;
2154 u64 sum_iov_len = 0;
2155 struct sg_iovec sgl;
2156 int i;
2157 size_t not_copied;
2158
2159 /* Extract Fields from CDB */
2160 switch (opcode) {
2161 case WRITE_6:
2162 case READ_6:
2163 nvme_trans_get_io_cdb6(cmd, &cdb_info);
2164 break;
2165 case WRITE_10:
2166 case READ_10:
2167 nvme_trans_get_io_cdb10(cmd, &cdb_info);
2168 break;
2169 case WRITE_12:
2170 case READ_12:
2171 nvme_trans_get_io_cdb12(cmd, &cdb_info);
2172 break;
2173 case WRITE_16:
2174 case READ_16:
2175 nvme_trans_get_io_cdb16(cmd, &cdb_info);
2176 break;
2177 default:
2178 /* Will never really reach here */
2179 res = SNTI_INTERNAL_ERROR;
2180 goto out;
2181 }
2182
2183 /* Calculate total length of transfer (in bytes) */
2184 if (hdr->iovec_count > 0) {
2185 for (i = 0; i < hdr->iovec_count; i++) {
2186 not_copied = copy_from_user(&sgl, hdr->dxferp +
2187 i * sizeof(struct sg_iovec),
2188 sizeof(struct sg_iovec));
2189 if (not_copied)
2190 return -EFAULT;
2191 sum_iov_len += sgl.iov_len;
2192 /* IO vector sizes should be multiples of block size */
2193 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
2194 res = nvme_trans_completion(hdr,
2195 SAM_STAT_CHECK_CONDITION,
2196 ILLEGAL_REQUEST,
2197 SCSI_ASC_INVALID_PARAMETER,
2198 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2199 goto out;
2200 }
2201 }
2202 } else {
2203 sum_iov_len = hdr->dxfer_len;
2204 }
2205
2206 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
2207 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
2208
2209 /* If block count and actual data buffer size dont match, error out */
2210 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
2211 res = -EINVAL;
2212 goto out;
2213 }
2214
2215 /* Check for 0 length transfer - it is not illegal */
2216 if (cdb_info.xfer_len == 0)
2217 goto out;
2218
2219 /* Send NVMe IO Command(s) */
2220 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
2221 if (res != SNTI_TRANSLATION_SUCCESS)
2222 goto out;
2223
2224 out:
2225 return res;
2226 }
2227
2228 static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2229 u8 *cmd)
2230 {
2231 int res = SNTI_TRANSLATION_SUCCESS;
2232 u8 evpd;
2233 u8 page_code;
2234 int alloc_len;
2235 u8 *inq_response;
2236
2237 evpd = GET_INQ_EVPD_BIT(cmd);
2238 page_code = GET_INQ_PAGE_CODE(cmd);
2239 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2240
2241 inq_response = kmalloc(STANDARD_INQUIRY_LENGTH, GFP_KERNEL);
2242 if (inq_response == NULL) {
2243 res = -ENOMEM;
2244 goto out_mem;
2245 }
2246
2247 if (evpd == 0) {
2248 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2249 res = nvme_trans_standard_inquiry_page(ns, hdr,
2250 inq_response, alloc_len);
2251 } else {
2252 res = nvme_trans_completion(hdr,
2253 SAM_STAT_CHECK_CONDITION,
2254 ILLEGAL_REQUEST,
2255 SCSI_ASC_INVALID_CDB,
2256 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2257 }
2258 } else {
2259 switch (page_code) {
2260 case VPD_SUPPORTED_PAGES:
2261 res = nvme_trans_supported_vpd_pages(ns, hdr,
2262 inq_response, alloc_len);
2263 break;
2264 case VPD_SERIAL_NUMBER:
2265 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2266 alloc_len);
2267 break;
2268 case VPD_DEVICE_IDENTIFIERS:
2269 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2270 alloc_len);
2271 break;
2272 case VPD_EXTENDED_INQUIRY:
2273 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2274 break;
2275 case VPD_BLOCK_DEV_CHARACTERISTICS:
2276 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2277 break;
2278 default:
2279 res = nvme_trans_completion(hdr,
2280 SAM_STAT_CHECK_CONDITION,
2281 ILLEGAL_REQUEST,
2282 SCSI_ASC_INVALID_CDB,
2283 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2284 break;
2285 }
2286 }
2287 kfree(inq_response);
2288 out_mem:
2289 return res;
2290 }
2291
2292 static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2293 u8 *cmd)
2294 {
2295 int res = SNTI_TRANSLATION_SUCCESS;
2296 u16 alloc_len;
2297 u8 sp;
2298 u8 pc;
2299 u8 page_code;
2300
2301 sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
2302 if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
2303 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2304 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2305 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2306 goto out;
2307 }
2308 pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
2309 page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
2310 pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
2311 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2312 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2313 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2314 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2315 goto out;
2316 }
2317 alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
2318 switch (page_code) {
2319 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2320 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2321 break;
2322 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2323 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2324 break;
2325 case LOG_PAGE_TEMPERATURE_PAGE:
2326 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2327 break;
2328 default:
2329 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2330 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2331 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2332 break;
2333 }
2334
2335 out:
2336 return res;
2337 }
2338
2339 static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2340 u8 *cmd)
2341 {
2342 int res = SNTI_TRANSLATION_SUCCESS;
2343 u8 cdb10 = 0;
2344 u16 parm_list_len;
2345 u8 page_format;
2346 u8 save_pages;
2347
2348 page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
2349 page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2350
2351 save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
2352 save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
2353
2354 if (GET_OPCODE(cmd) == MODE_SELECT) {
2355 parm_list_len = GET_U8_FROM_CDB(cmd,
2356 MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
2357 } else {
2358 parm_list_len = GET_U16_FROM_CDB(cmd,
2359 MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
2360 cdb10 = 1;
2361 }
2362
2363 if (parm_list_len != 0) {
2364 /*
2365 * According to SPC-4 r24, a paramter list length field of 0
2366 * shall not be considered an error
2367 */
2368 res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
2369 page_format, save_pages, cdb10);
2370 }
2371
2372 return res;
2373 }
2374
2375 static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2376 u8 *cmd)
2377 {
2378 int res = SNTI_TRANSLATION_SUCCESS;
2379 u16 alloc_len;
2380 u8 cdb10 = 0;
2381 u8 page_code;
2382 u8 pc;
2383
2384 if (GET_OPCODE(cmd) == MODE_SENSE) {
2385 alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
2386 } else {
2387 alloc_len = GET_U16_FROM_CDB(cmd,
2388 MODE_SENSE10_ALLOC_LEN_OFFSET);
2389 cdb10 = 1;
2390 }
2391
2392 pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
2393 MODE_SENSE_PAGE_CONTROL_MASK;
2394 if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
2395 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2396 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2397 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2398 goto out;
2399 }
2400
2401 page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
2402 MODE_SENSE_PAGE_CODE_MASK;
2403 switch (page_code) {
2404 case MODE_PAGE_CACHING:
2405 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2406 cdb10,
2407 &nvme_trans_fill_caching_page,
2408 MODE_PAGE_CACHING_LEN);
2409 break;
2410 case MODE_PAGE_CONTROL:
2411 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2412 cdb10,
2413 &nvme_trans_fill_control_page,
2414 MODE_PAGE_CONTROL_LEN);
2415 break;
2416 case MODE_PAGE_POWER_CONDITION:
2417 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2418 cdb10,
2419 &nvme_trans_fill_pow_cnd_page,
2420 MODE_PAGE_POW_CND_LEN);
2421 break;
2422 case MODE_PAGE_INFO_EXCEP:
2423 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2424 cdb10,
2425 &nvme_trans_fill_inf_exc_page,
2426 MODE_PAGE_INF_EXC_LEN);
2427 break;
2428 case MODE_PAGE_RETURN_ALL:
2429 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2430 cdb10,
2431 &nvme_trans_fill_all_pages,
2432 MODE_PAGE_ALL_LEN);
2433 break;
2434 default:
2435 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2436 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2437 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2438 break;
2439 }
2440
2441 out:
2442 return res;
2443 }
2444
2445 static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2446 u8 *cmd)
2447 {
2448 int res = SNTI_TRANSLATION_SUCCESS;
2449 int nvme_sc;
2450 u32 alloc_len = READ_CAP_10_RESP_SIZE;
2451 u32 resp_size = READ_CAP_10_RESP_SIZE;
2452 u32 xfer_len;
2453 u8 cdb16;
2454 struct nvme_dev *dev = ns->dev;
2455 dma_addr_t dma_addr;
2456 void *mem;
2457 struct nvme_id_ns *id_ns;
2458 u8 *response;
2459
2460 cdb16 = IS_READ_CAP_16(cmd);
2461 if (cdb16) {
2462 alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
2463 resp_size = READ_CAP_16_RESP_SIZE;
2464 }
2465
2466 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
2467 &dma_addr, GFP_KERNEL);
2468 if (mem == NULL) {
2469 res = -ENOMEM;
2470 goto out;
2471 }
2472 /* nvme ns identify */
2473 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2474 res = nvme_trans_status_code(hdr, nvme_sc);
2475 if (res)
2476 goto out_dma;
2477 if (nvme_sc) {
2478 res = nvme_sc;
2479 goto out_dma;
2480 }
2481 id_ns = mem;
2482
2483 response = kmalloc(resp_size, GFP_KERNEL);
2484 if (response == NULL) {
2485 res = -ENOMEM;
2486 goto out_dma;
2487 }
2488 memset(response, 0, resp_size);
2489 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2490
2491 xfer_len = min(alloc_len, resp_size);
2492 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2493
2494 kfree(response);
2495 out_dma:
2496 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
2497 dma_addr);
2498 out:
2499 return res;
2500 }
2501
2502 static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2503 u8 *cmd)
2504 {
2505 int res = SNTI_TRANSLATION_SUCCESS;
2506 int nvme_sc;
2507 u32 alloc_len, xfer_len, resp_size;
2508 u8 select_report;
2509 u8 *response;
2510 struct nvme_dev *dev = ns->dev;
2511 dma_addr_t dma_addr;
2512 void *mem;
2513 struct nvme_id_ctrl *id_ctrl;
2514 u32 ll_length, lun_id;
2515 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
2516 __be32 tmp_len;
2517
2518 alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
2519 select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
2520
2521 if ((select_report != ALL_LUNS_RETURNED) &&
2522 (select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
2523 (select_report != RESTRICTED_LUNS_RETURNED)) {
2524 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2525 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2526 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2527 goto out;
2528 } else {
2529 /* NVMe Controller Identify */
2530 mem = dma_alloc_coherent(&dev->pci_dev->dev,
2531 sizeof(struct nvme_id_ctrl),
2532 &dma_addr, GFP_KERNEL);
2533 if (mem == NULL) {
2534 res = -ENOMEM;
2535 goto out;
2536 }
2537 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2538 res = nvme_trans_status_code(hdr, nvme_sc);
2539 if (res)
2540 goto out_dma;
2541 if (nvme_sc) {
2542 res = nvme_sc;
2543 goto out_dma;
2544 }
2545 id_ctrl = mem;
2546 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
2547 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2548
2549 if (alloc_len < resp_size) {
2550 res = nvme_trans_completion(hdr,
2551 SAM_STAT_CHECK_CONDITION,
2552 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2553 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2554 goto out_dma;
2555 }
2556
2557 response = kmalloc(resp_size, GFP_KERNEL);
2558 if (response == NULL) {
2559 res = -ENOMEM;
2560 goto out_dma;
2561 }
2562 memset(response, 0, resp_size);
2563
2564 /* The first LUN ID will always be 0 per the SAM spec */
2565 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
2566 /*
2567 * Set the LUN Id and then increment to the next LUN
2568 * location in the parameter data.
2569 */
2570 __be64 tmp_id = cpu_to_be64(lun_id);
2571 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2572 lun_id_offset += LUN_ENTRY_SIZE;
2573 }
2574 tmp_len = cpu_to_be32(ll_length);
2575 memcpy(response, &tmp_len, sizeof(u32));
2576 }
2577
2578 xfer_len = min(alloc_len, resp_size);
2579 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2580
2581 kfree(response);
2582 out_dma:
2583 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
2584 dma_addr);
2585 out:
2586 return res;
2587 }
2588
2589 static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2590 u8 *cmd)
2591 {
2592 int res = SNTI_TRANSLATION_SUCCESS;
2593 u8 alloc_len, xfer_len, resp_size;
2594 u8 desc_format;
2595 u8 *response;
2596
2597 alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
2598 desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
2599 desc_format &= REQUEST_SENSE_DESC_MASK;
2600
2601 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2602 (FIXED_FMT_SENSE_DATA_SIZE));
2603 response = kmalloc(resp_size, GFP_KERNEL);
2604 if (response == NULL) {
2605 res = -ENOMEM;
2606 goto out;
2607 }
2608 memset(response, 0, resp_size);
2609
2610 if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
2611 /* Descriptor Format Sense Data */
2612 response[0] = DESC_FORMAT_SENSE_DATA;
2613 response[1] = NO_SENSE;
2614 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2615 response[2] = SCSI_ASC_NO_SENSE;
2616 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2617 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2618 } else {
2619 /* Fixed Format Sense Data */
2620 response[0] = FIXED_SENSE_DATA;
2621 /* Byte 1 = Obsolete */
2622 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2623 /* Bytes 3-6 - Information - set to zero */
2624 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2625 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2626 response[12] = SCSI_ASC_NO_SENSE;
2627 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2628 /* Byte 14 = Field Replaceable Unit Code = 0 */
2629 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2630 }
2631
2632 xfer_len = min(alloc_len, resp_size);
2633 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2634
2635 kfree(response);
2636 out:
2637 return res;
2638 }
2639
2640 static int nvme_trans_security_protocol(struct nvme_ns *ns,
2641 struct sg_io_hdr *hdr,
2642 u8 *cmd)
2643 {
2644 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2645 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2646 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2647 }
2648
2649 static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2650 u8 *cmd)
2651 {
2652 int res = SNTI_TRANSLATION_SUCCESS;
2653 int nvme_sc;
2654 struct nvme_queue *nvmeq;
2655 struct nvme_command c;
2656 u8 immed, pcmod, pc, no_flush, start;
2657
2658 immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
2659 pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
2660 pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
2661 no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
2662 start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
2663
2664 immed &= START_STOP_UNIT_CDB_IMMED_MASK;
2665 pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
2666 pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
2667 no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
2668 start &= START_STOP_UNIT_CDB_START_MASK;
2669
2670 if (immed != 0) {
2671 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2672 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2673 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2674 } else {
2675 if (no_flush == 0) {
2676 /* Issue NVME FLUSH command prior to START STOP UNIT */
2677 memset(&c, 0, sizeof(c));
2678 c.common.opcode = nvme_cmd_flush;
2679 c.common.nsid = cpu_to_le32(ns->ns_id);
2680
2681 nvmeq = get_nvmeq(ns->dev);
2682 put_nvmeq(nvmeq);
2683 nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
2684
2685 res = nvme_trans_status_code(hdr, nvme_sc);
2686 if (res)
2687 goto out;
2688 if (nvme_sc) {
2689 res = nvme_sc;
2690 goto out;
2691 }
2692 }
2693 /* Setup the expected power state transition */
2694 res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
2695 }
2696
2697 out:
2698 return res;
2699 }
2700
2701 static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2702 struct sg_io_hdr *hdr, u8 *cmd)
2703 {
2704 int res = SNTI_TRANSLATION_SUCCESS;
2705 int nvme_sc;
2706 struct nvme_command c;
2707 struct nvme_queue *nvmeq;
2708
2709 memset(&c, 0, sizeof(c));
2710 c.common.opcode = nvme_cmd_flush;
2711 c.common.nsid = cpu_to_le32(ns->ns_id);
2712
2713 nvmeq = get_nvmeq(ns->dev);
2714 put_nvmeq(nvmeq);
2715 nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
2716
2717 res = nvme_trans_status_code(hdr, nvme_sc);
2718 if (res)
2719 goto out;
2720 if (nvme_sc)
2721 res = nvme_sc;
2722
2723 out:
2724 return res;
2725 }
2726
2727 static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2728 u8 *cmd)
2729 {
2730 int res = SNTI_TRANSLATION_SUCCESS;
2731 u8 parm_hdr_len = 0;
2732 u8 nvme_pf_code = 0;
2733 u8 format_prot_info, long_list, format_data;
2734
2735 format_prot_info = GET_U8_FROM_CDB(cmd,
2736 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
2737 long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
2738 format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
2739
2740 format_prot_info = (format_prot_info &
2741 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
2742 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
2743 long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
2744 format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
2745
2746 if (format_data != 0) {
2747 if (format_prot_info != 0) {
2748 if (long_list == 0)
2749 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2750 else
2751 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2752 }
2753 } else if (format_data == 0 && format_prot_info != 0) {
2754 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2755 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2756 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2757 goto out;
2758 }
2759
2760 /* Get parm header from data-in/out buffer */
2761 /*
2762 * According to the translation spec, the only fields in the parameter
2763 * list we are concerned with are in the header. So allocate only that.
2764 */
2765 if (parm_hdr_len > 0) {
2766 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2767 format_prot_info, &nvme_pf_code);
2768 if (res != SNTI_TRANSLATION_SUCCESS)
2769 goto out;
2770 }
2771
2772 /* Attempt to activate any previously downloaded firmware image */
2773 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw, 0, 0, 0);
2774
2775 /* Determine Block size and count and send format command */
2776 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
2777 if (res != SNTI_TRANSLATION_SUCCESS)
2778 goto out;
2779
2780 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2781
2782 out:
2783 return res;
2784 }
2785
2786 static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2787 struct sg_io_hdr *hdr,
2788 u8 *cmd)
2789 {
2790 int res = SNTI_TRANSLATION_SUCCESS;
2791 struct nvme_dev *dev = ns->dev;
2792
2793 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
2794 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2795 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2796 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2797 else
2798 res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
2799
2800 return res;
2801 }
2802
2803 static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2804 u8 *cmd)
2805 {
2806 int res = SNTI_TRANSLATION_SUCCESS;
2807 u32 buffer_offset, parm_list_length;
2808 u8 buffer_id, mode;
2809
2810 parm_list_length =
2811 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
2812 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2813 /* NVMe expects Firmware file to be a whole number of DWORDS */
2814 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2815 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2816 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2817 goto out;
2818 }
2819 buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
2820 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2821 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2822 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2823 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2824 goto out;
2825 }
2826 mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
2827 WRITE_BUFFER_CDB_MODE_MASK;
2828 buffer_offset =
2829 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
2830
2831 switch (mode) {
2832 case DOWNLOAD_SAVE_ACTIVATE:
2833 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2834 parm_list_length, buffer_offset,
2835 buffer_id);
2836 if (res != SNTI_TRANSLATION_SUCCESS)
2837 goto out;
2838 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2839 parm_list_length, buffer_offset,
2840 buffer_id);
2841 break;
2842 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
2843 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2844 parm_list_length, buffer_offset,
2845 buffer_id);
2846 break;
2847 case ACTIVATE_DEFERRED_MICROCODE:
2848 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2849 parm_list_length, buffer_offset,
2850 buffer_id);
2851 break;
2852 default:
2853 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2854 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2855 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2856 break;
2857 }
2858
2859 out:
2860 return res;
2861 }
2862
2863 struct scsi_unmap_blk_desc {
2864 __be64 slba;
2865 __be32 nlb;
2866 u32 resv;
2867 };
2868
2869 struct scsi_unmap_parm_list {
2870 __be16 unmap_data_len;
2871 __be16 unmap_blk_desc_data_len;
2872 u32 resv;
2873 struct scsi_unmap_blk_desc desc[0];
2874 };
2875
2876 static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2877 u8 *cmd)
2878 {
2879 struct nvme_dev *dev = ns->dev;
2880 struct scsi_unmap_parm_list *plist;
2881 struct nvme_dsm_range *range;
2882 struct nvme_queue *nvmeq;
2883 struct nvme_command c;
2884 int i, nvme_sc, res = -ENOMEM;
2885 u16 ndesc, list_len;
2886 dma_addr_t dma_addr;
2887
2888 list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
2889 if (!list_len)
2890 return -EINVAL;
2891
2892 plist = kmalloc(list_len, GFP_KERNEL);
2893 if (!plist)
2894 return -ENOMEM;
2895
2896 res = nvme_trans_copy_from_user(hdr, plist, list_len);
2897 if (res != SNTI_TRANSLATION_SUCCESS)
2898 goto out;
2899
2900 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2901 if (!ndesc || ndesc > 256) {
2902 res = -EINVAL;
2903 goto out;
2904 }
2905
2906 range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2907 &dma_addr, GFP_KERNEL);
2908 if (!range)
2909 goto out;
2910
2911 for (i = 0; i < ndesc; i++) {
2912 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2913 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2914 range[i].cattr = 0;
2915 }
2916
2917 memset(&c, 0, sizeof(c));
2918 c.dsm.opcode = nvme_cmd_dsm;
2919 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2920 c.dsm.prp1 = cpu_to_le64(dma_addr);
2921 c.dsm.nr = cpu_to_le32(ndesc - 1);
2922 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2923
2924 nvmeq = get_nvmeq(dev);
2925 put_nvmeq(nvmeq);
2926
2927 nvme_sc = nvme_submit_sync_cmd(nvmeq, &c, NULL, NVME_IO_TIMEOUT);
2928 res = nvme_trans_status_code(hdr, nvme_sc);
2929
2930 dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2931 range, dma_addr);
2932 out:
2933 kfree(plist);
2934 return res;
2935 }
2936
2937 static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2938 {
2939 u8 cmd[BLK_MAX_CDB];
2940 int retcode;
2941 unsigned int opcode;
2942
2943 if (hdr->cmdp == NULL)
2944 return -EMSGSIZE;
2945 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2946 return -EFAULT;
2947
2948 opcode = cmd[0];
2949
2950 switch (opcode) {
2951 case READ_6:
2952 case READ_10:
2953 case READ_12:
2954 case READ_16:
2955 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2956 break;
2957 case WRITE_6:
2958 case WRITE_10:
2959 case WRITE_12:
2960 case WRITE_16:
2961 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2962 break;
2963 case INQUIRY:
2964 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2965 break;
2966 case LOG_SENSE:
2967 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2968 break;
2969 case MODE_SELECT:
2970 case MODE_SELECT_10:
2971 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2972 break;
2973 case MODE_SENSE:
2974 case MODE_SENSE_10:
2975 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2976 break;
2977 case READ_CAPACITY:
2978 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2979 break;
2980 case SERVICE_ACTION_IN:
2981 if (IS_READ_CAP_16(cmd))
2982 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2983 else
2984 goto out;
2985 break;
2986 case REPORT_LUNS:
2987 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2988 break;
2989 case REQUEST_SENSE:
2990 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2991 break;
2992 case SECURITY_PROTOCOL_IN:
2993 case SECURITY_PROTOCOL_OUT:
2994 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2995 break;
2996 case START_STOP:
2997 retcode = nvme_trans_start_stop(ns, hdr, cmd);
2998 break;
2999 case SYNCHRONIZE_CACHE:
3000 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
3001 break;
3002 case FORMAT_UNIT:
3003 retcode = nvme_trans_format_unit(ns, hdr, cmd);
3004 break;
3005 case TEST_UNIT_READY:
3006 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
3007 break;
3008 case WRITE_BUFFER:
3009 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
3010 break;
3011 case UNMAP:
3012 retcode = nvme_trans_unmap(ns, hdr, cmd);
3013 break;
3014 default:
3015 out:
3016 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
3017 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
3018 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
3019 break;
3020 }
3021 return retcode;
3022 }
3023
3024 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
3025 {
3026 struct sg_io_hdr hdr;
3027 int retcode;
3028
3029 if (!capable(CAP_SYS_ADMIN))
3030 return -EACCES;
3031 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
3032 return -EFAULT;
3033 if (hdr.interface_id != 'S')
3034 return -EINVAL;
3035 if (hdr.cmd_len > BLK_MAX_CDB)
3036 return -EINVAL;
3037
3038 retcode = nvme_scsi_translate(ns, &hdr);
3039 if (retcode < 0)
3040 return retcode;
3041 if (retcode > 0)
3042 retcode = SNTI_TRANSLATION_SUCCESS;
3043 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
3044 return -EFAULT;
3045
3046 return retcode;
3047 }
3048
3049 int nvme_sg_get_version_num(int __user *ip)
3050 {
3051 return put_user(sg_version_num, ip);
3052 }
CRIS linux kernel tree