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[cris-mirror.git] / drivers / infiniband / hw / qib / qib_driver.c
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1 /*
2 * Copyright (c) 2013 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
35 #include <linux/spinlock.h>
36 #include <linux/pci.h>
37 #include <linux/io.h>
38 #include <linux/delay.h>
39 #include <linux/netdevice.h>
40 #include <linux/vmalloc.h>
41 #include <linux/module.h>
42 #include <linux/prefetch.h>
44 #include "qib.h"
47 * The size has to be longer than this string, so we can append
48 * board/chip information to it in the init code.
50 const char ib_qib_version[] = QIB_DRIVER_VERSION "\n";
52 DEFINE_SPINLOCK(qib_devs_lock);
53 LIST_HEAD(qib_dev_list);
54 DEFINE_MUTEX(qib_mutex); /* general driver use */
56 unsigned qib_ibmtu;
57 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
58 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
60 unsigned qib_compat_ddr_negotiate = 1;
61 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
62 S_IWUSR | S_IRUGO);
63 MODULE_PARM_DESC(compat_ddr_negotiate,
64 "Attempt pre-IBTA 1.2 DDR speed negotiation");
66 MODULE_LICENSE("Dual BSD/GPL");
67 MODULE_AUTHOR("Intel <ibsupport@intel.com>");
68 MODULE_DESCRIPTION("Intel IB driver");
69 MODULE_VERSION(QIB_DRIVER_VERSION);
72 * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
73 * PIO send buffers. This is well beyond anything currently
74 * defined in the InfiniBand spec.
76 #define QIB_PIO_MAXIBHDR 128
79 * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt.
81 #define QIB_MAX_PKT_RECV 64
83 struct qlogic_ib_stats qib_stats;
85 const char *qib_get_unit_name(int unit)
87 static char iname[16];
89 snprintf(iname, sizeof iname, "infinipath%u", unit);
90 return iname;
94 * Return count of units with at least one port ACTIVE.
96 int qib_count_active_units(void)
98 struct qib_devdata *dd;
99 struct qib_pportdata *ppd;
100 unsigned long flags;
101 int pidx, nunits_active = 0;
103 spin_lock_irqsave(&qib_devs_lock, flags);
104 list_for_each_entry(dd, &qib_dev_list, list) {
105 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
106 continue;
107 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
108 ppd = dd->pport + pidx;
109 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
110 QIBL_LINKARMED | QIBL_LINKACTIVE))) {
111 nunits_active++;
112 break;
116 spin_unlock_irqrestore(&qib_devs_lock, flags);
117 return nunits_active;
121 * Return count of all units, optionally return in arguments
122 * the number of usable (present) units, and the number of
123 * ports that are up.
125 int qib_count_units(int *npresentp, int *nupp)
127 int nunits = 0, npresent = 0, nup = 0;
128 struct qib_devdata *dd;
129 unsigned long flags;
130 int pidx;
131 struct qib_pportdata *ppd;
133 spin_lock_irqsave(&qib_devs_lock, flags);
135 list_for_each_entry(dd, &qib_dev_list, list) {
136 nunits++;
137 if ((dd->flags & QIB_PRESENT) && dd->kregbase)
138 npresent++;
139 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
140 ppd = dd->pport + pidx;
141 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
142 QIBL_LINKARMED | QIBL_LINKACTIVE)))
143 nup++;
147 spin_unlock_irqrestore(&qib_devs_lock, flags);
149 if (npresentp)
150 *npresentp = npresent;
151 if (nupp)
152 *nupp = nup;
154 return nunits;
158 * qib_wait_linkstate - wait for an IB link state change to occur
159 * @dd: the qlogic_ib device
160 * @state: the state to wait for
161 * @msecs: the number of milliseconds to wait
163 * wait up to msecs milliseconds for IB link state change to occur for
164 * now, take the easy polling route. Currently used only by
165 * qib_set_linkstate. Returns 0 if state reached, otherwise
166 * -ETIMEDOUT state can have multiple states set, for any of several
167 * transitions.
169 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
171 int ret;
172 unsigned long flags;
174 spin_lock_irqsave(&ppd->lflags_lock, flags);
175 if (ppd->state_wanted) {
176 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
177 ret = -EBUSY;
178 goto bail;
180 ppd->state_wanted = state;
181 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
182 wait_event_interruptible_timeout(ppd->state_wait,
183 (ppd->lflags & state),
184 msecs_to_jiffies(msecs));
185 spin_lock_irqsave(&ppd->lflags_lock, flags);
186 ppd->state_wanted = 0;
187 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
189 if (!(ppd->lflags & state))
190 ret = -ETIMEDOUT;
191 else
192 ret = 0;
193 bail:
194 return ret;
197 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
199 u32 lstate;
200 int ret;
201 struct qib_devdata *dd = ppd->dd;
202 unsigned long flags;
204 switch (newstate) {
205 case QIB_IB_LINKDOWN_ONLY:
206 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
207 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
208 /* don't wait */
209 ret = 0;
210 goto bail;
212 case QIB_IB_LINKDOWN:
213 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
214 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
215 /* don't wait */
216 ret = 0;
217 goto bail;
219 case QIB_IB_LINKDOWN_SLEEP:
220 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
221 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
222 /* don't wait */
223 ret = 0;
224 goto bail;
226 case QIB_IB_LINKDOWN_DISABLE:
227 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
228 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
229 /* don't wait */
230 ret = 0;
231 goto bail;
233 case QIB_IB_LINKARM:
234 if (ppd->lflags & QIBL_LINKARMED) {
235 ret = 0;
236 goto bail;
238 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
239 ret = -EINVAL;
240 goto bail;
243 * Since the port can be ACTIVE when we ask for ARMED,
244 * clear QIBL_LINKV so we can wait for a transition.
245 * If the link isn't ARMED, then something else happened
246 * and there is no point waiting for ARMED.
248 spin_lock_irqsave(&ppd->lflags_lock, flags);
249 ppd->lflags &= ~QIBL_LINKV;
250 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
251 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
252 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
253 lstate = QIBL_LINKV;
254 break;
256 case QIB_IB_LINKACTIVE:
257 if (ppd->lflags & QIBL_LINKACTIVE) {
258 ret = 0;
259 goto bail;
261 if (!(ppd->lflags & QIBL_LINKARMED)) {
262 ret = -EINVAL;
263 goto bail;
265 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
266 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
267 lstate = QIBL_LINKACTIVE;
268 break;
270 default:
271 ret = -EINVAL;
272 goto bail;
274 ret = qib_wait_linkstate(ppd, lstate, 10);
276 bail:
277 return ret;
281 * Get address of eager buffer from it's index (allocated in chunks, not
282 * contiguous).
284 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
286 const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift;
287 const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1);
289 return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift);
293 * Returns 1 if error was a CRC, else 0.
294 * Needed for some chip's synthesized error counters.
296 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
297 u32 ctxt, u32 eflags, u32 l, u32 etail,
298 __le32 *rhf_addr, struct qib_message_header *rhdr)
300 u32 ret = 0;
302 if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
303 ret = 1;
304 else if (eflags == QLOGIC_IB_RHF_H_TIDERR) {
305 /* For TIDERR and RC QPs premptively schedule a NAK */
306 struct qib_ib_header *hdr = (struct qib_ib_header *) rhdr;
307 struct qib_other_headers *ohdr = NULL;
308 struct qib_ibport *ibp = &ppd->ibport_data;
309 struct qib_qp *qp = NULL;
310 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr);
311 u16 lid = be16_to_cpu(hdr->lrh[1]);
312 int lnh = be16_to_cpu(hdr->lrh[0]) & 3;
313 u32 qp_num;
314 u32 opcode;
315 u32 psn;
316 int diff;
318 /* Sanity check packet */
319 if (tlen < 24)
320 goto drop;
322 if (lid < QIB_MULTICAST_LID_BASE) {
323 lid &= ~((1 << ppd->lmc) - 1);
324 if (unlikely(lid != ppd->lid))
325 goto drop;
328 /* Check for GRH */
329 if (lnh == QIB_LRH_BTH)
330 ohdr = &hdr->u.oth;
331 else if (lnh == QIB_LRH_GRH) {
332 u32 vtf;
334 ohdr = &hdr->u.l.oth;
335 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
336 goto drop;
337 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
338 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
339 goto drop;
340 } else
341 goto drop;
343 /* Get opcode and PSN from packet */
344 opcode = be32_to_cpu(ohdr->bth[0]);
345 opcode >>= 24;
346 psn = be32_to_cpu(ohdr->bth[2]);
348 /* Get the destination QP number. */
349 qp_num = be32_to_cpu(ohdr->bth[1]) & QIB_QPN_MASK;
350 if (qp_num != QIB_MULTICAST_QPN) {
351 int ruc_res;
352 qp = qib_lookup_qpn(ibp, qp_num);
353 if (!qp)
354 goto drop;
357 * Handle only RC QPs - for other QP types drop error
358 * packet.
360 spin_lock(&qp->r_lock);
362 /* Check for valid receive state. */
363 if (!(ib_qib_state_ops[qp->state] &
364 QIB_PROCESS_RECV_OK)) {
365 ibp->n_pkt_drops++;
366 goto unlock;
369 switch (qp->ibqp.qp_type) {
370 case IB_QPT_RC:
371 ruc_res =
372 qib_ruc_check_hdr(
373 ibp, hdr,
374 lnh == QIB_LRH_GRH,
376 be32_to_cpu(ohdr->bth[0]));
377 if (ruc_res)
378 goto unlock;
380 /* Only deal with RDMA Writes for now */
381 if (opcode <
382 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
383 diff = qib_cmp24(psn, qp->r_psn);
384 if (!qp->r_nak_state && diff >= 0) {
385 ibp->n_rc_seqnak++;
386 qp->r_nak_state =
387 IB_NAK_PSN_ERROR;
388 /* Use the expected PSN. */
389 qp->r_ack_psn = qp->r_psn;
391 * Wait to send the sequence
392 * NAK until all packets
393 * in the receive queue have
394 * been processed.
395 * Otherwise, we end up
396 * propagating congestion.
398 if (list_empty(&qp->rspwait)) {
399 qp->r_flags |=
400 QIB_R_RSP_NAK;
401 atomic_inc(
402 &qp->refcount);
403 list_add_tail(
404 &qp->rspwait,
405 &rcd->qp_wait_list);
407 } /* Out of sequence NAK */
408 } /* QP Request NAKs */
409 break;
410 case IB_QPT_SMI:
411 case IB_QPT_GSI:
412 case IB_QPT_UD:
413 case IB_QPT_UC:
414 default:
415 /* For now don't handle any other QP types */
416 break;
419 unlock:
420 spin_unlock(&qp->r_lock);
422 * Notify qib_destroy_qp() if it is waiting
423 * for us to finish.
425 if (atomic_dec_and_test(&qp->refcount))
426 wake_up(&qp->wait);
427 } /* Unicast QP */
428 } /* Valid packet with TIDErr */
430 drop:
431 return ret;
435 * qib_kreceive - receive a packet
436 * @rcd: the qlogic_ib context
437 * @llic: gets count of good packets needed to clear lli,
438 * (used with chips that need need to track crcs for lli)
440 * called from interrupt handler for errors or receive interrupt
441 * Returns number of CRC error packets, needed by some chips for
442 * local link integrity tracking. crcs are adjusted down by following
443 * good packets, if any, and count of good packets is also tracked.
445 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
447 struct qib_devdata *dd = rcd->dd;
448 struct qib_pportdata *ppd = rcd->ppd;
449 __le32 *rhf_addr;
450 void *ebuf;
451 const u32 rsize = dd->rcvhdrentsize; /* words */
452 const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */
453 u32 etail = -1, l, hdrqtail;
454 struct qib_message_header *hdr;
455 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
456 int last;
457 u64 lval;
458 struct qib_qp *qp, *nqp;
460 l = rcd->head;
461 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
462 if (dd->flags & QIB_NODMA_RTAIL) {
463 u32 seq = qib_hdrget_seq(rhf_addr);
464 if (seq != rcd->seq_cnt)
465 goto bail;
466 hdrqtail = 0;
467 } else {
468 hdrqtail = qib_get_rcvhdrtail(rcd);
469 if (l == hdrqtail)
470 goto bail;
471 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
474 for (last = 0, i = 1; !last; i += !last) {
475 hdr = dd->f_get_msgheader(dd, rhf_addr);
476 eflags = qib_hdrget_err_flags(rhf_addr);
477 etype = qib_hdrget_rcv_type(rhf_addr);
478 /* total length */
479 tlen = qib_hdrget_length_in_bytes(rhf_addr);
480 ebuf = NULL;
481 if ((dd->flags & QIB_NODMA_RTAIL) ?
482 qib_hdrget_use_egr_buf(rhf_addr) :
483 (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
484 etail = qib_hdrget_index(rhf_addr);
485 updegr = 1;
486 if (tlen > sizeof(*hdr) ||
487 etype >= RCVHQ_RCV_TYPE_NON_KD) {
488 ebuf = qib_get_egrbuf(rcd, etail);
489 prefetch_range(ebuf, tlen - sizeof(*hdr));
492 if (!eflags) {
493 u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
495 if (lrh_len != tlen) {
496 qib_stats.sps_lenerrs++;
497 goto move_along;
500 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
501 ebuf == NULL &&
502 tlen > (dd->rcvhdrentsize - 2 + 1 -
503 qib_hdrget_offset(rhf_addr)) << 2) {
504 goto move_along;
508 * Both tiderr and qibhdrerr are set for all plain IB
509 * packets; only qibhdrerr should be set.
511 if (unlikely(eflags))
512 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l,
513 etail, rhf_addr, hdr);
514 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
515 qib_ib_rcv(rcd, hdr, ebuf, tlen);
516 if (crcs)
517 crcs--;
518 else if (llic && *llic)
519 --*llic;
521 move_along:
522 l += rsize;
523 if (l >= maxcnt)
524 l = 0;
525 if (i == QIB_MAX_PKT_RECV)
526 last = 1;
528 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
529 if (dd->flags & QIB_NODMA_RTAIL) {
530 u32 seq = qib_hdrget_seq(rhf_addr);
532 if (++rcd->seq_cnt > 13)
533 rcd->seq_cnt = 1;
534 if (seq != rcd->seq_cnt)
535 last = 1;
536 } else if (l == hdrqtail)
537 last = 1;
539 * Update head regs etc., every 16 packets, if not last pkt,
540 * to help prevent rcvhdrq overflows, when many packets
541 * are processed and queue is nearly full.
542 * Don't request an interrupt for intermediate updates.
544 lval = l;
545 if (!last && !(i & 0xf)) {
546 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
547 updegr = 0;
551 * Notify qib_destroy_qp() if it is waiting
552 * for lookaside_qp to finish.
554 if (rcd->lookaside_qp) {
555 if (atomic_dec_and_test(&rcd->lookaside_qp->refcount))
556 wake_up(&rcd->lookaside_qp->wait);
557 rcd->lookaside_qp = NULL;
560 rcd->head = l;
563 * Iterate over all QPs waiting to respond.
564 * The list won't change since the IRQ is only run on one CPU.
566 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
567 list_del_init(&qp->rspwait);
568 if (qp->r_flags & QIB_R_RSP_NAK) {
569 qp->r_flags &= ~QIB_R_RSP_NAK;
570 qib_send_rc_ack(qp);
572 if (qp->r_flags & QIB_R_RSP_SEND) {
573 unsigned long flags;
575 qp->r_flags &= ~QIB_R_RSP_SEND;
576 spin_lock_irqsave(&qp->s_lock, flags);
577 if (ib_qib_state_ops[qp->state] &
578 QIB_PROCESS_OR_FLUSH_SEND)
579 qib_schedule_send(qp);
580 spin_unlock_irqrestore(&qp->s_lock, flags);
582 if (atomic_dec_and_test(&qp->refcount))
583 wake_up(&qp->wait);
586 bail:
587 /* Report number of packets consumed */
588 if (npkts)
589 *npkts = i;
592 * Always write head at end, and setup rcv interrupt, even
593 * if no packets were processed.
595 lval = (u64)rcd->head | dd->rhdrhead_intr_off;
596 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
597 return crcs;
601 * qib_set_mtu - set the MTU
602 * @ppd: the perport data
603 * @arg: the new MTU
605 * We can handle "any" incoming size, the issue here is whether we
606 * need to restrict our outgoing size. For now, we don't do any
607 * sanity checking on this, and we don't deal with what happens to
608 * programs that are already running when the size changes.
609 * NOTE: changing the MTU will usually cause the IBC to go back to
610 * link INIT state...
612 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
614 u32 piosize;
615 int ret, chk;
617 if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
618 arg != 4096) {
619 ret = -EINVAL;
620 goto bail;
622 chk = ib_mtu_enum_to_int(qib_ibmtu);
623 if (chk > 0 && arg > chk) {
624 ret = -EINVAL;
625 goto bail;
628 piosize = ppd->ibmaxlen;
629 ppd->ibmtu = arg;
631 if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
632 /* Only if it's not the initial value (or reset to it) */
633 if (piosize != ppd->init_ibmaxlen) {
634 if (arg > piosize && arg <= ppd->init_ibmaxlen)
635 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
636 ppd->ibmaxlen = piosize;
638 } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
639 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
640 ppd->ibmaxlen = piosize;
643 ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
645 ret = 0;
647 bail:
648 return ret;
651 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
653 struct qib_devdata *dd = ppd->dd;
654 ppd->lid = lid;
655 ppd->lmc = lmc;
657 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
658 lid | (~((1U << lmc) - 1)) << 16);
660 qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
661 dd->unit, ppd->port, lid);
663 return 0;
667 * Following deal with the "obviously simple" task of overriding the state
668 * of the LEDS, which normally indicate link physical and logical status.
669 * The complications arise in dealing with different hardware mappings
670 * and the board-dependent routine being called from interrupts.
671 * and then there's the requirement to _flash_ them.
673 #define LED_OVER_FREQ_SHIFT 8
674 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
675 /* Below is "non-zero" to force override, but both actual LEDs are off */
676 #define LED_OVER_BOTH_OFF (8)
678 static void qib_run_led_override(unsigned long opaque)
680 struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
681 struct qib_devdata *dd = ppd->dd;
682 int timeoff;
683 int ph_idx;
685 if (!(dd->flags & QIB_INITTED))
686 return;
688 ph_idx = ppd->led_override_phase++ & 1;
689 ppd->led_override = ppd->led_override_vals[ph_idx];
690 timeoff = ppd->led_override_timeoff;
692 dd->f_setextled(ppd, 1);
694 * don't re-fire the timer if user asked for it to be off; we let
695 * it fire one more time after they turn it off to simplify
697 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
698 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
701 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
703 struct qib_devdata *dd = ppd->dd;
704 int timeoff, freq;
706 if (!(dd->flags & QIB_INITTED))
707 return;
709 /* First check if we are blinking. If not, use 1HZ polling */
710 timeoff = HZ;
711 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
713 if (freq) {
714 /* For blink, set each phase from one nybble of val */
715 ppd->led_override_vals[0] = val & 0xF;
716 ppd->led_override_vals[1] = (val >> 4) & 0xF;
717 timeoff = (HZ << 4)/freq;
718 } else {
719 /* Non-blink set both phases the same. */
720 ppd->led_override_vals[0] = val & 0xF;
721 ppd->led_override_vals[1] = val & 0xF;
723 ppd->led_override_timeoff = timeoff;
726 * If the timer has not already been started, do so. Use a "quick"
727 * timeout so the function will be called soon, to look at our request.
729 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
730 /* Need to start timer */
731 init_timer(&ppd->led_override_timer);
732 ppd->led_override_timer.function = qib_run_led_override;
733 ppd->led_override_timer.data = (unsigned long) ppd;
734 ppd->led_override_timer.expires = jiffies + 1;
735 add_timer(&ppd->led_override_timer);
736 } else {
737 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
738 mod_timer(&ppd->led_override_timer, jiffies + 1);
739 atomic_dec(&ppd->led_override_timer_active);
744 * qib_reset_device - reset the chip if possible
745 * @unit: the device to reset
747 * Whether or not reset is successful, we attempt to re-initialize the chip
748 * (that is, much like a driver unload/reload). We clear the INITTED flag
749 * so that the various entry points will fail until we reinitialize. For
750 * now, we only allow this if no user contexts are open that use chip resources
752 int qib_reset_device(int unit)
754 int ret, i;
755 struct qib_devdata *dd = qib_lookup(unit);
756 struct qib_pportdata *ppd;
757 unsigned long flags;
758 int pidx;
760 if (!dd) {
761 ret = -ENODEV;
762 goto bail;
765 qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
767 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
768 qib_devinfo(dd->pcidev,
769 "Invalid unit number %u or not initialized or not present\n",
770 unit);
771 ret = -ENXIO;
772 goto bail;
775 spin_lock_irqsave(&dd->uctxt_lock, flags);
776 if (dd->rcd)
777 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
778 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
779 continue;
780 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
781 ret = -EBUSY;
782 goto bail;
784 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
786 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
787 ppd = dd->pport + pidx;
788 if (atomic_read(&ppd->led_override_timer_active)) {
789 /* Need to stop LED timer, _then_ shut off LEDs */
790 del_timer_sync(&ppd->led_override_timer);
791 atomic_set(&ppd->led_override_timer_active, 0);
794 /* Shut off LEDs after we are sure timer is not running */
795 ppd->led_override = LED_OVER_BOTH_OFF;
796 dd->f_setextled(ppd, 0);
797 if (dd->flags & QIB_HAS_SEND_DMA)
798 qib_teardown_sdma(ppd);
801 ret = dd->f_reset(dd);
802 if (ret == 1)
803 ret = qib_init(dd, 1);
804 else
805 ret = -EAGAIN;
806 if (ret)
807 qib_dev_err(dd,
808 "Reinitialize unit %u after reset failed with %d\n",
809 unit, ret);
810 else
811 qib_devinfo(dd->pcidev,
812 "Reinitialized unit %u after resetting\n",
813 unit);
815 bail:
816 return ret;