Linux 3.11-rc3
[cris-mirror.git] / drivers / mfd / mcp-sa11x0.c
blob13198d937e3657ae63717c30ffe602519a92f2c5
1 /*
2 * linux/drivers/mfd/mcp-sa11x0.c
4 * Copyright (C) 2001-2005 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License.
10 * SA11x0 MCP (Multimedia Communications Port) driver.
12 * MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/io.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
19 #include <linux/delay.h>
20 #include <linux/spinlock.h>
21 #include <linux/platform_device.h>
22 #include <linux/pm.h>
23 #include <linux/mfd/mcp.h>
25 #include <mach/hardware.h>
26 #include <asm/mach-types.h>
27 #include <linux/platform_data/mfd-mcp-sa11x0.h>
29 #define DRIVER_NAME "sa11x0-mcp"
31 struct mcp_sa11x0 {
32 void __iomem *base0;
33 void __iomem *base1;
34 u32 mccr0;
35 u32 mccr1;
38 /* Register offsets */
39 #define MCCR0(m) ((m)->base0 + 0x00)
40 #define MCDR0(m) ((m)->base0 + 0x08)
41 #define MCDR1(m) ((m)->base0 + 0x0c)
42 #define MCDR2(m) ((m)->base0 + 0x10)
43 #define MCSR(m) ((m)->base0 + 0x18)
44 #define MCCR1(m) ((m)->base1 + 0x00)
46 #define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp))
48 static void
49 mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
51 struct mcp_sa11x0 *m = priv(mcp);
53 divisor /= 32;
55 m->mccr0 &= ~0x00007f00;
56 m->mccr0 |= divisor << 8;
57 writel_relaxed(m->mccr0, MCCR0(m));
60 static void
61 mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
63 struct mcp_sa11x0 *m = priv(mcp);
65 divisor /= 32;
67 m->mccr0 &= ~0x0000007f;
68 m->mccr0 |= divisor;
69 writel_relaxed(m->mccr0, MCCR0(m));
73 * Write data to the device. The bit should be set after 3 subframe
74 * times (each frame is 64 clocks). We wait a maximum of 6 subframes.
75 * We really should try doing something more productive while we
76 * wait.
78 static void
79 mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
81 struct mcp_sa11x0 *m = priv(mcp);
82 int ret = -ETIME;
83 int i;
85 writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m));
87 for (i = 0; i < 2; i++) {
88 udelay(mcp->rw_timeout);
89 if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
90 ret = 0;
91 break;
95 if (ret < 0)
96 printk(KERN_WARNING "mcp: write timed out\n");
100 * Read data from the device. The bit should be set after 3 subframe
101 * times (each frame is 64 clocks). We wait a maximum of 6 subframes.
102 * We really should try doing something more productive while we
103 * wait.
105 static unsigned int
106 mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
108 struct mcp_sa11x0 *m = priv(mcp);
109 int ret = -ETIME;
110 int i;
112 writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m));
114 for (i = 0; i < 2; i++) {
115 udelay(mcp->rw_timeout);
116 if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
117 ret = readl_relaxed(MCDR2(m)) & 0xffff;
118 break;
122 if (ret < 0)
123 printk(KERN_WARNING "mcp: read timed out\n");
125 return ret;
128 static void mcp_sa11x0_enable(struct mcp *mcp)
130 struct mcp_sa11x0 *m = priv(mcp);
132 writel(-1, MCSR(m));
133 m->mccr0 |= MCCR0_MCE;
134 writel_relaxed(m->mccr0, MCCR0(m));
137 static void mcp_sa11x0_disable(struct mcp *mcp)
139 struct mcp_sa11x0 *m = priv(mcp);
141 m->mccr0 &= ~MCCR0_MCE;
142 writel_relaxed(m->mccr0, MCCR0(m));
146 * Our methods.
148 static struct mcp_ops mcp_sa11x0 = {
149 .set_telecom_divisor = mcp_sa11x0_set_telecom_divisor,
150 .set_audio_divisor = mcp_sa11x0_set_audio_divisor,
151 .reg_write = mcp_sa11x0_write,
152 .reg_read = mcp_sa11x0_read,
153 .enable = mcp_sa11x0_enable,
154 .disable = mcp_sa11x0_disable,
157 static int mcp_sa11x0_probe(struct platform_device *dev)
159 struct mcp_plat_data *data = dev->dev.platform_data;
160 struct resource *mem0, *mem1;
161 struct mcp_sa11x0 *m;
162 struct mcp *mcp;
163 int ret;
165 if (!data)
166 return -ENODEV;
168 mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
169 mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
170 if (!mem0 || !mem1)
171 return -ENXIO;
173 if (!request_mem_region(mem0->start, resource_size(mem0),
174 DRIVER_NAME)) {
175 ret = -EBUSY;
176 goto err_mem0;
179 if (!request_mem_region(mem1->start, resource_size(mem1),
180 DRIVER_NAME)) {
181 ret = -EBUSY;
182 goto err_mem1;
185 mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
186 if (!mcp) {
187 ret = -ENOMEM;
188 goto err_alloc;
191 mcp->owner = THIS_MODULE;
192 mcp->ops = &mcp_sa11x0;
193 mcp->sclk_rate = data->sclk_rate;
195 m = priv(mcp);
196 m->mccr0 = data->mccr0 | 0x7f7f;
197 m->mccr1 = data->mccr1;
199 m->base0 = ioremap(mem0->start, resource_size(mem0));
200 m->base1 = ioremap(mem1->start, resource_size(mem1));
201 if (!m->base0 || !m->base1) {
202 ret = -ENOMEM;
203 goto err_ioremap;
206 platform_set_drvdata(dev, mcp);
209 * Initialise device. Note that we initially
210 * set the sampling rate to minimum.
212 writel_relaxed(-1, MCSR(m));
213 writel_relaxed(m->mccr1, MCCR1(m));
214 writel_relaxed(m->mccr0, MCCR0(m));
217 * Calculate the read/write timeout (us) from the bit clock
218 * rate. This is the period for 3 64-bit frames. Always
219 * round this time up.
221 mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
222 mcp->sclk_rate;
224 ret = mcp_host_add(mcp, data->codec_pdata);
225 if (ret == 0)
226 return 0;
228 err_ioremap:
229 iounmap(m->base1);
230 iounmap(m->base0);
231 mcp_host_free(mcp);
232 err_alloc:
233 release_mem_region(mem1->start, resource_size(mem1));
234 err_mem1:
235 release_mem_region(mem0->start, resource_size(mem0));
236 err_mem0:
237 return ret;
240 static int mcp_sa11x0_remove(struct platform_device *dev)
242 struct mcp *mcp = platform_get_drvdata(dev);
243 struct mcp_sa11x0 *m = priv(mcp);
244 struct resource *mem0, *mem1;
246 if (m->mccr0 & MCCR0_MCE)
247 dev_warn(&dev->dev,
248 "device left active (missing disable call?)\n");
250 mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
251 mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
253 mcp_host_del(mcp);
254 iounmap(m->base1);
255 iounmap(m->base0);
256 mcp_host_free(mcp);
257 release_mem_region(mem1->start, resource_size(mem1));
258 release_mem_region(mem0->start, resource_size(mem0));
260 return 0;
263 #ifdef CONFIG_PM_SLEEP
264 static int mcp_sa11x0_suspend(struct device *dev)
266 struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
268 if (m->mccr0 & MCCR0_MCE)
269 dev_warn(dev, "device left active (missing disable call?)\n");
271 writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));
273 return 0;
276 static int mcp_sa11x0_resume(struct device *dev)
278 struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
280 writel_relaxed(m->mccr1, MCCR1(m));
281 writel_relaxed(m->mccr0, MCCR0(m));
283 return 0;
285 #endif
287 static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
288 #ifdef CONFIG_PM_SLEEP
289 .suspend = mcp_sa11x0_suspend,
290 .freeze = mcp_sa11x0_suspend,
291 .poweroff = mcp_sa11x0_suspend,
292 .resume_noirq = mcp_sa11x0_resume,
293 .thaw_noirq = mcp_sa11x0_resume,
294 .restore_noirq = mcp_sa11x0_resume,
295 #endif
298 static struct platform_driver mcp_sa11x0_driver = {
299 .probe = mcp_sa11x0_probe,
300 .remove = mcp_sa11x0_remove,
301 .driver = {
302 .name = DRIVER_NAME,
303 .owner = THIS_MODULE,
304 .pm = &mcp_sa11x0_pm_ops,
309 * This needs re-working
311 module_platform_driver(mcp_sa11x0_driver);
313 MODULE_ALIAS("platform:" DRIVER_NAME);
314 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
315 MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
316 MODULE_LICENSE("GPL");