Linux 3.11-rc3
[cris-mirror.git] / drivers / net / ethernet / cisco / enic / vnic_dev.c
blob97455c573db540a1963e91a30fda2d69268fe351
1 /*
2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
20 #include <linux/kernel.h>
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/delay.h>
25 #include <linux/if_ether.h>
27 #include "vnic_resource.h"
28 #include "vnic_devcmd.h"
29 #include "vnic_dev.h"
30 #include "vnic_stats.h"
32 enum vnic_proxy_type {
33 PROXY_NONE,
34 PROXY_BY_BDF,
35 PROXY_BY_INDEX,
38 struct vnic_res {
39 void __iomem *vaddr;
40 dma_addr_t bus_addr;
41 unsigned int count;
44 struct vnic_intr_coal_timer_info {
45 u32 mul;
46 u32 div;
47 u32 max_usec;
50 struct vnic_dev {
51 void *priv;
52 struct pci_dev *pdev;
53 struct vnic_res res[RES_TYPE_MAX];
54 enum vnic_dev_intr_mode intr_mode;
55 struct vnic_devcmd __iomem *devcmd;
56 struct vnic_devcmd_notify *notify;
57 struct vnic_devcmd_notify notify_copy;
58 dma_addr_t notify_pa;
59 u32 notify_sz;
60 dma_addr_t linkstatus_pa;
61 struct vnic_stats *stats;
62 dma_addr_t stats_pa;
63 struct vnic_devcmd_fw_info *fw_info;
64 dma_addr_t fw_info_pa;
65 enum vnic_proxy_type proxy;
66 u32 proxy_index;
67 u64 args[VNIC_DEVCMD_NARGS];
68 struct vnic_intr_coal_timer_info intr_coal_timer_info;
71 #define VNIC_MAX_RES_HDR_SIZE \
72 (sizeof(struct vnic_resource_header) + \
73 sizeof(struct vnic_resource) * RES_TYPE_MAX)
74 #define VNIC_RES_STRIDE 128
76 void *vnic_dev_priv(struct vnic_dev *vdev)
78 return vdev->priv;
81 static int vnic_dev_discover_res(struct vnic_dev *vdev,
82 struct vnic_dev_bar *bar, unsigned int num_bars)
84 struct vnic_resource_header __iomem *rh;
85 struct mgmt_barmap_hdr __iomem *mrh;
86 struct vnic_resource __iomem *r;
87 u8 type;
89 if (num_bars == 0)
90 return -EINVAL;
92 if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
93 pr_err("vNIC BAR0 res hdr length error\n");
94 return -EINVAL;
97 rh = bar->vaddr;
98 mrh = bar->vaddr;
99 if (!rh) {
100 pr_err("vNIC BAR0 res hdr not mem-mapped\n");
101 return -EINVAL;
104 /* Check for mgmt vnic in addition to normal vnic */
105 if ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||
106 (ioread32(&rh->version) != VNIC_RES_VERSION)) {
107 if ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||
108 (ioread32(&mrh->version) != MGMTVNIC_VERSION)) {
109 pr_err("vNIC BAR0 res magic/version error "
110 "exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\n",
111 VNIC_RES_MAGIC, VNIC_RES_VERSION,
112 MGMTVNIC_MAGIC, MGMTVNIC_VERSION,
113 ioread32(&rh->magic), ioread32(&rh->version));
114 return -EINVAL;
118 if (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)
119 r = (struct vnic_resource __iomem *)(mrh + 1);
120 else
121 r = (struct vnic_resource __iomem *)(rh + 1);
124 while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
126 u8 bar_num = ioread8(&r->bar);
127 u32 bar_offset = ioread32(&r->bar_offset);
128 u32 count = ioread32(&r->count);
129 u32 len;
131 r++;
133 if (bar_num >= num_bars)
134 continue;
136 if (!bar[bar_num].len || !bar[bar_num].vaddr)
137 continue;
139 switch (type) {
140 case RES_TYPE_WQ:
141 case RES_TYPE_RQ:
142 case RES_TYPE_CQ:
143 case RES_TYPE_INTR_CTRL:
144 /* each count is stride bytes long */
145 len = count * VNIC_RES_STRIDE;
146 if (len + bar_offset > bar[bar_num].len) {
147 pr_err("vNIC BAR0 resource %d "
148 "out-of-bounds, offset 0x%x + "
149 "size 0x%x > bar len 0x%lx\n",
150 type, bar_offset,
151 len,
152 bar[bar_num].len);
153 return -EINVAL;
155 break;
156 case RES_TYPE_INTR_PBA_LEGACY:
157 case RES_TYPE_DEVCMD:
158 len = count;
159 break;
160 default:
161 continue;
164 vdev->res[type].count = count;
165 vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
166 bar_offset;
167 vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
170 return 0;
173 unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
174 enum vnic_res_type type)
176 return vdev->res[type].count;
179 void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
180 unsigned int index)
182 if (!vdev->res[type].vaddr)
183 return NULL;
185 switch (type) {
186 case RES_TYPE_WQ:
187 case RES_TYPE_RQ:
188 case RES_TYPE_CQ:
189 case RES_TYPE_INTR_CTRL:
190 return (char __iomem *)vdev->res[type].vaddr +
191 index * VNIC_RES_STRIDE;
192 default:
193 return (char __iomem *)vdev->res[type].vaddr;
197 static unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
198 unsigned int desc_count, unsigned int desc_size)
200 /* The base address of the desc rings must be 512 byte aligned.
201 * Descriptor count is aligned to groups of 32 descriptors. A
202 * count of 0 means the maximum 4096 descriptors. Descriptor
203 * size is aligned to 16 bytes.
206 unsigned int count_align = 32;
207 unsigned int desc_align = 16;
209 ring->base_align = 512;
211 if (desc_count == 0)
212 desc_count = 4096;
214 ring->desc_count = ALIGN(desc_count, count_align);
216 ring->desc_size = ALIGN(desc_size, desc_align);
218 ring->size = ring->desc_count * ring->desc_size;
219 ring->size_unaligned = ring->size + ring->base_align;
221 return ring->size_unaligned;
224 void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
226 memset(ring->descs, 0, ring->size);
229 int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
230 unsigned int desc_count, unsigned int desc_size)
232 vnic_dev_desc_ring_size(ring, desc_count, desc_size);
234 ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
235 ring->size_unaligned,
236 &ring->base_addr_unaligned);
238 if (!ring->descs_unaligned) {
239 pr_err("Failed to allocate ring (size=%d), aborting\n",
240 (int)ring->size);
241 return -ENOMEM;
244 ring->base_addr = ALIGN(ring->base_addr_unaligned,
245 ring->base_align);
246 ring->descs = (u8 *)ring->descs_unaligned +
247 (ring->base_addr - ring->base_addr_unaligned);
249 vnic_dev_clear_desc_ring(ring);
251 ring->desc_avail = ring->desc_count - 1;
253 return 0;
256 void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
258 if (ring->descs) {
259 pci_free_consistent(vdev->pdev,
260 ring->size_unaligned,
261 ring->descs_unaligned,
262 ring->base_addr_unaligned);
263 ring->descs = NULL;
267 static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
268 int wait)
270 struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
271 unsigned int i;
272 int delay;
273 u32 status;
274 int err;
276 status = ioread32(&devcmd->status);
277 if (status == 0xFFFFFFFF) {
278 /* PCI-e target device is gone */
279 return -ENODEV;
281 if (status & STAT_BUSY) {
282 pr_err("Busy devcmd %d\n", _CMD_N(cmd));
283 return -EBUSY;
286 if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
287 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
288 writeq(vdev->args[i], &devcmd->args[i]);
289 wmb();
292 iowrite32(cmd, &devcmd->cmd);
294 if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
295 return 0;
297 for (delay = 0; delay < wait; delay++) {
299 udelay(100);
301 status = ioread32(&devcmd->status);
302 if (status == 0xFFFFFFFF) {
303 /* PCI-e target device is gone */
304 return -ENODEV;
307 if (!(status & STAT_BUSY)) {
309 if (status & STAT_ERROR) {
310 err = (int)readq(&devcmd->args[0]);
311 if (err == ERR_EINVAL &&
312 cmd == CMD_CAPABILITY)
313 return err;
314 if (err != ERR_ECMDUNKNOWN ||
315 cmd != CMD_CAPABILITY)
316 pr_err("Error %d devcmd %d\n",
317 err, _CMD_N(cmd));
318 return err;
321 if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
322 rmb();
323 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
324 vdev->args[i] = readq(&devcmd->args[i]);
327 return 0;
331 pr_err("Timedout devcmd %d\n", _CMD_N(cmd));
332 return -ETIMEDOUT;
335 static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,
336 enum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,
337 u64 *a0, u64 *a1, int wait)
339 u32 status;
340 int err;
342 memset(vdev->args, 0, sizeof(vdev->args));
344 vdev->args[0] = vdev->proxy_index;
345 vdev->args[1] = cmd;
346 vdev->args[2] = *a0;
347 vdev->args[3] = *a1;
349 err = _vnic_dev_cmd(vdev, proxy_cmd, wait);
350 if (err)
351 return err;
353 status = (u32)vdev->args[0];
354 if (status & STAT_ERROR) {
355 err = (int)vdev->args[1];
356 if (err != ERR_ECMDUNKNOWN ||
357 cmd != CMD_CAPABILITY)
358 pr_err("Error %d proxy devcmd %d\n", err, _CMD_N(cmd));
359 return err;
362 *a0 = vdev->args[1];
363 *a1 = vdev->args[2];
365 return 0;
368 static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
369 enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
371 int err;
373 vdev->args[0] = *a0;
374 vdev->args[1] = *a1;
376 err = _vnic_dev_cmd(vdev, cmd, wait);
378 *a0 = vdev->args[0];
379 *a1 = vdev->args[1];
381 return err;
384 void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)
386 vdev->proxy = PROXY_BY_INDEX;
387 vdev->proxy_index = index;
390 void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)
392 vdev->proxy = PROXY_NONE;
393 vdev->proxy_index = 0;
396 int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
397 u64 *a0, u64 *a1, int wait)
399 memset(vdev->args, 0, sizeof(vdev->args));
401 switch (vdev->proxy) {
402 case PROXY_BY_INDEX:
403 return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,
404 a0, a1, wait);
405 case PROXY_BY_BDF:
406 return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,
407 a0, a1, wait);
408 case PROXY_NONE:
409 default:
410 return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
414 static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
416 u64 a0 = (u32)cmd, a1 = 0;
417 int wait = 1000;
418 int err;
420 err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
422 return !(err || a0);
425 int vnic_dev_fw_info(struct vnic_dev *vdev,
426 struct vnic_devcmd_fw_info **fw_info)
428 u64 a0, a1 = 0;
429 int wait = 1000;
430 int err = 0;
432 if (!vdev->fw_info) {
433 vdev->fw_info = pci_alloc_consistent(vdev->pdev,
434 sizeof(struct vnic_devcmd_fw_info),
435 &vdev->fw_info_pa);
436 if (!vdev->fw_info)
437 return -ENOMEM;
439 memset(vdev->fw_info, 0, sizeof(struct vnic_devcmd_fw_info));
441 a0 = vdev->fw_info_pa;
442 a1 = sizeof(struct vnic_devcmd_fw_info);
444 /* only get fw_info once and cache it */
445 if (vnic_dev_capable(vdev, CMD_MCPU_FW_INFO))
446 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO,
447 &a0, &a1, wait);
448 else
449 err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO_OLD,
450 &a0, &a1, wait);
453 *fw_info = vdev->fw_info;
455 return err;
458 int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
459 void *value)
461 u64 a0, a1;
462 int wait = 1000;
463 int err;
465 a0 = offset;
466 a1 = size;
468 err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
470 switch (size) {
471 case 1: *(u8 *)value = (u8)a0; break;
472 case 2: *(u16 *)value = (u16)a0; break;
473 case 4: *(u32 *)value = (u32)a0; break;
474 case 8: *(u64 *)value = a0; break;
475 default: BUG(); break;
478 return err;
481 int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
483 u64 a0, a1;
484 int wait = 1000;
486 if (!vdev->stats) {
487 vdev->stats = pci_alloc_consistent(vdev->pdev,
488 sizeof(struct vnic_stats), &vdev->stats_pa);
489 if (!vdev->stats)
490 return -ENOMEM;
493 *stats = vdev->stats;
494 a0 = vdev->stats_pa;
495 a1 = sizeof(struct vnic_stats);
497 return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
500 int vnic_dev_close(struct vnic_dev *vdev)
502 u64 a0 = 0, a1 = 0;
503 int wait = 1000;
504 return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
507 int vnic_dev_enable_wait(struct vnic_dev *vdev)
509 u64 a0 = 0, a1 = 0;
510 int wait = 1000;
512 if (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))
513 return vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
514 else
515 return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
518 int vnic_dev_disable(struct vnic_dev *vdev)
520 u64 a0 = 0, a1 = 0;
521 int wait = 1000;
522 return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
525 int vnic_dev_open(struct vnic_dev *vdev, int arg)
527 u64 a0 = (u32)arg, a1 = 0;
528 int wait = 1000;
529 return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
532 int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
534 u64 a0 = 0, a1 = 0;
535 int wait = 1000;
536 int err;
538 *done = 0;
540 err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
541 if (err)
542 return err;
544 *done = (a0 == 0);
546 return 0;
549 static int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
551 u64 a0 = (u32)arg, a1 = 0;
552 int wait = 1000;
553 return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
556 static int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
558 u64 a0 = 0, a1 = 0;
559 int wait = 1000;
560 int err;
562 *done = 0;
564 err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
565 if (err)
566 return err;
568 *done = (a0 == 0);
570 return 0;
573 int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
575 u64 a0 = (u32)arg, a1 = 0;
576 int wait = 1000;
577 int err;
579 if (vnic_dev_capable(vdev, CMD_HANG_RESET)) {
580 return vnic_dev_cmd(vdev, CMD_HANG_RESET,
581 &a0, &a1, wait);
582 } else {
583 err = vnic_dev_soft_reset(vdev, arg);
584 if (err)
585 return err;
586 return vnic_dev_init(vdev, 0);
590 int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
592 u64 a0 = 0, a1 = 0;
593 int wait = 1000;
594 int err;
596 *done = 0;
598 if (vnic_dev_capable(vdev, CMD_HANG_RESET_STATUS)) {
599 err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS,
600 &a0, &a1, wait);
601 if (err)
602 return err;
603 } else {
604 return vnic_dev_soft_reset_done(vdev, done);
607 *done = (a0 == 0);
609 return 0;
612 int vnic_dev_hang_notify(struct vnic_dev *vdev)
614 u64 a0, a1;
615 int wait = 1000;
616 return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
619 int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
621 u64 a0, a1;
622 int wait = 1000;
623 int err, i;
625 for (i = 0; i < ETH_ALEN; i++)
626 mac_addr[i] = 0;
628 err = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
629 if (err)
630 return err;
632 for (i = 0; i < ETH_ALEN; i++)
633 mac_addr[i] = ((u8 *)&a0)[i];
635 return 0;
638 int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
639 int broadcast, int promisc, int allmulti)
641 u64 a0, a1 = 0;
642 int wait = 1000;
643 int err;
645 a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
646 (multicast ? CMD_PFILTER_MULTICAST : 0) |
647 (broadcast ? CMD_PFILTER_BROADCAST : 0) |
648 (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
649 (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
651 err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
652 if (err)
653 pr_err("Can't set packet filter\n");
655 return err;
658 int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
660 u64 a0 = 0, a1 = 0;
661 int wait = 1000;
662 int err;
663 int i;
665 for (i = 0; i < ETH_ALEN; i++)
666 ((u8 *)&a0)[i] = addr[i];
668 err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
669 if (err)
670 pr_err("Can't add addr [%pM], %d\n", addr, err);
672 return err;
675 int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
677 u64 a0 = 0, a1 = 0;
678 int wait = 1000;
679 int err;
680 int i;
682 for (i = 0; i < ETH_ALEN; i++)
683 ((u8 *)&a0)[i] = addr[i];
685 err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
686 if (err)
687 pr_err("Can't del addr [%pM], %d\n", addr, err);
689 return err;
692 int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
693 u8 ig_vlan_rewrite_mode)
695 u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
696 int wait = 1000;
698 if (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))
699 return vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,
700 &a0, &a1, wait);
701 else
702 return 0;
705 static int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
706 void *notify_addr, dma_addr_t notify_pa, u16 intr)
708 u64 a0, a1;
709 int wait = 1000;
710 int r;
712 memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
713 vdev->notify = notify_addr;
714 vdev->notify_pa = notify_pa;
716 a0 = (u64)notify_pa;
717 a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
718 a1 += sizeof(struct vnic_devcmd_notify);
720 r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
721 vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
722 return r;
725 int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
727 void *notify_addr;
728 dma_addr_t notify_pa;
730 if (vdev->notify || vdev->notify_pa) {
731 pr_err("notify block %p still allocated", vdev->notify);
732 return -EINVAL;
735 notify_addr = pci_alloc_consistent(vdev->pdev,
736 sizeof(struct vnic_devcmd_notify),
737 &notify_pa);
738 if (!notify_addr)
739 return -ENOMEM;
741 return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
744 static int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
746 u64 a0, a1;
747 int wait = 1000;
748 int err;
750 a0 = 0; /* paddr = 0 to unset notify buffer */
751 a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
752 a1 += sizeof(struct vnic_devcmd_notify);
754 err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
755 vdev->notify = NULL;
756 vdev->notify_pa = 0;
757 vdev->notify_sz = 0;
759 return err;
762 int vnic_dev_notify_unset(struct vnic_dev *vdev)
764 if (vdev->notify) {
765 pci_free_consistent(vdev->pdev,
766 sizeof(struct vnic_devcmd_notify),
767 vdev->notify,
768 vdev->notify_pa);
771 return vnic_dev_notify_unsetcmd(vdev);
774 static int vnic_dev_notify_ready(struct vnic_dev *vdev)
776 u32 *words;
777 unsigned int nwords = vdev->notify_sz / 4;
778 unsigned int i;
779 u32 csum;
781 if (!vdev->notify || !vdev->notify_sz)
782 return 0;
784 do {
785 csum = 0;
786 memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
787 words = (u32 *)&vdev->notify_copy;
788 for (i = 1; i < nwords; i++)
789 csum += words[i];
790 } while (csum != words[0]);
792 return 1;
795 int vnic_dev_init(struct vnic_dev *vdev, int arg)
797 u64 a0 = (u32)arg, a1 = 0;
798 int wait = 1000;
799 int r = 0;
801 if (vnic_dev_capable(vdev, CMD_INIT))
802 r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
803 else {
804 vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
805 if (a0 & CMD_INITF_DEFAULT_MAC) {
806 /* Emulate these for old CMD_INIT_v1 which
807 * didn't pass a0 so no CMD_INITF_*.
809 vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
810 vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
813 return r;
816 int vnic_dev_deinit(struct vnic_dev *vdev)
818 u64 a0 = 0, a1 = 0;
819 int wait = 1000;
821 return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
824 void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)
826 /* Default: hardware intr coal timer is in units of 1.5 usecs */
827 vdev->intr_coal_timer_info.mul = 2;
828 vdev->intr_coal_timer_info.div = 3;
829 vdev->intr_coal_timer_info.max_usec =
830 vnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);
833 int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev)
835 int wait = 1000;
836 int err;
838 memset(vdev->args, 0, sizeof(vdev->args));
840 if (vnic_dev_capable(vdev, CMD_INTR_COAL_CONVERT))
841 err = _vnic_dev_cmd(vdev, CMD_INTR_COAL_CONVERT, wait);
842 else
843 err = ERR_ECMDUNKNOWN;
845 /* Use defaults when firmware doesn't support the devcmd at all or
846 * supports it for only specific hardware
848 if ((err == ERR_ECMDUNKNOWN) ||
849 (!err && !(vdev->args[0] && vdev->args[1] && vdev->args[2]))) {
850 pr_warning("Using default conversion factor for "
851 "interrupt coalesce timer\n");
852 vnic_dev_intr_coal_timer_info_default(vdev);
853 return 0;
856 if (!err) {
857 vdev->intr_coal_timer_info.mul = (u32) vdev->args[0];
858 vdev->intr_coal_timer_info.div = (u32) vdev->args[1];
859 vdev->intr_coal_timer_info.max_usec = (u32) vdev->args[2];
862 return err;
865 int vnic_dev_link_status(struct vnic_dev *vdev)
867 if (!vnic_dev_notify_ready(vdev))
868 return 0;
870 return vdev->notify_copy.link_state;
873 u32 vnic_dev_port_speed(struct vnic_dev *vdev)
875 if (!vnic_dev_notify_ready(vdev))
876 return 0;
878 return vdev->notify_copy.port_speed;
881 u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
883 if (!vnic_dev_notify_ready(vdev))
884 return 0;
886 return vdev->notify_copy.msglvl;
889 u32 vnic_dev_mtu(struct vnic_dev *vdev)
891 if (!vnic_dev_notify_ready(vdev))
892 return 0;
894 return vdev->notify_copy.mtu;
897 void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
898 enum vnic_dev_intr_mode intr_mode)
900 vdev->intr_mode = intr_mode;
903 enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
904 struct vnic_dev *vdev)
906 return vdev->intr_mode;
909 u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
911 return (usec * vdev->intr_coal_timer_info.mul) /
912 vdev->intr_coal_timer_info.div;
915 u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
917 return (hw_cycles * vdev->intr_coal_timer_info.div) /
918 vdev->intr_coal_timer_info.mul;
921 u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
923 return vdev->intr_coal_timer_info.max_usec;
926 void vnic_dev_unregister(struct vnic_dev *vdev)
928 if (vdev) {
929 if (vdev->notify)
930 pci_free_consistent(vdev->pdev,
931 sizeof(struct vnic_devcmd_notify),
932 vdev->notify,
933 vdev->notify_pa);
934 if (vdev->stats)
935 pci_free_consistent(vdev->pdev,
936 sizeof(struct vnic_stats),
937 vdev->stats, vdev->stats_pa);
938 if (vdev->fw_info)
939 pci_free_consistent(vdev->pdev,
940 sizeof(struct vnic_devcmd_fw_info),
941 vdev->fw_info, vdev->fw_info_pa);
942 kfree(vdev);
946 struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
947 void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
948 unsigned int num_bars)
950 if (!vdev) {
951 vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
952 if (!vdev)
953 return NULL;
956 vdev->priv = priv;
957 vdev->pdev = pdev;
959 if (vnic_dev_discover_res(vdev, bar, num_bars))
960 goto err_out;
962 vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
963 if (!vdev->devcmd)
964 goto err_out;
966 return vdev;
968 err_out:
969 vnic_dev_unregister(vdev);
970 return NULL;
973 int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len)
975 u64 a0, a1 = len;
976 int wait = 1000;
977 dma_addr_t prov_pa;
978 void *prov_buf;
979 int ret;
981 prov_buf = pci_alloc_consistent(vdev->pdev, len, &prov_pa);
982 if (!prov_buf)
983 return -ENOMEM;
985 memcpy(prov_buf, buf, len);
987 a0 = prov_pa;
989 ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO2, &a0, &a1, wait);
991 pci_free_consistent(vdev->pdev, len, prov_buf, prov_pa);
993 return ret;
996 int vnic_dev_enable2(struct vnic_dev *vdev, int active)
998 u64 a0, a1 = 0;
999 int wait = 1000;
1001 a0 = (active ? CMD_ENABLE2_ACTIVE : 0);
1003 return vnic_dev_cmd(vdev, CMD_ENABLE2, &a0, &a1, wait);
1006 static int vnic_dev_cmd_status(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
1007 int *status)
1009 u64 a0 = cmd, a1 = 0;
1010 int wait = 1000;
1011 int ret;
1013 ret = vnic_dev_cmd(vdev, CMD_STATUS, &a0, &a1, wait);
1014 if (!ret)
1015 *status = (int)a0;
1017 return ret;
1020 int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status)
1022 return vnic_dev_cmd_status(vdev, CMD_ENABLE2, status);
1025 int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status)
1027 return vnic_dev_cmd_status(vdev, CMD_DEINIT, status);
1030 int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
1032 u64 a0, a1;
1033 int wait = 1000;
1034 int i;
1036 for (i = 0; i < ETH_ALEN; i++)
1037 ((u8 *)&a0)[i] = mac_addr[i];
1039 return vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);