drivers/net/ethernet/intel/e1000e/manage.c

   1 /*******************************************************************************
   2
   3   Intel PRO/1000 Linux driver
   4   Copyright(c) 1999 - 2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #include "e1000.h"
  30
  31 /**
  32  *  e1000_calculate_checksum - Calculate checksum for buffer
  33  *  @buffer: pointer to EEPROM
  34  *  @length: size of EEPROM to calculate a checksum for
  35  *
  36  *  Calculates the checksum for some buffer on a specified length.  The
  37  *  checksum calculated is returned.
  38  **/
  39 static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
  40 {
  41         u32 i;
  42         u8 sum = 0;
  43
  44         if (!buffer)
  45                 return 0;
  46
  47         for (i = 0; i < length; i++)
  48                 sum += buffer[i];
  49
  50         return (u8)(0 - sum);
  51 }
  52
  53 /**
  54  *  e1000_mng_enable_host_if - Checks host interface is enabled
  55  *  @hw: pointer to the HW structure
  56  *
  57  *  Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
  58  *
  59  *  This function checks whether the HOST IF is enabled for command operation
  60  *  and also checks whether the previous command is completed.  It busy waits
  61  *  in case of previous command is not completed.
  62  **/
  63 static s32 e1000_mng_enable_host_if(struct e1000_hw *hw)
  64 {
  65         u32 hicr;
  66         u8 i;
  67
  68         if (!hw->mac.arc_subsystem_valid) {
  69                 e_dbg("ARC subsystem not valid.\n");
  70                 return -E1000_ERR_HOST_INTERFACE_COMMAND;
  71         }
  72
  73         /* Check that the host interface is enabled. */
  74         hicr = er32(HICR);
  75         if (!(hicr & E1000_HICR_EN)) {
  76                 e_dbg("E1000_HOST_EN bit disabled.\n");
  77                 return -E1000_ERR_HOST_INTERFACE_COMMAND;
  78         }
  79         /* check the previous command is completed */
  80         for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
  81                 hicr = er32(HICR);
  82                 if (!(hicr & E1000_HICR_C))
  83                         break;
  84                 mdelay(1);
  85         }
  86
  87         if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
  88                 e_dbg("Previous command timeout failed .\n");
  89                 return -E1000_ERR_HOST_INTERFACE_COMMAND;
  90         }
  91
  92         return 0;
  93 }
  94
  95 /**
  96  *  e1000e_check_mng_mode_generic - Generic check management mode
  97  *  @hw: pointer to the HW structure
  98  *
  99  *  Reads the firmware semaphore register and returns true (>0) if
 100  *  manageability is enabled, else false (0).
 101  **/
 102 bool e1000e_check_mng_mode_generic(struct e1000_hw *hw)
 103 {
 104         u32 fwsm = er32(FWSM);
 105
 106         return (fwsm & E1000_FWSM_MODE_MASK) ==
 107             (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
 108 }
 109
 110 /**
 111  *  e1000e_enable_tx_pkt_filtering - Enable packet filtering on Tx
 112  *  @hw: pointer to the HW structure
 113  *
 114  *  Enables packet filtering on transmit packets if manageability is enabled
 115  *  and host interface is enabled.
 116  **/
 117 bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
 118 {
 119         struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
 120         u32 *buffer = (u32 *)&hw->mng_cookie;
 121         u32 offset;
 122         s32 ret_val, hdr_csum, csum;
 123         u8 i, len;
 124
 125         hw->mac.tx_pkt_filtering = true;
 126
 127         /* No manageability, no filtering */
 128         if (!hw->mac.ops.check_mng_mode(hw)) {
 129                 hw->mac.tx_pkt_filtering = false;
 130                 return hw->mac.tx_pkt_filtering;
 131         }
 132
 133         /* If we can't read from the host interface for whatever
 134          * reason, disable filtering.
 135          */
 136         ret_val = e1000_mng_enable_host_if(hw);
 137         if (ret_val) {
 138                 hw->mac.tx_pkt_filtering = false;
 139                 return hw->mac.tx_pkt_filtering;
 140         }
 141
 142         /* Read in the header.  Length and offset are in dwords. */
 143         len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
 144         offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
 145         for (i = 0; i < len; i++)
 146                 *(buffer + i) = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF,
 147                                                      offset + i);
 148         hdr_csum = hdr->checksum;
 149         hdr->checksum = 0;
 150         csum = e1000_calculate_checksum((u8 *)hdr,
 151                                         E1000_MNG_DHCP_COOKIE_LENGTH);
 152         /* If either the checksums or signature don't match, then
 153          * the cookie area isn't considered valid, in which case we
 154          * take the safe route of assuming Tx filtering is enabled.
 155          */
 156         if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
 157                 hw->mac.tx_pkt_filtering = true;
 158                 return hw->mac.tx_pkt_filtering;
 159         }
 160
 161         /* Cookie area is valid, make the final check for filtering. */
 162         if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
 163                 hw->mac.tx_pkt_filtering = false;
 164
 165         return hw->mac.tx_pkt_filtering;
 166 }
 167
 168 /**
 169  *  e1000_mng_write_cmd_header - Writes manageability command header
 170  *  @hw: pointer to the HW structure
 171  *  @hdr: pointer to the host interface command header
 172  *
 173  *  Writes the command header after does the checksum calculation.
 174  **/
 175 static s32 e1000_mng_write_cmd_header(struct e1000_hw *hw,
 176                                       struct e1000_host_mng_command_header *hdr)
 177 {
 178         u16 i, length = sizeof(struct e1000_host_mng_command_header);
 179
 180         /* Write the whole command header structure with new checksum. */
 181
 182         hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
 183
 184         length >>= 2;
 185         /* Write the relevant command block into the ram area. */
 186         for (i = 0; i < length; i++) {
 187                 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, i, *((u32 *)hdr + i));
 188                 e1e_flush();
 189         }
 190
 191         return 0;
 192 }
 193
 194 /**
 195  *  e1000_mng_host_if_write - Write to the manageability host interface
 196  *  @hw: pointer to the HW structure
 197  *  @buffer: pointer to the host interface buffer
 198  *  @length: size of the buffer
 199  *  @offset: location in the buffer to write to
 200  *  @sum: sum of the data (not checksum)
 201  *
 202  *  This function writes the buffer content at the offset given on the host if.
 203  *  It also does alignment considerations to do the writes in most efficient
 204  *  way.  Also fills up the sum of the buffer in *buffer parameter.
 205  **/
 206 static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer,
 207                                    u16 length, u16 offset, u8 *sum)
 208 {
 209         u8 *tmp;
 210         u8 *bufptr = buffer;
 211         u32 data = 0;
 212         u16 remaining, i, j, prev_bytes;
 213
 214         /* sum = only sum of the data and it is not checksum */
 215
 216         if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH)
 217                 return -E1000_ERR_PARAM;
 218
 219         tmp = (u8 *)&data;
 220         prev_bytes = offset & 0x3;
 221         offset >>= 2;
 222
 223         if (prev_bytes) {
 224                 data = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF, offset);
 225                 for (j = prev_bytes; j < sizeof(u32); j++) {
 226                         *(tmp + j) = *bufptr++;
 227                         *sum += *(tmp + j);
 228                 }
 229                 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset, data);
 230                 length -= j - prev_bytes;
 231                 offset++;
 232         }
 233
 234         remaining = length & 0x3;
 235         length -= remaining;
 236
 237         /* Calculate length in DWORDs */
 238         length >>= 2;
 239
 240         /* The device driver writes the relevant command block into the
 241          * ram area.
 242          */
 243         for (i = 0; i < length; i++) {
 244                 for (j = 0; j < sizeof(u32); j++) {
 245                         *(tmp + j) = *bufptr++;
 246                         *sum += *(tmp + j);
 247                 }
 248
 249                 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data);
 250         }
 251         if (remaining) {
 252                 for (j = 0; j < sizeof(u32); j++) {
 253                         if (j < remaining)
 254                                 *(tmp + j) = *bufptr++;
 255                         else
 256                                 *(tmp + j) = 0;
 257
 258                         *sum += *(tmp + j);
 259                 }
 260                 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data);
 261         }
 262
 263         return 0;
 264 }
 265
 266 /**
 267  *  e1000e_mng_write_dhcp_info - Writes DHCP info to host interface
 268  *  @hw: pointer to the HW structure
 269  *  @buffer: pointer to the host interface
 270  *  @length: size of the buffer
 271  *
 272  *  Writes the DHCP information to the host interface.
 273  **/
 274 s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length)
 275 {
 276         struct e1000_host_mng_command_header hdr;
 277         s32 ret_val;
 278         u32 hicr;
 279
 280         hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
 281         hdr.command_length = length;
 282         hdr.reserved1 = 0;
 283         hdr.reserved2 = 0;
 284         hdr.checksum = 0;
 285
 286         /* Enable the host interface */
 287         ret_val = e1000_mng_enable_host_if(hw);
 288         if (ret_val)
 289                 return ret_val;
 290
 291         /* Populate the host interface with the contents of "buffer". */
 292         ret_val = e1000_mng_host_if_write(hw, buffer, length,
 293                                           sizeof(hdr), &(hdr.checksum));
 294         if (ret_val)
 295                 return ret_val;
 296
 297         /* Write the manageability command header */
 298         ret_val = e1000_mng_write_cmd_header(hw, &hdr);
 299         if (ret_val)
 300                 return ret_val;
 301
 302         /* Tell the ARC a new command is pending. */
 303         hicr = er32(HICR);
 304         ew32(HICR, hicr | E1000_HICR_C);
 305
 306         return 0;
 307 }
 308
 309 /**
 310  *  e1000e_enable_mng_pass_thru - Check if management passthrough is needed
 311  *  @hw: pointer to the HW structure
 312  *
 313  *  Verifies the hardware needs to leave interface enabled so that frames can
 314  *  be directed to and from the management interface.
 315  **/
 316 bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw)
 317 {
 318         u32 manc;
 319         u32 fwsm, factps;
 320
 321         manc = er32(MANC);
 322
 323         if (!(manc & E1000_MANC_RCV_TCO_EN))
 324                 return false;
 325
 326         if (hw->mac.has_fwsm) {
 327                 fwsm = er32(FWSM);
 328                 factps = er32(FACTPS);
 329
 330                 if (!(factps & E1000_FACTPS_MNGCG) &&
 331                     ((fwsm & E1000_FWSM_MODE_MASK) ==
 332                      (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT)))
 333                         return true;
 334         } else if ((hw->mac.type == e1000_82574) ||
 335                    (hw->mac.type == e1000_82583)) {
 336                 u16 data;
 337
 338                 factps = er32(FACTPS);
 339                 e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
 340
 341                 if (!(factps & E1000_FACTPS_MNGCG) &&
 342                     ((data & E1000_NVM_INIT_CTRL2_MNGM) ==
 343                      (e1000_mng_mode_pt << 13)))
 344                         return true;
 345         } else if ((manc & E1000_MANC_SMBUS_EN) &&
 346                    !(manc & E1000_MANC_ASF_EN)) {
 347                 return true;
 348         }
 349
 350         return false;
 351 }