drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_api.c

   1 /*
   2  * Copyright (C) 1999 - 2010 Intel Corporation.
   3  * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
   4  *
   5  * This code was derived from the Intel e1000e Linux driver.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307, USA.
  19  */
  20 #include "pch_gbe.h"
  21 #include "pch_gbe_phy.h"
  22 #include "pch_gbe_api.h"
  23
  24 /* bus type values */
  25 #define pch_gbe_bus_type_unknown        0
  26 #define pch_gbe_bus_type_pci            1
  27 #define pch_gbe_bus_type_pcix           2
  28 #define pch_gbe_bus_type_pci_express    3
  29 #define pch_gbe_bus_type_reserved       4
  30
  31 /* bus speed values */
  32 #define pch_gbe_bus_speed_unknown       0
  33 #define pch_gbe_bus_speed_33            1
  34 #define pch_gbe_bus_speed_66            2
  35 #define pch_gbe_bus_speed_100           3
  36 #define pch_gbe_bus_speed_120           4
  37 #define pch_gbe_bus_speed_133           5
  38 #define pch_gbe_bus_speed_2500          6
  39 #define pch_gbe_bus_speed_reserved      7
  40
  41 /* bus width values */
  42 #define pch_gbe_bus_width_unknown       0
  43 #define pch_gbe_bus_width_pcie_x1       1
  44 #define pch_gbe_bus_width_pcie_x2       2
  45 #define pch_gbe_bus_width_pcie_x4       4
  46 #define pch_gbe_bus_width_32            5
  47 #define pch_gbe_bus_width_64            6
  48 #define pch_gbe_bus_width_reserved      7
  49
  50 /**
  51  * pch_gbe_plat_get_bus_info - Obtain bus information for adapter
  52  * @hw: Pointer to the HW structure
  53  */
  54 static void pch_gbe_plat_get_bus_info(struct pch_gbe_hw *hw)
  55 {
  56         hw->bus.type  = pch_gbe_bus_type_pci_express;
  57         hw->bus.speed = pch_gbe_bus_speed_2500;
  58         hw->bus.width = pch_gbe_bus_width_pcie_x1;
  59 }
  60
  61 /**
  62  * pch_gbe_plat_init_hw - Initialize hardware
  63  * @hw: Pointer to the HW structure
  64  * Returns:
  65  *      0:              Successfully
  66  *      Negative value: Failed-EBUSY
  67  */
  68 static s32 pch_gbe_plat_init_hw(struct pch_gbe_hw *hw)
  69 {
  70         s32 ret_val;
  71
  72         ret_val = pch_gbe_phy_get_id(hw);
  73         if (ret_val) {
  74                 struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
  75
  76                 netdev_err(adapter->netdev, "pch_gbe_phy_get_id error\n");
  77                 return ret_val;
  78         }
  79         pch_gbe_phy_init_setting(hw);
  80         /* Setup Mac interface option RGMII */
  81 #ifdef PCH_GBE_MAC_IFOP_RGMII
  82         pch_gbe_phy_set_rgmii(hw);
  83 #endif
  84         return ret_val;
  85 }
  86
  87 static const struct pch_gbe_functions pch_gbe_ops = {
  88         .get_bus_info      = pch_gbe_plat_get_bus_info,
  89         .init_hw           = pch_gbe_plat_init_hw,
  90         .read_phy_reg      = pch_gbe_phy_read_reg_miic,
  91         .write_phy_reg     = pch_gbe_phy_write_reg_miic,
  92         .reset_phy         = pch_gbe_phy_hw_reset,
  93         .sw_reset_phy      = pch_gbe_phy_sw_reset,
  94         .power_up_phy      = pch_gbe_phy_power_up,
  95         .power_down_phy    = pch_gbe_phy_power_down,
  96         .read_mac_addr     = pch_gbe_mac_read_mac_addr
  97 };
  98
  99 /**
 100  * pch_gbe_plat_init_function_pointers - Init func ptrs
 101  * @hw: Pointer to the HW structure
 102  */
 103 static void pch_gbe_plat_init_function_pointers(struct pch_gbe_hw *hw)
 104 {
 105         /* Set PHY parameter */
 106         hw->phy.reset_delay_us     = PCH_GBE_PHY_RESET_DELAY_US;
 107         /* Set function pointers */
 108         hw->func = &pch_gbe_ops;
 109 }
 110
 111 /**
 112  * pch_gbe_hal_setup_init_funcs - Initializes function pointers
 113  * @hw: Pointer to the HW structure
 114  * Returns:
 115  *      0:      Successfully
 116  *      ENOSYS: Function is not registered
 117  */
 118 s32 pch_gbe_hal_setup_init_funcs(struct pch_gbe_hw *hw)
 119 {
 120         if (!hw->reg) {
 121                 struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
 122
 123                 netdev_err(adapter->netdev, "ERROR: Registers not mapped\n");
 124                 return -ENOSYS;
 125         }
 126         pch_gbe_plat_init_function_pointers(hw);
 127         return 0;
 128 }
 129
 130 /**
 131  * pch_gbe_hal_get_bus_info - Obtain bus information for adapter
 132  * @hw: Pointer to the HW structure
 133  */
 134 void pch_gbe_hal_get_bus_info(struct pch_gbe_hw *hw)
 135 {
 136         if (!hw->func->get_bus_info) {
 137                 struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
 138
 139                 netdev_err(adapter->netdev, "ERROR: configuration\n");
 140                 return;
 141         }
 142         hw->func->get_bus_info(hw);
 143 }
 144
 145 /**
 146  * pch_gbe_hal_init_hw - Initialize hardware
 147  * @hw: Pointer to the HW structure
 148  * Returns:
 149  *      0:      Successfully
 150  *      ENOSYS: Function is not registered
 151  */
 152 s32 pch_gbe_hal_init_hw(struct pch_gbe_hw *hw)
 153 {
 154         if (!hw->func->init_hw) {
 155                 struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
 156
 157                 netdev_err(adapter->netdev, "ERROR: configuration\n");
 158                 return -ENOSYS;
 159         }
 160         return hw->func->init_hw(hw);
 161 }
 162
 163 /**
 164  * pch_gbe_hal_read_phy_reg - Reads PHY register
 165  * @hw:     Pointer to the HW structure
 166  * @offset: The register to read
 167  * @data:   The buffer to store the 16-bit read.
 168  * Returns:
 169  *      0:      Successfully
 170  *      Negative value: Failed
 171  */
 172 s32 pch_gbe_hal_read_phy_reg(struct pch_gbe_hw *hw, u32 offset,
 173                                         u16 *data)
 174 {
 175         if (!hw->func->read_phy_reg)
 176                 return 0;
 177         return hw->func->read_phy_reg(hw, offset, data);
 178 }
 179
 180 /**
 181  * pch_gbe_hal_write_phy_reg - Writes PHY register
 182  * @hw:     Pointer to the HW structure
 183  * @offset: The register to read
 184  * @data:   The value to write.
 185  * Returns:
 186  *      0:      Successfully
 187  *      Negative value: Failed
 188  */
 189 s32 pch_gbe_hal_write_phy_reg(struct pch_gbe_hw *hw, u32 offset,
 190                                         u16 data)
 191 {
 192         if (!hw->func->write_phy_reg)
 193                 return 0;
 194         return hw->func->write_phy_reg(hw, offset, data);
 195 }
 196
 197 /**
 198  * pch_gbe_hal_phy_hw_reset - Hard PHY reset
 199  * @hw:     Pointer to the HW structure
 200  */
 201 void pch_gbe_hal_phy_hw_reset(struct pch_gbe_hw *hw)
 202 {
 203         if (!hw->func->reset_phy) {
 204                 struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
 205
 206                 netdev_err(adapter->netdev, "ERROR: configuration\n");
 207                 return;
 208         }
 209         hw->func->reset_phy(hw);
 210 }
 211
 212 /**
 213  * pch_gbe_hal_phy_sw_reset - Soft PHY reset
 214  * @hw:     Pointer to the HW structure
 215  */
 216 void pch_gbe_hal_phy_sw_reset(struct pch_gbe_hw *hw)
 217 {
 218         if (!hw->func->sw_reset_phy) {
 219                 struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
 220
 221                 netdev_err(adapter->netdev, "ERROR: configuration\n");
 222                 return;
 223         }
 224         hw->func->sw_reset_phy(hw);
 225 }
 226
 227 /**
 228  * pch_gbe_hal_read_mac_addr - Reads MAC address
 229  * @hw: Pointer to the HW structure
 230  * Returns:
 231  *      0:      Successfully
 232  *      ENOSYS: Function is not registered
 233  */
 234 s32 pch_gbe_hal_read_mac_addr(struct pch_gbe_hw *hw)
 235 {
 236         if (!hw->func->read_mac_addr) {
 237                 struct pch_gbe_adapter *adapter = pch_gbe_hw_to_adapter(hw);
 238
 239                 netdev_err(adapter->netdev, "ERROR: configuration\n");
 240                 return -ENOSYS;
 241         }
 242         return hw->func->read_mac_addr(hw);
 243 }
 244
 245 /**
 246  * pch_gbe_hal_power_up_phy - Power up PHY
 247  * @hw: Pointer to the HW structure
 248  */
 249 void pch_gbe_hal_power_up_phy(struct pch_gbe_hw *hw)
 250 {
 251         if (hw->func->power_up_phy)
 252                 hw->func->power_up_phy(hw);
 253 }
 254
 255 /**
 256  * pch_gbe_hal_power_down_phy - Power down PHY
 257  * @hw: Pointer to the HW structure
 258  */
 259 void pch_gbe_hal_power_down_phy(struct pch_gbe_hw *hw)
 260 {
 261         if (hw->func->power_down_phy)
 262                 hw->func->power_down_phy(hw);
 263 }