arch/arm/mach-s3c24xx/mach-jive.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright 2007 Simtec Electronics
   4 //      Ben Dooks <ben@simtec.co.uk>
   5 //
   6 // http://armlinux.simtec.co.uk/
   7
   8 #include <linux/kernel.h>
   9 #include <linux/types.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/list.h>
  12 #include <linux/timer.h>
  13 #include <linux/init.h>
  14 #include <linux/gpio.h>
  15 #include <linux/syscore_ops.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/serial_s3c.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/i2c.h>
  20
  21 #include <video/ili9320.h>
  22
  23 #include <linux/spi/spi.h>
  24 #include <linux/spi/spi_gpio.h>
  25
  26 #include <asm/mach/arch.h>
  27 #include <asm/mach/map.h>
  28 #include <asm/mach/irq.h>
  29
  30 #include <linux/platform_data/mtd-nand-s3c2410.h>
  31 #include <linux/platform_data/i2c-s3c2410.h>
  32
  33 #include <mach/regs-gpio.h>
  34 #include <mach/regs-lcd.h>
  35 #include <mach/fb.h>
  36 #include <mach/gpio-samsung.h>
  37
  38 #include <asm/mach-types.h>
  39
  40 #include <linux/mtd/mtd.h>
  41 #include <linux/mtd/rawnand.h>
  42 #include <linux/mtd/nand_ecc.h>
  43 #include <linux/mtd/partitions.h>
  44
  45 #include <plat/gpio-cfg.h>
  46 #include <plat/devs.h>
  47 #include <plat/cpu.h>
  48 #include <plat/pm.h>
  49 #include <linux/platform_data/usb-s3c2410_udc.h>
  50 #include <plat/samsung-time.h>
  51
  52 #include "common.h"
  53 #include "s3c2412-power.h"
  54
  55 static struct map_desc jive_iodesc[] __initdata = {
  56 };
  57
  58 #define UCON S3C2410_UCON_DEFAULT
  59 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
  60 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  61
  62 static struct s3c2410_uartcfg jive_uartcfgs[] = {
  63         [0] = {
  64                 .hwport      = 0,
  65                 .flags       = 0,
  66                 .ucon        = UCON,
  67                 .ulcon       = ULCON,
  68                 .ufcon       = UFCON,
  69         },
  70         [1] = {
  71                 .hwport      = 1,
  72                 .flags       = 0,
  73                 .ucon        = UCON,
  74                 .ulcon       = ULCON,
  75                 .ufcon       = UFCON,
  76         },
  77         [2] = {
  78                 .hwport      = 2,
  79                 .flags       = 0,
  80                 .ucon        = UCON,
  81                 .ulcon       = ULCON,
  82                 .ufcon       = UFCON,
  83         }
  84 };
  85
  86 /* Jive flash assignment
  87  *
  88  * 0x00000000-0x00028000 : uboot
  89  * 0x00028000-0x0002c000 : uboot env
  90  * 0x0002c000-0x00030000 : spare
  91  * 0x00030000-0x00200000 : zimage A
  92  * 0x00200000-0x01600000 : cramfs A
  93  * 0x01600000-0x017d0000 : zimage B
  94  * 0x017d0000-0x02bd0000 : cramfs B
  95  * 0x02bd0000-0x03fd0000 : yaffs
  96  */
  97 static struct mtd_partition __initdata jive_imageA_nand_part[] = {
  98
  99 #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
 100         /* Don't allow access to the bootloader from linux */
 101         {
 102                 .name           = "uboot",
 103                 .offset         = 0,
 104                 .size           = (160 * SZ_1K),
 105                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
 106         },
 107
 108         /* spare */
 109         {
 110                 .name           = "spare",
 111                 .offset         = (176 * SZ_1K),
 112                 .size           = (16 * SZ_1K),
 113         },
 114 #endif
 115
 116         /* booted images */
 117         {
 118                 .name           = "kernel (ro)",
 119                 .offset         = (192 * SZ_1K),
 120                 .size           = (SZ_2M) - (192 * SZ_1K),
 121                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
 122         }, {
 123                 .name           = "root (ro)",
 124                 .offset         = (SZ_2M),
 125                 .size           = (20 * SZ_1M),
 126                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
 127         },
 128
 129         /* yaffs */
 130         {
 131                 .name           = "yaffs",
 132                 .offset         = (44 * SZ_1M),
 133                 .size           = (20 * SZ_1M),
 134         },
 135
 136         /* bootloader environment */
 137         {
 138                 .name           = "env",
 139                 .offset         = (160 * SZ_1K),
 140                 .size           = (16 * SZ_1K),
 141         },
 142
 143         /* upgrade images */
 144         {
 145                 .name           = "zimage",
 146                 .offset         = (22 * SZ_1M),
 147                 .size           = (2 * SZ_1M) - (192 * SZ_1K),
 148         }, {
 149                 .name           = "cramfs",
 150                 .offset         = (24 * SZ_1M) - (192*SZ_1K),
 151                 .size           = (20 * SZ_1M),
 152         },
 153 };
 154
 155 static struct mtd_partition __initdata jive_imageB_nand_part[] = {
 156
 157 #ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
 158         /* Don't allow access to the bootloader from linux */
 159         {
 160                 .name           = "uboot",
 161                 .offset         = 0,
 162                 .size           = (160 * SZ_1K),
 163                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
 164         },
 165
 166         /* spare */
 167         {
 168                 .name           = "spare",
 169                 .offset         = (176 * SZ_1K),
 170                 .size           = (16 * SZ_1K),
 171         },
 172 #endif
 173
 174         /* booted images */
 175         {
 176                 .name           = "kernel (ro)",
 177                 .offset         = (22 * SZ_1M),
 178                 .size           = (2 * SZ_1M) - (192 * SZ_1K),
 179                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
 180         },
 181         {
 182                 .name           = "root (ro)",
 183                 .offset         = (24 * SZ_1M) - (192 * SZ_1K),
 184                 .size           = (20 * SZ_1M),
 185                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
 186         },
 187
 188         /* yaffs */
 189         {
 190                 .name           = "yaffs",
 191                 .offset         = (44 * SZ_1M),
 192                 .size           = (20 * SZ_1M),
 193         },
 194
 195         /* bootloader environment */
 196         {
 197                 .name           = "env",
 198                 .offset         = (160 * SZ_1K),
 199                 .size           = (16 * SZ_1K),
 200         },
 201
 202         /* upgrade images */
 203         {
 204                 .name           = "zimage",
 205                 .offset         = (192 * SZ_1K),
 206                 .size           = (2 * SZ_1M) - (192 * SZ_1K),
 207         }, {
 208                 .name           = "cramfs",
 209                 .offset         = (2 * SZ_1M),
 210                 .size           = (20 * SZ_1M),
 211         },
 212 };
 213
 214 static struct s3c2410_nand_set __initdata jive_nand_sets[] = {
 215         [0] = {
 216                 .name           = "flash",
 217                 .nr_chips       = 1,
 218                 .nr_partitions  = ARRAY_SIZE(jive_imageA_nand_part),
 219                 .partitions     = jive_imageA_nand_part,
 220         },
 221 };
 222
 223 static struct s3c2410_platform_nand __initdata jive_nand_info = {
 224         /* set taken from osiris nand timings, possibly still conservative */
 225         .tacls          = 30,
 226         .twrph0         = 55,
 227         .twrph1         = 40,
 228         .sets           = jive_nand_sets,
 229         .nr_sets        = ARRAY_SIZE(jive_nand_sets),
 230         .ecc_mode       = NAND_ECC_SOFT,
 231 };
 232
 233 static int __init jive_mtdset(char *options)
 234 {
 235         struct s3c2410_nand_set *nand = &jive_nand_sets[0];
 236         unsigned long set;
 237
 238         if (options == NULL || options[0] == '\0')
 239                 return 0;
 240
 241         if (kstrtoul(options, 10, &set)) {
 242                 printk(KERN_ERR "failed to parse mtdset=%s\n", options);
 243                 return 0;
 244         }
 245
 246         switch (set) {
 247         case 1:
 248                 nand->nr_partitions = ARRAY_SIZE(jive_imageB_nand_part);
 249                 nand->partitions = jive_imageB_nand_part;
 250         case 0:
 251                 /* this is already setup in the nand info */
 252                 break;
 253         default:
 254                 printk(KERN_ERR "Unknown mtd set %ld specified,"
 255                        "using default.", set);
 256         }
 257
 258         return 0;
 259 }
 260
 261 /* parse the mtdset= option given to the kernel command line */
 262 __setup("mtdset=", jive_mtdset);
 263
 264 /* LCD timing and setup */
 265
 266 #define LCD_XRES         (240)
 267 #define LCD_YRES         (320)
 268 #define LCD_LEFT_MARGIN  (12)
 269 #define LCD_RIGHT_MARGIN (12)
 270 #define LCD_LOWER_MARGIN (12)
 271 #define LCD_UPPER_MARGIN (12)
 272 #define LCD_VSYNC        (2)
 273 #define LCD_HSYNC        (2)
 274
 275 #define LCD_REFRESH      (60)
 276
 277 #define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN)
 278 #define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN)
 279
 280 static struct s3c2410fb_display jive_vgg2432a4_display[] = {
 281         [0] = {
 282                 .width          = LCD_XRES,
 283                 .height         = LCD_YRES,
 284                 .xres           = LCD_XRES,
 285                 .yres           = LCD_YRES,
 286                 .left_margin    = LCD_LEFT_MARGIN,
 287                 .right_margin   = LCD_RIGHT_MARGIN,
 288                 .upper_margin   = LCD_UPPER_MARGIN,
 289                 .lower_margin   = LCD_LOWER_MARGIN,
 290                 .hsync_len      = LCD_HSYNC,
 291                 .vsync_len      = LCD_VSYNC,
 292
 293                 .pixclock       = (1000000000000LL /
 294                                    (LCD_REFRESH * LCD_HTOT * LCD_VTOT)),
 295
 296                 .bpp            = 16,
 297                 .type           = (S3C2410_LCDCON1_TFT16BPP |
 298                                    S3C2410_LCDCON1_TFT),
 299
 300                 .lcdcon5        = (S3C2410_LCDCON5_FRM565 |
 301                                    S3C2410_LCDCON5_INVVLINE |
 302                                    S3C2410_LCDCON5_INVVFRAME |
 303                                    S3C2410_LCDCON5_INVVDEN |
 304                                    S3C2410_LCDCON5_PWREN),
 305         },
 306 };
 307
 308 /* todo - put into gpio header */
 309
 310 #define S3C2410_GPCCON_MASK(x)  (3 << ((x) * 2))
 311 #define S3C2410_GPDCON_MASK(x)  (3 << ((x) * 2))
 312
 313 static struct s3c2410fb_mach_info jive_lcd_config = {
 314         .displays        = jive_vgg2432a4_display,
 315         .num_displays    = ARRAY_SIZE(jive_vgg2432a4_display),
 316         .default_display = 0,
 317
 318         /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN
 319          * and disable the pull down resistors on pins we are using for LCD
 320          * data. */
 321
 322         .gpcup          = (0xf << 1) | (0x3f << 10),
 323
 324         .gpccon         = (S3C2410_GPC1_VCLK   | S3C2410_GPC2_VLINE |
 325                            S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM |
 326                            S3C2410_GPC10_VD2   | S3C2410_GPC11_VD3 |
 327                            S3C2410_GPC12_VD4   | S3C2410_GPC13_VD5 |
 328                            S3C2410_GPC14_VD6   | S3C2410_GPC15_VD7),
 329
 330         .gpccon_mask    = (S3C2410_GPCCON_MASK(1)  | S3C2410_GPCCON_MASK(2)  |
 331                            S3C2410_GPCCON_MASK(3)  | S3C2410_GPCCON_MASK(4)  |
 332                            S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) |
 333                            S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) |
 334                            S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)),
 335
 336         .gpdup          = (0x3f << 2) | (0x3f << 10),
 337
 338         .gpdcon         = (S3C2410_GPD2_VD10  | S3C2410_GPD3_VD11 |
 339                            S3C2410_GPD4_VD12  | S3C2410_GPD5_VD13 |
 340                            S3C2410_GPD6_VD14  | S3C2410_GPD7_VD15 |
 341                            S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 |
 342                            S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 |
 343                            S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23),
 344
 345         .gpdcon_mask    = (S3C2410_GPDCON_MASK(2)  | S3C2410_GPDCON_MASK(3) |
 346                            S3C2410_GPDCON_MASK(4)  | S3C2410_GPDCON_MASK(5) |
 347                            S3C2410_GPDCON_MASK(6)  | S3C2410_GPDCON_MASK(7) |
 348                            S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)|
 349                            S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)|
 350                            S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)),
 351 };
 352
 353 /* ILI9320 support. */
 354
 355 static void jive_lcm_reset(unsigned int set)
 356 {
 357         printk(KERN_DEBUG "%s(%d)\n", __func__, set);
 358
 359         gpio_set_value(S3C2410_GPG(13), set);
 360 }
 361
 362 #undef LCD_UPPER_MARGIN
 363 #define LCD_UPPER_MARGIN 2
 364
 365 static struct ili9320_platdata jive_lcm_config = {
 366         .hsize          = LCD_XRES,
 367         .vsize          = LCD_YRES,
 368
 369         .reset          = jive_lcm_reset,
 370         .suspend        = ILI9320_SUSPEND_DEEP,
 371
 372         .entry_mode     = ILI9320_ENTRYMODE_ID(3) | ILI9320_ENTRYMODE_BGR,
 373         .display2       = (ILI9320_DISPLAY2_FP(LCD_UPPER_MARGIN) |
 374                            ILI9320_DISPLAY2_BP(LCD_LOWER_MARGIN)),
 375         .display3       = 0x0,
 376         .display4       = 0x0,
 377         .rgb_if1        = (ILI9320_RGBIF1_RIM_RGB18 |
 378                            ILI9320_RGBIF1_RM | ILI9320_RGBIF1_CLK_RGBIF),
 379         .rgb_if2        = ILI9320_RGBIF2_DPL,
 380         .interface2     = 0x0,
 381         .interface3     = 0x3,
 382         .interface4     = (ILI9320_INTERFACE4_RTNE(16) |
 383                            ILI9320_INTERFACE4_DIVE(1)),
 384         .interface5     = 0x0,
 385         .interface6     = 0x0,
 386 };
 387
 388 /* LCD SPI support */
 389
 390 static struct spi_gpio_platform_data jive_lcd_spi = {
 391         .sck            = S3C2410_GPG(8),
 392         .mosi           = S3C2410_GPB(8),
 393         .miso           = SPI_GPIO_NO_MISO,
 394 };
 395
 396 static struct platform_device jive_device_lcdspi = {
 397         .name           = "spi-gpio",
 398         .id             = 1,
 399         .dev.platform_data = &jive_lcd_spi,
 400 };
 401
 402
 403 /* WM8750 audio code SPI definition */
 404
 405 static struct spi_gpio_platform_data jive_wm8750_spi = {
 406         .sck            = S3C2410_GPB(4),
 407         .mosi           = S3C2410_GPB(9),
 408         .miso           = SPI_GPIO_NO_MISO,
 409 };
 410
 411 static struct platform_device jive_device_wm8750 = {
 412         .name           = "spi-gpio",
 413         .id             = 2,
 414         .dev.platform_data = &jive_wm8750_spi,
 415 };
 416
 417 /* JIVE SPI devices. */
 418
 419 static struct spi_board_info __initdata jive_spi_devs[] = {
 420         [0] = {
 421                 .modalias       = "VGG2432A4",
 422                 .bus_num        = 1,
 423                 .chip_select    = 0,
 424                 .mode           = SPI_MODE_3,   /* CPOL=1, CPHA=1 */
 425                 .max_speed_hz   = 100000,
 426                 .platform_data  = &jive_lcm_config,
 427                 .controller_data = (void *)S3C2410_GPB(7),
 428         }, {
 429                 .modalias       = "WM8750",
 430                 .bus_num        = 2,
 431                 .chip_select    = 0,
 432                 .mode           = SPI_MODE_0,   /* CPOL=0, CPHA=0 */
 433                 .max_speed_hz   = 100000,
 434                 .controller_data = (void *)S3C2410_GPH(10),
 435         },
 436 };
 437
 438 /* I2C bus and device configuration. */
 439
 440 static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = {
 441         .frequency      = 80 * 1000,
 442         .flags          = S3C_IICFLG_FILTER,
 443         .sda_delay      = 2,
 444 };
 445
 446 static struct i2c_board_info jive_i2c_devs[] __initdata = {
 447         [0] = {
 448                 I2C_BOARD_INFO("lis302dl", 0x1c),
 449                 .irq    = IRQ_EINT14,
 450         },
 451 };
 452
 453 /* The platform devices being used. */
 454
 455 static struct platform_device *jive_devices[] __initdata = {
 456         &s3c_device_ohci,
 457         &s3c_device_rtc,
 458         &s3c_device_wdt,
 459         &s3c_device_i2c0,
 460         &s3c_device_lcd,
 461         &jive_device_lcdspi,
 462         &jive_device_wm8750,
 463         &s3c_device_nand,
 464         &s3c_device_usbgadget,
 465         &s3c2412_device_dma,
 466 };
 467
 468 static struct s3c2410_udc_mach_info jive_udc_cfg __initdata = {
 469         .vbus_pin       = S3C2410_GPG(1),               /* detect is on GPG1 */
 470 };
 471
 472 /* Jive power management device */
 473
 474 #ifdef CONFIG_PM
 475 static int jive_pm_suspend(void)
 476 {
 477         /* Write the magic value u-boot uses to check for resume into
 478          * the INFORM0 register, and ensure INFORM1 is set to the
 479          * correct address to resume from. */
 480
 481         __raw_writel(0x2BED, S3C2412_INFORM0);
 482         __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1);
 483
 484         return 0;
 485 }
 486
 487 static void jive_pm_resume(void)
 488 {
 489         __raw_writel(0x0, S3C2412_INFORM0);
 490 }
 491
 492 #else
 493 #define jive_pm_suspend NULL
 494 #define jive_pm_resume NULL
 495 #endif
 496
 497 static struct syscore_ops jive_pm_syscore_ops = {
 498         .suspend        = jive_pm_suspend,
 499         .resume         = jive_pm_resume,
 500 };
 501
 502 static void __init jive_map_io(void)
 503 {
 504         s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc));
 505         s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs));
 506         samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
 507 }
 508
 509 static void __init jive_init_time(void)
 510 {
 511         s3c2412_init_clocks(12000000);
 512         samsung_timer_init();
 513 }
 514
 515 static void jive_power_off(void)
 516 {
 517         printk(KERN_INFO "powering system down...\n");
 518
 519         gpio_request_one(S3C2410_GPC(5), GPIOF_OUT_INIT_HIGH, NULL);
 520         gpio_free(S3C2410_GPC(5));
 521 }
 522
 523 static void __init jive_machine_init(void)
 524 {
 525         /* register system core operations for managing low level suspend */
 526
 527         register_syscore_ops(&jive_pm_syscore_ops);
 528
 529         /* write our sleep configurations for the IO. Pull down all unused
 530          * IO, ensure that we have turned off all peripherals we do not
 531          * need, and configure the ones we do need. */
 532
 533         /* Port B sleep */
 534
 535         __raw_writel(S3C2412_SLPCON_IN(0)   |
 536                      S3C2412_SLPCON_PULL(1) |
 537                      S3C2412_SLPCON_HIGH(2) |
 538                      S3C2412_SLPCON_PULL(3) |
 539                      S3C2412_SLPCON_PULL(4) |
 540                      S3C2412_SLPCON_PULL(5) |
 541                      S3C2412_SLPCON_PULL(6) |
 542                      S3C2412_SLPCON_HIGH(7) |
 543                      S3C2412_SLPCON_PULL(8) |
 544                      S3C2412_SLPCON_PULL(9) |
 545                      S3C2412_SLPCON_PULL(10), S3C2412_GPBSLPCON);
 546
 547         /* Port C sleep */
 548
 549         __raw_writel(S3C2412_SLPCON_PULL(0) |
 550                      S3C2412_SLPCON_PULL(1) |
 551                      S3C2412_SLPCON_PULL(2) |
 552                      S3C2412_SLPCON_PULL(3) |
 553                      S3C2412_SLPCON_PULL(4) |
 554                      S3C2412_SLPCON_PULL(5) |
 555                      S3C2412_SLPCON_LOW(6)  |
 556                      S3C2412_SLPCON_PULL(6) |
 557                      S3C2412_SLPCON_PULL(7) |
 558                      S3C2412_SLPCON_PULL(8) |
 559                      S3C2412_SLPCON_PULL(9) |
 560                      S3C2412_SLPCON_PULL(10) |
 561                      S3C2412_SLPCON_PULL(11) |
 562                      S3C2412_SLPCON_PULL(12) |
 563                      S3C2412_SLPCON_PULL(13) |
 564                      S3C2412_SLPCON_PULL(14) |
 565                      S3C2412_SLPCON_PULL(15), S3C2412_GPCSLPCON);
 566
 567         /* Port D sleep */
 568
 569         __raw_writel(S3C2412_SLPCON_ALL_PULL, S3C2412_GPDSLPCON);
 570
 571         /* Port F sleep */
 572
 573         __raw_writel(S3C2412_SLPCON_LOW(0)  |
 574                      S3C2412_SLPCON_LOW(1)  |
 575                      S3C2412_SLPCON_LOW(2)  |
 576                      S3C2412_SLPCON_EINT(3) |
 577                      S3C2412_SLPCON_EINT(4) |
 578                      S3C2412_SLPCON_EINT(5) |
 579                      S3C2412_SLPCON_EINT(6) |
 580                      S3C2412_SLPCON_EINT(7), S3C2412_GPFSLPCON);
 581
 582         /* Port G sleep */
 583
 584         __raw_writel(S3C2412_SLPCON_IN(0)    |
 585                      S3C2412_SLPCON_IN(1)    |
 586                      S3C2412_SLPCON_IN(2)    |
 587                      S3C2412_SLPCON_IN(3)    |
 588                      S3C2412_SLPCON_IN(4)    |
 589                      S3C2412_SLPCON_IN(5)    |
 590                      S3C2412_SLPCON_IN(6)    |
 591                      S3C2412_SLPCON_IN(7)    |
 592                      S3C2412_SLPCON_PULL(8)  |
 593                      S3C2412_SLPCON_PULL(9)  |
 594                      S3C2412_SLPCON_IN(10)   |
 595                      S3C2412_SLPCON_PULL(11) |
 596                      S3C2412_SLPCON_PULL(12) |
 597                      S3C2412_SLPCON_PULL(13) |
 598                      S3C2412_SLPCON_IN(14)   |
 599                      S3C2412_SLPCON_PULL(15), S3C2412_GPGSLPCON);
 600
 601         /* Port H sleep */
 602
 603         __raw_writel(S3C2412_SLPCON_PULL(0) |
 604                      S3C2412_SLPCON_PULL(1) |
 605                      S3C2412_SLPCON_PULL(2) |
 606                      S3C2412_SLPCON_PULL(3) |
 607                      S3C2412_SLPCON_PULL(4) |
 608                      S3C2412_SLPCON_PULL(5) |
 609                      S3C2412_SLPCON_PULL(6) |
 610                      S3C2412_SLPCON_IN(7)   |
 611                      S3C2412_SLPCON_IN(8)   |
 612                      S3C2412_SLPCON_PULL(9) |
 613                      S3C2412_SLPCON_IN(10), S3C2412_GPHSLPCON);
 614
 615         /* initialise the power management now we've setup everything. */
 616
 617         s3c_pm_init();
 618
 619         /** TODO - check that this is after the cmdline option! */
 620         s3c_nand_set_platdata(&jive_nand_info);
 621
 622         /* initialise the spi */
 623
 624         gpio_request(S3C2410_GPG(13), "lcm reset");
 625         gpio_direction_output(S3C2410_GPG(13), 0);
 626
 627         gpio_request(S3C2410_GPB(7), "jive spi");
 628         gpio_direction_output(S3C2410_GPB(7), 1);
 629
 630         gpio_request_one(S3C2410_GPB(6), GPIOF_OUT_INIT_LOW, NULL);
 631         gpio_free(S3C2410_GPB(6));
 632
 633         gpio_request_one(S3C2410_GPG(8), GPIOF_OUT_INIT_HIGH, NULL);
 634         gpio_free(S3C2410_GPG(8));
 635
 636         /* initialise the WM8750 spi */
 637
 638         gpio_request(S3C2410_GPH(10), "jive wm8750 spi");
 639         gpio_direction_output(S3C2410_GPH(10), 1);
 640
 641         /* Turn off suspend on both USB ports, and switch the
 642          * selectable USB port to USB device mode. */
 643
 644         s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
 645                               S3C2410_MISCCR_USBSUSPND0 |
 646                               S3C2410_MISCCR_USBSUSPND1, 0x0);
 647
 648         s3c24xx_udc_set_platdata(&jive_udc_cfg);
 649         s3c24xx_fb_set_platdata(&jive_lcd_config);
 650
 651         spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs));
 652
 653         s3c_i2c0_set_platdata(&jive_i2c_cfg);
 654         i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs));
 655
 656         pm_power_off = jive_power_off;
 657
 658         platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices));
 659 }
 660
 661 MACHINE_START(JIVE, "JIVE")
 662         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 663         .atag_offset    = 0x100,
 664
 665         .init_irq       = s3c2412_init_irq,
 666         .map_io         = jive_map_io,
 667         .init_machine   = jive_machine_init,
 668         .init_time      = jive_init_time,
 669 MACHINE_END