xtensa: support DMA buffers in high memory
[cris-mirror.git] / drivers / nvme / host / nvme.h
blob8e4550fa08f8bd775e7e5e8e0c169e287845509a
1 /*
2 * Copyright (c) 2011-2014, Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
14 #ifndef _NVME_H
15 #define _NVME_H
17 #include <linux/nvme.h>
18 #include <linux/cdev.h>
19 #include <linux/pci.h>
20 #include <linux/kref.h>
21 #include <linux/blk-mq.h>
22 #include <linux/lightnvm.h>
23 #include <linux/sed-opal.h>
25 extern unsigned int nvme_io_timeout;
26 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
28 extern unsigned int admin_timeout;
29 #define ADMIN_TIMEOUT (admin_timeout * HZ)
31 #define NVME_DEFAULT_KATO 5
32 #define NVME_KATO_GRACE 10
34 extern struct workqueue_struct *nvme_wq;
35 extern struct workqueue_struct *nvme_reset_wq;
36 extern struct workqueue_struct *nvme_delete_wq;
38 enum {
39 NVME_NS_LBA = 0,
40 NVME_NS_LIGHTNVM = 1,
44 * List of workarounds for devices that required behavior not specified in
45 * the standard.
47 enum nvme_quirks {
49 * Prefers I/O aligned to a stripe size specified in a vendor
50 * specific Identify field.
52 NVME_QUIRK_STRIPE_SIZE = (1 << 0),
55 * The controller doesn't handle Identify value others than 0 or 1
56 * correctly.
58 NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
61 * The controller deterministically returns O's on reads to
62 * logical blocks that deallocate was called on.
64 NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
67 * The controller needs a delay before starts checking the device
68 * readiness, which is done by reading the NVME_CSTS_RDY bit.
70 NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
73 * APST should not be used.
75 NVME_QUIRK_NO_APST = (1 << 4),
78 * The deepest sleep state should not be used.
80 NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
83 * Supports the LighNVM command set if indicated in vs[1].
85 NVME_QUIRK_LIGHTNVM = (1 << 6),
89 * Common request structure for NVMe passthrough. All drivers must have
90 * this structure as the first member of their request-private data.
92 struct nvme_request {
93 struct nvme_command *cmd;
94 union nvme_result result;
95 u8 retries;
96 u8 flags;
97 u16 status;
101 * Mark a bio as coming in through the mpath node.
103 #define REQ_NVME_MPATH REQ_DRV
105 enum {
106 NVME_REQ_CANCELLED = (1 << 0),
109 static inline struct nvme_request *nvme_req(struct request *req)
111 return blk_mq_rq_to_pdu(req);
114 /* The below value is the specific amount of delay needed before checking
115 * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
116 * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
117 * found empirically.
119 #define NVME_QUIRK_DELAY_AMOUNT 2300
121 enum nvme_ctrl_state {
122 NVME_CTRL_NEW,
123 NVME_CTRL_LIVE,
124 NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */
125 NVME_CTRL_RESETTING,
126 NVME_CTRL_RECONNECTING,
127 NVME_CTRL_DELETING,
128 NVME_CTRL_DEAD,
131 struct nvme_ctrl {
132 enum nvme_ctrl_state state;
133 bool identified;
134 spinlock_t lock;
135 const struct nvme_ctrl_ops *ops;
136 struct request_queue *admin_q;
137 struct request_queue *connect_q;
138 struct device *dev;
139 int instance;
140 struct blk_mq_tag_set *tagset;
141 struct blk_mq_tag_set *admin_tagset;
142 struct list_head namespaces;
143 struct mutex namespaces_mutex;
144 struct device ctrl_device;
145 struct device *device; /* char device */
146 struct cdev cdev;
147 struct work_struct reset_work;
148 struct work_struct delete_work;
150 struct nvme_subsystem *subsys;
151 struct list_head subsys_entry;
153 struct opal_dev *opal_dev;
155 char name[12];
156 u16 cntlid;
158 u32 ctrl_config;
159 u16 mtfa;
160 u32 queue_count;
162 u64 cap;
163 u32 page_size;
164 u32 max_hw_sectors;
165 u16 oncs;
166 u16 oacs;
167 u16 nssa;
168 u16 nr_streams;
169 atomic_t abort_limit;
170 u8 vwc;
171 u32 vs;
172 u32 sgls;
173 u16 kas;
174 u8 npss;
175 u8 apsta;
176 u32 aen_result;
177 unsigned int shutdown_timeout;
178 unsigned int kato;
179 bool subsystem;
180 unsigned long quirks;
181 struct nvme_id_power_state psd[32];
182 struct nvme_effects_log *effects;
183 struct work_struct scan_work;
184 struct work_struct async_event_work;
185 struct delayed_work ka_work;
186 struct work_struct fw_act_work;
188 /* Power saving configuration */
189 u64 ps_max_latency_us;
190 bool apst_enabled;
192 /* PCIe only: */
193 u32 hmpre;
194 u32 hmmin;
195 u32 hmminds;
196 u16 hmmaxd;
198 /* Fabrics only */
199 u16 sqsize;
200 u32 ioccsz;
201 u32 iorcsz;
202 u16 icdoff;
203 u16 maxcmd;
204 int nr_reconnects;
205 struct nvmf_ctrl_options *opts;
208 struct nvme_subsystem {
209 int instance;
210 struct device dev;
212 * Because we unregister the device on the last put we need
213 * a separate refcount.
215 struct kref ref;
216 struct list_head entry;
217 struct mutex lock;
218 struct list_head ctrls;
219 struct list_head nsheads;
220 char subnqn[NVMF_NQN_SIZE];
221 char serial[20];
222 char model[40];
223 char firmware_rev[8];
224 u8 cmic;
225 u16 vendor_id;
226 struct ida ns_ida;
230 * Container structure for uniqueue namespace identifiers.
232 struct nvme_ns_ids {
233 u8 eui64[8];
234 u8 nguid[16];
235 uuid_t uuid;
239 * Anchor structure for namespaces. There is one for each namespace in a
240 * NVMe subsystem that any of our controllers can see, and the namespace
241 * structure for each controller is chained of it. For private namespaces
242 * there is a 1:1 relation to our namespace structures, that is ->list
243 * only ever has a single entry for private namespaces.
245 struct nvme_ns_head {
246 #ifdef CONFIG_NVME_MULTIPATH
247 struct gendisk *disk;
248 struct nvme_ns __rcu *current_path;
249 struct bio_list requeue_list;
250 spinlock_t requeue_lock;
251 struct work_struct requeue_work;
252 #endif
253 struct list_head list;
254 struct srcu_struct srcu;
255 struct nvme_subsystem *subsys;
256 unsigned ns_id;
257 struct nvme_ns_ids ids;
258 struct list_head entry;
259 struct kref ref;
260 int instance;
263 struct nvme_ns {
264 struct list_head list;
266 struct nvme_ctrl *ctrl;
267 struct request_queue *queue;
268 struct gendisk *disk;
269 struct list_head siblings;
270 struct nvm_dev *ndev;
271 struct kref kref;
272 struct nvme_ns_head *head;
274 int lba_shift;
275 u16 ms;
276 u16 sgs;
277 u32 sws;
278 bool ext;
279 u8 pi_type;
280 unsigned long flags;
281 #define NVME_NS_REMOVING 0
282 #define NVME_NS_DEAD 1
283 u16 noiob;
286 struct nvme_ctrl_ops {
287 const char *name;
288 struct module *module;
289 unsigned int flags;
290 #define NVME_F_FABRICS (1 << 0)
291 #define NVME_F_METADATA_SUPPORTED (1 << 1)
292 int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
293 int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
294 int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
295 void (*free_ctrl)(struct nvme_ctrl *ctrl);
296 void (*submit_async_event)(struct nvme_ctrl *ctrl);
297 void (*delete_ctrl)(struct nvme_ctrl *ctrl);
298 int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
299 int (*reinit_request)(void *data, struct request *rq);
302 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
304 u32 val = 0;
306 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
307 return false;
308 return val & NVME_CSTS_RDY;
311 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
313 if (!ctrl->subsystem)
314 return -ENOTTY;
315 return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
318 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
320 return (sector >> (ns->lba_shift - 9));
323 static inline void nvme_cleanup_cmd(struct request *req)
325 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
326 kfree(page_address(req->special_vec.bv_page) +
327 req->special_vec.bv_offset);
331 static inline void nvme_end_request(struct request *req, __le16 status,
332 union nvme_result result)
334 struct nvme_request *rq = nvme_req(req);
336 rq->status = le16_to_cpu(status) >> 1;
337 rq->result = result;
338 blk_mq_complete_request(req);
341 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
343 get_device(ctrl->device);
346 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
348 put_device(ctrl->device);
351 void nvme_complete_rq(struct request *req);
352 void nvme_cancel_request(struct request *req, void *data, bool reserved);
353 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
354 enum nvme_ctrl_state new_state);
355 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
356 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
357 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
358 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
359 const struct nvme_ctrl_ops *ops, unsigned long quirks);
360 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
361 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
362 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
363 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
364 int nvme_init_identify(struct nvme_ctrl *ctrl);
366 void nvme_queue_scan(struct nvme_ctrl *ctrl);
367 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
369 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
370 bool send);
372 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
373 union nvme_result *res);
375 void nvme_stop_queues(struct nvme_ctrl *ctrl);
376 void nvme_start_queues(struct nvme_ctrl *ctrl);
377 void nvme_kill_queues(struct nvme_ctrl *ctrl);
378 void nvme_unfreeze(struct nvme_ctrl *ctrl);
379 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
380 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
381 void nvme_start_freeze(struct nvme_ctrl *ctrl);
382 int nvme_reinit_tagset(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set);
384 #define NVME_QID_ANY -1
385 struct request *nvme_alloc_request(struct request_queue *q,
386 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid);
387 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
388 struct nvme_command *cmd);
389 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
390 void *buf, unsigned bufflen);
391 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
392 union nvme_result *result, void *buffer, unsigned bufflen,
393 unsigned timeout, int qid, int at_head,
394 blk_mq_req_flags_t flags);
395 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
396 void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
397 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
398 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
399 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
400 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
401 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl);
403 extern const struct attribute_group nvme_ns_id_attr_group;
404 extern const struct block_device_operations nvme_ns_head_ops;
406 #ifdef CONFIG_NVME_MULTIPATH
407 void nvme_failover_req(struct request *req);
408 bool nvme_req_needs_failover(struct request *req, blk_status_t error);
409 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
410 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
411 void nvme_mpath_add_disk(struct nvme_ns_head *head);
412 void nvme_mpath_add_disk_links(struct nvme_ns *ns);
413 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
414 void nvme_mpath_remove_disk_links(struct nvme_ns *ns);
416 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
418 struct nvme_ns_head *head = ns->head;
420 if (head && ns == srcu_dereference(head->current_path, &head->srcu))
421 rcu_assign_pointer(head->current_path, NULL);
423 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
425 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
427 struct nvme_ns_head *head = ns->head;
429 if (head->disk && list_empty(&head->list))
430 kblockd_schedule_work(&head->requeue_work);
433 #else
434 static inline void nvme_failover_req(struct request *req)
437 static inline bool nvme_req_needs_failover(struct request *req,
438 blk_status_t error)
440 return false;
442 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
445 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
446 struct nvme_ns_head *head)
448 return 0;
450 static inline void nvme_mpath_add_disk(struct nvme_ns_head *head)
453 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
456 static inline void nvme_mpath_add_disk_links(struct nvme_ns *ns)
459 static inline void nvme_mpath_remove_disk_links(struct nvme_ns *ns)
462 static inline void nvme_mpath_clear_current_path(struct nvme_ns *ns)
465 static inline void nvme_mpath_check_last_path(struct nvme_ns *ns)
468 #endif /* CONFIG_NVME_MULTIPATH */
470 #ifdef CONFIG_NVM
471 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
472 void nvme_nvm_unregister(struct nvme_ns *ns);
473 int nvme_nvm_register_sysfs(struct nvme_ns *ns);
474 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
475 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
476 #else
477 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
478 int node)
480 return 0;
483 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
484 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
486 return 0;
488 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
489 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
490 unsigned long arg)
492 return -ENOTTY;
494 #endif /* CONFIG_NVM */
496 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
498 return dev_to_disk(dev)->private_data;
501 int __init nvme_core_init(void);
502 void nvme_core_exit(void);
504 #endif /* _NVME_H */