xtensa: fix high memory/reserved memory collision
[cris-mirror.git] / arch / arm64 / kernel / cacheinfo.c
blob380f2e2fbed5bfa09d556d5d9ec019e8e18e4fac
1 /*
2 * ARM64 cacheinfo support
4 * Copyright (C) 2015 ARM Ltd.
5 * All Rights Reserved
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/cacheinfo.h>
21 #include <linux/of.h>
23 #define MAX_CACHE_LEVEL 7 /* Max 7 level supported */
24 /* Ctypen, bits[3(n - 1) + 2 : 3(n - 1)], for n = 1 to 7 */
25 #define CLIDR_CTYPE_SHIFT(level) (3 * (level - 1))
26 #define CLIDR_CTYPE_MASK(level) (7 << CLIDR_CTYPE_SHIFT(level))
27 #define CLIDR_CTYPE(clidr, level) \
28 (((clidr) & CLIDR_CTYPE_MASK(level)) >> CLIDR_CTYPE_SHIFT(level))
30 static inline enum cache_type get_cache_type(int level)
32 u64 clidr;
34 if (level > MAX_CACHE_LEVEL)
35 return CACHE_TYPE_NOCACHE;
36 clidr = read_sysreg(clidr_el1);
37 return CLIDR_CTYPE(clidr, level);
40 static void ci_leaf_init(struct cacheinfo *this_leaf,
41 enum cache_type type, unsigned int level)
43 this_leaf->level = level;
44 this_leaf->type = type;
47 static int __init_cache_level(unsigned int cpu)
49 unsigned int ctype, level, leaves, of_level;
50 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
52 for (level = 1, leaves = 0; level <= MAX_CACHE_LEVEL; level++) {
53 ctype = get_cache_type(level);
54 if (ctype == CACHE_TYPE_NOCACHE) {
55 level--;
56 break;
58 /* Separate instruction and data caches */
59 leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1;
62 of_level = of_find_last_cache_level(cpu);
63 if (level < of_level) {
65 * some external caches not specified in CLIDR_EL1
66 * the information may be available in the device tree
67 * only unified external caches are considered here
69 leaves += (of_level - level);
70 level = of_level;
73 this_cpu_ci->num_levels = level;
74 this_cpu_ci->num_leaves = leaves;
75 return 0;
78 static int __populate_cache_leaves(unsigned int cpu)
80 unsigned int level, idx;
81 enum cache_type type;
82 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
83 struct cacheinfo *this_leaf = this_cpu_ci->info_list;
85 for (idx = 0, level = 1; level <= this_cpu_ci->num_levels &&
86 idx < this_cpu_ci->num_leaves; idx++, level++) {
87 type = get_cache_type(level);
88 if (type == CACHE_TYPE_SEPARATE) {
89 ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);
90 ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);
91 } else {
92 ci_leaf_init(this_leaf++, type, level);
95 return 0;
98 DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
99 DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)