arch/powerpc/include/asm/hw_irq.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
   4  */
   5 #ifndef _ASM_POWERPC_HW_IRQ_H
   6 #define _ASM_POWERPC_HW_IRQ_H
   7
   8 #ifdef __KERNEL__
   9
  10 #include <linux/errno.h>
  11 #include <linux/compiler.h>
  12 #include <asm/ptrace.h>
  13 #include <asm/processor.h>
  14
  15 #ifdef CONFIG_PPC64
  16
  17 /*
  18  * PACA flags in paca->irq_happened.
  19  *
  20  * This bits are set when interrupts occur while soft-disabled
  21  * and allow a proper replay. Additionally, PACA_IRQ_HARD_DIS
  22  * is set whenever we manually hard disable.
  23  */
  24 #define PACA_IRQ_HARD_DIS       0x01
  25 #define PACA_IRQ_DBELL          0x02
  26 #define PACA_IRQ_EE             0x04
  27 #define PACA_IRQ_DEC            0x08 /* Or FIT */
  28 #define PACA_IRQ_EE_EDGE        0x10 /* BookE only */
  29 #define PACA_IRQ_HMI            0x20
  30 #define PACA_IRQ_PMI            0x40
  31
  32 /*
  33  * flags for paca->irq_soft_mask
  34  */
  35 #define IRQS_ENABLED            0
  36 #define IRQS_DISABLED           1 /* local_irq_disable() interrupts */
  37 #define IRQS_PMI_DISABLED       2
  38 #define IRQS_ALL_DISABLED       (IRQS_DISABLED | IRQS_PMI_DISABLED)
  39
  40 #endif /* CONFIG_PPC64 */
  41
  42 #ifndef __ASSEMBLY__
  43
  44 extern void replay_system_reset(void);
  45 extern void __replay_interrupt(unsigned int vector);
  46
  47 extern void timer_interrupt(struct pt_regs *);
  48 extern void performance_monitor_exception(struct pt_regs *regs);
  49 extern void WatchdogException(struct pt_regs *regs);
  50 extern void unknown_exception(struct pt_regs *regs);
  51
  52 #ifdef CONFIG_PPC64
  53 #include <asm/paca.h>
  54
  55 static inline notrace unsigned long irq_soft_mask_return(void)
  56 {
  57         unsigned long flags;
  58
  59         asm volatile(
  60                 "lbz %0,%1(13)"
  61                 : "=r" (flags)
  62                 : "i" (offsetof(struct paca_struct, irq_soft_mask)));
  63
  64         return flags;
  65 }
  66
  67 /*
  68  * The "memory" clobber acts as both a compiler barrier
  69  * for the critical section and as a clobber because
  70  * we changed paca->irq_soft_mask
  71  */
  72 static inline notrace void irq_soft_mask_set(unsigned long mask)
  73 {
  74 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
  75         /*
  76          * The irq mask must always include the STD bit if any are set.
  77          *
  78          * and interrupts don't get replayed until the standard
  79          * interrupt (local_irq_disable()) is unmasked.
  80          *
  81          * Other masks must only provide additional masking beyond
  82          * the standard, and they are also not replayed until the
  83          * standard interrupt becomes unmasked.
  84          *
  85          * This could be changed, but it will require partial
  86          * unmasks to be replayed, among other things. For now, take
  87          * the simple approach.
  88          */
  89         WARN_ON(mask && !(mask & IRQS_DISABLED));
  90 #endif
  91
  92         asm volatile(
  93                 "stb %0,%1(13)"
  94                 :
  95                 : "r" (mask),
  96                   "i" (offsetof(struct paca_struct, irq_soft_mask))
  97                 : "memory");
  98 }
  99
 100 static inline notrace unsigned long irq_soft_mask_set_return(unsigned long mask)
 101 {
 102         unsigned long flags;
 103
 104 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
 105         WARN_ON(mask && !(mask & IRQS_DISABLED));
 106 #endif
 107
 108         asm volatile(
 109                 "lbz %0,%1(13); stb %2,%1(13)"
 110                 : "=&r" (flags)
 111                 : "i" (offsetof(struct paca_struct, irq_soft_mask)),
 112                   "r" (mask)
 113                 : "memory");
 114
 115         return flags;
 116 }
 117
 118 static inline notrace unsigned long irq_soft_mask_or_return(unsigned long mask)
 119 {
 120         unsigned long flags, tmp;
 121
 122         asm volatile(
 123                 "lbz %0,%2(13); or %1,%0,%3; stb %1,%2(13)"
 124                 : "=&r" (flags), "=r" (tmp)
 125                 : "i" (offsetof(struct paca_struct, irq_soft_mask)),
 126                   "r" (mask)
 127                 : "memory");
 128
 129 #ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
 130         WARN_ON((mask | flags) && !((mask | flags) & IRQS_DISABLED));
 131 #endif
 132
 133         return flags;
 134 }
 135
 136 static inline unsigned long arch_local_save_flags(void)
 137 {
 138         return irq_soft_mask_return();
 139 }
 140
 141 static inline void arch_local_irq_disable(void)
 142 {
 143         irq_soft_mask_set(IRQS_DISABLED);
 144 }
 145
 146 extern void arch_local_irq_restore(unsigned long);
 147
 148 static inline void arch_local_irq_enable(void)
 149 {
 150         arch_local_irq_restore(IRQS_ENABLED);
 151 }
 152
 153 static inline unsigned long arch_local_irq_save(void)
 154 {
 155         return irq_soft_mask_set_return(IRQS_DISABLED);
 156 }
 157
 158 static inline bool arch_irqs_disabled_flags(unsigned long flags)
 159 {
 160         return flags & IRQS_DISABLED;
 161 }
 162
 163 static inline bool arch_irqs_disabled(void)
 164 {
 165         return arch_irqs_disabled_flags(arch_local_save_flags());
 166 }
 167
 168 #ifdef CONFIG_PPC_BOOK3S
 169 /*
 170  * To support disabling and enabling of irq with PMI, set of
 171  * new powerpc_local_irq_pmu_save() and powerpc_local_irq_restore()
 172  * functions are added. These macros are implemented using generic
 173  * linux local_irq_* code from include/linux/irqflags.h.
 174  */
 175 #define raw_local_irq_pmu_save(flags)                                   \
 176         do {                                                            \
 177                 typecheck(unsigned long, flags);                        \
 178                 flags = irq_soft_mask_or_return(IRQS_DISABLED | \
 179                                 IRQS_PMI_DISABLED);                     \
 180         } while(0)
 181
 182 #define raw_local_irq_pmu_restore(flags)                                \
 183         do {                                                            \
 184                 typecheck(unsigned long, flags);                        \
 185                 arch_local_irq_restore(flags);                          \
 186         } while(0)
 187
 188 #ifdef CONFIG_TRACE_IRQFLAGS
 189 #define powerpc_local_irq_pmu_save(flags)                       \
 190          do {                                                   \
 191                 raw_local_irq_pmu_save(flags);                  \
 192                 trace_hardirqs_off();                           \
 193         } while(0)
 194 #define powerpc_local_irq_pmu_restore(flags)                    \
 195         do {                                                    \
 196                 if (raw_irqs_disabled_flags(flags)) {           \
 197                         raw_local_irq_pmu_restore(flags);       \
 198                         trace_hardirqs_off();                   \
 199                 } else {                                        \
 200                         trace_hardirqs_on();                    \
 201                         raw_local_irq_pmu_restore(flags);       \
 202                 }                                               \
 203         } while(0)
 204 #else
 205 #define powerpc_local_irq_pmu_save(flags)                       \
 206         do {                                                    \
 207                 raw_local_irq_pmu_save(flags);                  \
 208         } while(0)
 209 #define powerpc_local_irq_pmu_restore(flags)                    \
 210         do {                                                    \
 211                 raw_local_irq_pmu_restore(flags);               \
 212         } while (0)
 213 #endif  /* CONFIG_TRACE_IRQFLAGS */
 214
 215 #endif /* CONFIG_PPC_BOOK3S */
 216
 217 #ifdef CONFIG_PPC_BOOK3E
 218 #define __hard_irq_enable()     asm volatile("wrteei 1" : : : "memory")
 219 #define __hard_irq_disable()    asm volatile("wrteei 0" : : : "memory")
 220 #else
 221 #define __hard_irq_enable()     __mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
 222 #define __hard_irq_disable()    __mtmsrd(local_paca->kernel_msr, 1)
 223 #endif
 224
 225 #define hard_irq_disable()      do {                                    \
 226         unsigned long flags;                                            \
 227         __hard_irq_disable();                                           \
 228         flags = irq_soft_mask_set_return(IRQS_ALL_DISABLED);            \
 229         local_paca->irq_happened |= PACA_IRQ_HARD_DIS;                  \
 230         if (!arch_irqs_disabled_flags(flags))                           \
 231                 trace_hardirqs_off();                                   \
 232 } while(0)
 233
 234 static inline bool lazy_irq_pending(void)
 235 {
 236         return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
 237 }
 238
 239 /*
 240  * This is called by asynchronous interrupts to conditionally
 241  * re-enable hard interrupts when soft-disabled after having
 242  * cleared the source of the interrupt
 243  */
 244 static inline void may_hard_irq_enable(void)
 245 {
 246         get_paca()->irq_happened &= ~PACA_IRQ_HARD_DIS;
 247         if (!(get_paca()->irq_happened & PACA_IRQ_EE))
 248                 __hard_irq_enable();
 249 }
 250
 251 static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
 252 {
 253         return (regs->softe & IRQS_DISABLED);
 254 }
 255
 256 extern bool prep_irq_for_idle(void);
 257 extern bool prep_irq_for_idle_irqsoff(void);
 258 extern void irq_set_pending_from_srr1(unsigned long srr1);
 259
 260 #define fini_irq_for_idle_irqsoff() trace_hardirqs_off();
 261
 262 extern void force_external_irq_replay(void);
 263
 264 #else /* CONFIG_PPC64 */
 265
 266 #define SET_MSR_EE(x)   mtmsr(x)
 267
 268 static inline unsigned long arch_local_save_flags(void)
 269 {
 270         return mfmsr();
 271 }
 272
 273 static inline void arch_local_irq_restore(unsigned long flags)
 274 {
 275 #if defined(CONFIG_BOOKE)
 276         asm volatile("wrtee %0" : : "r" (flags) : "memory");
 277 #else
 278         mtmsr(flags);
 279 #endif
 280 }
 281
 282 static inline unsigned long arch_local_irq_save(void)
 283 {
 284         unsigned long flags = arch_local_save_flags();
 285 #ifdef CONFIG_BOOKE
 286         asm volatile("wrteei 0" : : : "memory");
 287 #elif defined(CONFIG_PPC_8xx)
 288         wrtspr(SPRN_EID);
 289 #else
 290         SET_MSR_EE(flags & ~MSR_EE);
 291 #endif
 292         return flags;
 293 }
 294
 295 static inline void arch_local_irq_disable(void)
 296 {
 297 #ifdef CONFIG_BOOKE
 298         asm volatile("wrteei 0" : : : "memory");
 299 #elif defined(CONFIG_PPC_8xx)
 300         wrtspr(SPRN_EID);
 301 #else
 302         arch_local_irq_save();
 303 #endif
 304 }
 305
 306 static inline void arch_local_irq_enable(void)
 307 {
 308 #ifdef CONFIG_BOOKE
 309         asm volatile("wrteei 1" : : : "memory");
 310 #elif defined(CONFIG_PPC_8xx)
 311         wrtspr(SPRN_EIE);
 312 #else
 313         unsigned long msr = mfmsr();
 314         SET_MSR_EE(msr | MSR_EE);
 315 #endif
 316 }
 317
 318 static inline bool arch_irqs_disabled_flags(unsigned long flags)
 319 {
 320         return (flags & MSR_EE) == 0;
 321 }
 322
 323 static inline bool arch_irqs_disabled(void)
 324 {
 325         return arch_irqs_disabled_flags(arch_local_save_flags());
 326 }
 327
 328 #define hard_irq_disable()              arch_local_irq_disable()
 329
 330 static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
 331 {
 332         return !(regs->msr & MSR_EE);
 333 }
 334
 335 static inline void may_hard_irq_enable(void) { }
 336
 337 #endif /* CONFIG_PPC64 */
 338
 339 #define ARCH_IRQ_INIT_FLAGS     IRQ_NOREQUEST
 340
 341 /*
 342  * interrupt-retrigger: should we handle this via lost interrupts and IPIs
 343  * or should we not care like we do now ? --BenH.
 344  */
 345 struct irq_chip;
 346
 347 #endif  /* __ASSEMBLY__ */
 348 #endif  /* __KERNEL__ */
 349 #endif  /* _ASM_POWERPC_HW_IRQ_H */