xtensa: fix high memory/reserved memory collision
[cris-mirror.git] / drivers / gpu / drm / msm / Makefile
blob92b3844202d2bd9cb08837730e13fa15df422d3d
1 # SPDX-License-Identifier: GPL-2.0
2 ccflags-y := -Idrivers/gpu/drm/msm
3 ccflags-$(CONFIG_DRM_MSM_DSI) += -Idrivers/gpu/drm/msm/dsi
5 msm-y := \
6 adreno/adreno_device.o \
7 adreno/adreno_gpu.o \
8 adreno/a3xx_gpu.o \
9 adreno/a4xx_gpu.o \
10 adreno/a5xx_gpu.o \
11 adreno/a5xx_power.o \
12 adreno/a5xx_preempt.o \
13 hdmi/hdmi.o \
14 hdmi/hdmi_audio.o \
15 hdmi/hdmi_bridge.o \
16 hdmi/hdmi_connector.o \
17 hdmi/hdmi_i2c.o \
18 hdmi/hdmi_phy.o \
19 hdmi/hdmi_phy_8960.o \
20 hdmi/hdmi_phy_8x60.o \
21 hdmi/hdmi_phy_8x74.o \
22 edp/edp.o \
23 edp/edp_aux.o \
24 edp/edp_bridge.o \
25 edp/edp_connector.o \
26 edp/edp_ctrl.o \
27 edp/edp_phy.o \
28 mdp/mdp_format.o \
29 mdp/mdp_kms.o \
30 mdp/mdp4/mdp4_crtc.o \
31 mdp/mdp4/mdp4_dtv_encoder.o \
32 mdp/mdp4/mdp4_lcdc_encoder.o \
33 mdp/mdp4/mdp4_lvds_connector.o \
34 mdp/mdp4/mdp4_irq.o \
35 mdp/mdp4/mdp4_kms.o \
36 mdp/mdp4/mdp4_plane.o \
37 mdp/mdp5/mdp5_cfg.o \
38 mdp/mdp5/mdp5_ctl.o \
39 mdp/mdp5/mdp5_crtc.o \
40 mdp/mdp5/mdp5_encoder.o \
41 mdp/mdp5/mdp5_irq.o \
42 mdp/mdp5/mdp5_mdss.o \
43 mdp/mdp5/mdp5_kms.o \
44 mdp/mdp5/mdp5_pipe.o \
45 mdp/mdp5/mdp5_mixer.o \
46 mdp/mdp5/mdp5_plane.o \
47 mdp/mdp5/mdp5_smp.o \
48 msm_atomic.o \
49 msm_debugfs.o \
50 msm_drv.o \
51 msm_fb.o \
52 msm_fence.o \
53 msm_gem.o \
54 msm_gem_prime.o \
55 msm_gem_shrinker.o \
56 msm_gem_submit.o \
57 msm_gem_vma.o \
58 msm_gpu.o \
59 msm_iommu.o \
60 msm_perf.o \
61 msm_rd.o \
62 msm_ringbuffer.o \
63 msm_submitqueue.o
65 msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
66 msm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o
67 msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
68 msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o
70 msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
72 msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
73 mdp/mdp4/mdp4_dsi_encoder.o \
74 dsi/dsi_cfg.o \
75 dsi/dsi_host.o \
76 dsi/dsi_manager.o \
77 dsi/phy/dsi_phy.o \
78 mdp/mdp5/mdp5_cmd_encoder.o
80 msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
81 msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
82 msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
83 msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o
85 ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)
86 msm-y += dsi/pll/dsi_pll.o
87 msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o
88 msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/pll/dsi_pll_28nm_8960.o
89 msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/pll/dsi_pll_14nm.o
90 endif
92 obj-$(CONFIG_DRM_MSM) += msm.o