xtensa: fix high memory/reserved memory collision
[cris-mirror.git] / include / linux / mfd / mt6323 / registers.h
blob160f3c0e2589c184ac986fb682b96d9d1f664fe0
1 /*
2 * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
9 #ifndef __MFD_MT6323_REGISTERS_H__
10 #define __MFD_MT6323_REGISTERS_H__
12 /* PMIC Registers */
13 #define MT6323_CHR_CON0 0x0000
14 #define MT6323_CHR_CON1 0x0002
15 #define MT6323_CHR_CON2 0x0004
16 #define MT6323_CHR_CON3 0x0006
17 #define MT6323_CHR_CON4 0x0008
18 #define MT6323_CHR_CON5 0x000A
19 #define MT6323_CHR_CON6 0x000C
20 #define MT6323_CHR_CON7 0x000E
21 #define MT6323_CHR_CON8 0x0010
22 #define MT6323_CHR_CON9 0x0012
23 #define MT6323_CHR_CON10 0x0014
24 #define MT6323_CHR_CON11 0x0016
25 #define MT6323_CHR_CON12 0x0018
26 #define MT6323_CHR_CON13 0x001A
27 #define MT6323_CHR_CON14 0x001C
28 #define MT6323_CHR_CON15 0x001E
29 #define MT6323_CHR_CON16 0x0020
30 #define MT6323_CHR_CON17 0x0022
31 #define MT6323_CHR_CON18 0x0024
32 #define MT6323_CHR_CON19 0x0026
33 #define MT6323_CHR_CON20 0x0028
34 #define MT6323_CHR_CON21 0x002A
35 #define MT6323_CHR_CON22 0x002C
36 #define MT6323_CHR_CON23 0x002E
37 #define MT6323_CHR_CON24 0x0030
38 #define MT6323_CHR_CON25 0x0032
39 #define MT6323_CHR_CON26 0x0034
40 #define MT6323_CHR_CON27 0x0036
41 #define MT6323_CHR_CON28 0x0038
42 #define MT6323_CHR_CON29 0x003A
43 #define MT6323_STRUP_CON0 0x003C
44 #define MT6323_STRUP_CON2 0x003E
45 #define MT6323_STRUP_CON3 0x0040
46 #define MT6323_STRUP_CON4 0x0042
47 #define MT6323_STRUP_CON5 0x0044
48 #define MT6323_STRUP_CON6 0x0046
49 #define MT6323_STRUP_CON7 0x0048
50 #define MT6323_STRUP_CON8 0x004A
51 #define MT6323_STRUP_CON9 0x004C
52 #define MT6323_STRUP_CON10 0x004E
53 #define MT6323_STRUP_CON11 0x0050
54 #define MT6323_SPK_CON0 0x0052
55 #define MT6323_SPK_CON1 0x0054
56 #define MT6323_SPK_CON2 0x0056
57 #define MT6323_SPK_CON6 0x005E
58 #define MT6323_SPK_CON7 0x0060
59 #define MT6323_SPK_CON8 0x0062
60 #define MT6323_SPK_CON9 0x0064
61 #define MT6323_SPK_CON10 0x0066
62 #define MT6323_SPK_CON11 0x0068
63 #define MT6323_SPK_CON12 0x006A
64 #define MT6323_CID 0x0100
65 #define MT6323_TOP_CKPDN0 0x0102
66 #define MT6323_TOP_CKPDN0_SET 0x0104
67 #define MT6323_TOP_CKPDN0_CLR 0x0106
68 #define MT6323_TOP_CKPDN1 0x0108
69 #define MT6323_TOP_CKPDN1_SET 0x010A
70 #define MT6323_TOP_CKPDN1_CLR 0x010C
71 #define MT6323_TOP_CKPDN2 0x010E
72 #define MT6323_TOP_CKPDN2_SET 0x0110
73 #define MT6323_TOP_CKPDN2_CLR 0x0112
74 #define MT6323_TOP_RST_CON 0x0114
75 #define MT6323_TOP_RST_CON_SET 0x0116
76 #define MT6323_TOP_RST_CON_CLR 0x0118
77 #define MT6323_TOP_RST_MISC 0x011A
78 #define MT6323_TOP_RST_MISC_SET 0x011C
79 #define MT6323_TOP_RST_MISC_CLR 0x011E
80 #define MT6323_TOP_CKCON0 0x0120
81 #define MT6323_TOP_CKCON0_SET 0x0122
82 #define MT6323_TOP_CKCON0_CLR 0x0124
83 #define MT6323_TOP_CKCON1 0x0126
84 #define MT6323_TOP_CKCON1_SET 0x0128
85 #define MT6323_TOP_CKCON1_CLR 0x012A
86 #define MT6323_TOP_CKTST0 0x012C
87 #define MT6323_TOP_CKTST1 0x012E
88 #define MT6323_TOP_CKTST2 0x0130
89 #define MT6323_TEST_OUT 0x0132
90 #define MT6323_TEST_CON0 0x0134
91 #define MT6323_TEST_CON1 0x0136
92 #define MT6323_EN_STATUS0 0x0138
93 #define MT6323_EN_STATUS1 0x013A
94 #define MT6323_OCSTATUS0 0x013C
95 #define MT6323_OCSTATUS1 0x013E
96 #define MT6323_PGSTATUS 0x0140
97 #define MT6323_CHRSTATUS 0x0142
98 #define MT6323_TDSEL_CON 0x0144
99 #define MT6323_RDSEL_CON 0x0146
100 #define MT6323_SMT_CON0 0x0148
101 #define MT6323_SMT_CON1 0x014A
102 #define MT6323_SMT_CON2 0x014C
103 #define MT6323_SMT_CON3 0x014E
104 #define MT6323_SMT_CON4 0x0150
105 #define MT6323_DRV_CON0 0x0152
106 #define MT6323_DRV_CON1 0x0154
107 #define MT6323_DRV_CON2 0x0156
108 #define MT6323_DRV_CON3 0x0158
109 #define MT6323_DRV_CON4 0x015A
110 #define MT6323_SIMLS1_CON 0x015C
111 #define MT6323_SIMLS2_CON 0x015E
112 #define MT6323_INT_CON0 0x0160
113 #define MT6323_INT_CON0_SET 0x0162
114 #define MT6323_INT_CON0_CLR 0x0164
115 #define MT6323_INT_CON1 0x0166
116 #define MT6323_INT_CON1_SET 0x0168
117 #define MT6323_INT_CON1_CLR 0x016A
118 #define MT6323_INT_MISC_CON 0x016C
119 #define MT6323_INT_MISC_CON_SET 0x016E
120 #define MT6323_INT_MISC_CON_CLR 0x0170
121 #define MT6323_INT_STATUS0 0x0172
122 #define MT6323_INT_STATUS1 0x0174
123 #define MT6323_OC_GEAR_0 0x0176
124 #define MT6323_OC_GEAR_1 0x0178
125 #define MT6323_OC_GEAR_2 0x017A
126 #define MT6323_OC_CTL_VPROC 0x017C
127 #define MT6323_OC_CTL_VSYS 0x017E
128 #define MT6323_OC_CTL_VPA 0x0180
129 #define MT6323_FQMTR_CON0 0x0182
130 #define MT6323_FQMTR_CON1 0x0184
131 #define MT6323_FQMTR_CON2 0x0186
132 #define MT6323_RG_SPI_CON 0x0188
133 #define MT6323_DEW_DIO_EN 0x018A
134 #define MT6323_DEW_READ_TEST 0x018C
135 #define MT6323_DEW_WRITE_TEST 0x018E
136 #define MT6323_DEW_CRC_SWRST 0x0190
137 #define MT6323_DEW_CRC_EN 0x0192
138 #define MT6323_DEW_CRC_VAL 0x0194
139 #define MT6323_DEW_DBG_MON_SEL 0x0196
140 #define MT6323_DEW_CIPHER_KEY_SEL 0x0198
141 #define MT6323_DEW_CIPHER_IV_SEL 0x019A
142 #define MT6323_DEW_CIPHER_EN 0x019C
143 #define MT6323_DEW_CIPHER_RDY 0x019E
144 #define MT6323_DEW_CIPHER_MODE 0x01A0
145 #define MT6323_DEW_CIPHER_SWRST 0x01A2
146 #define MT6323_DEW_RDDMY_NO 0x01A4
147 #define MT6323_DEW_RDATA_DLY_SEL 0x01A6
148 #define MT6323_BUCK_CON0 0x0200
149 #define MT6323_BUCK_CON1 0x0202
150 #define MT6323_BUCK_CON2 0x0204
151 #define MT6323_BUCK_CON3 0x0206
152 #define MT6323_BUCK_CON4 0x0208
153 #define MT6323_BUCK_CON5 0x020A
154 #define MT6323_VPROC_CON0 0x020C
155 #define MT6323_VPROC_CON1 0x020E
156 #define MT6323_VPROC_CON2 0x0210
157 #define MT6323_VPROC_CON3 0x0212
158 #define MT6323_VPROC_CON4 0x0214
159 #define MT6323_VPROC_CON5 0x0216
160 #define MT6323_VPROC_CON7 0x021A
161 #define MT6323_VPROC_CON8 0x021C
162 #define MT6323_VPROC_CON9 0x021E
163 #define MT6323_VPROC_CON10 0x0220
164 #define MT6323_VPROC_CON11 0x0222
165 #define MT6323_VPROC_CON12 0x0224
166 #define MT6323_VPROC_CON13 0x0226
167 #define MT6323_VPROC_CON14 0x0228
168 #define MT6323_VPROC_CON15 0x022A
169 #define MT6323_VPROC_CON18 0x0230
170 #define MT6323_VSYS_CON0 0x0232
171 #define MT6323_VSYS_CON1 0x0234
172 #define MT6323_VSYS_CON2 0x0236
173 #define MT6323_VSYS_CON3 0x0238
174 #define MT6323_VSYS_CON4 0x023A
175 #define MT6323_VSYS_CON5 0x023C
176 #define MT6323_VSYS_CON7 0x0240
177 #define MT6323_VSYS_CON8 0x0242
178 #define MT6323_VSYS_CON9 0x0244
179 #define MT6323_VSYS_CON10 0x0246
180 #define MT6323_VSYS_CON11 0x0248
181 #define MT6323_VSYS_CON12 0x024A
182 #define MT6323_VSYS_CON13 0x024C
183 #define MT6323_VSYS_CON14 0x024E
184 #define MT6323_VSYS_CON15 0x0250
185 #define MT6323_VSYS_CON18 0x0256
186 #define MT6323_VPA_CON0 0x0300
187 #define MT6323_VPA_CON1 0x0302
188 #define MT6323_VPA_CON2 0x0304
189 #define MT6323_VPA_CON3 0x0306
190 #define MT6323_VPA_CON4 0x0308
191 #define MT6323_VPA_CON5 0x030A
192 #define MT6323_VPA_CON7 0x030E
193 #define MT6323_VPA_CON8 0x0310
194 #define MT6323_VPA_CON9 0x0312
195 #define MT6323_VPA_CON10 0x0314
196 #define MT6323_VPA_CON11 0x0316
197 #define MT6323_VPA_CON12 0x0318
198 #define MT6323_VPA_CON14 0x031C
199 #define MT6323_VPA_CON16 0x0320
200 #define MT6323_VPA_CON17 0x0322
201 #define MT6323_VPA_CON18 0x0324
202 #define MT6323_VPA_CON19 0x0326
203 #define MT6323_VPA_CON20 0x0328
204 #define MT6323_BUCK_K_CON0 0x032A
205 #define MT6323_BUCK_K_CON1 0x032C
206 #define MT6323_BUCK_K_CON2 0x032E
207 #define MT6323_ISINK0_CON0 0x0330
208 #define MT6323_ISINK0_CON1 0x0332
209 #define MT6323_ISINK0_CON2 0x0334
210 #define MT6323_ISINK0_CON3 0x0336
211 #define MT6323_ISINK1_CON0 0x0338
212 #define MT6323_ISINK1_CON1 0x033A
213 #define MT6323_ISINK1_CON2 0x033C
214 #define MT6323_ISINK1_CON3 0x033E
215 #define MT6323_ISINK2_CON0 0x0340
216 #define MT6323_ISINK2_CON1 0x0342
217 #define MT6323_ISINK2_CON2 0x0344
218 #define MT6323_ISINK2_CON3 0x0346
219 #define MT6323_ISINK3_CON0 0x0348
220 #define MT6323_ISINK3_CON1 0x034A
221 #define MT6323_ISINK3_CON2 0x034C
222 #define MT6323_ISINK3_CON3 0x034E
223 #define MT6323_ISINK_ANA0 0x0350
224 #define MT6323_ISINK_ANA1 0x0352
225 #define MT6323_ISINK_PHASE_DLY 0x0354
226 #define MT6323_ISINK_EN_CTRL 0x0356
227 #define MT6323_ANALDO_CON0 0x0400
228 #define MT6323_ANALDO_CON1 0x0402
229 #define MT6323_ANALDO_CON2 0x0404
230 #define MT6323_ANALDO_CON3 0x0406
231 #define MT6323_ANALDO_CON4 0x0408
232 #define MT6323_ANALDO_CON5 0x040A
233 #define MT6323_ANALDO_CON6 0x040C
234 #define MT6323_ANALDO_CON7 0x040E
235 #define MT6323_ANALDO_CON8 0x0410
236 #define MT6323_ANALDO_CON10 0x0412
237 #define MT6323_ANALDO_CON15 0x0414
238 #define MT6323_ANALDO_CON16 0x0416
239 #define MT6323_ANALDO_CON17 0x0418
240 #define MT6323_ANALDO_CON18 0x041A
241 #define MT6323_ANALDO_CON19 0x041C
242 #define MT6323_ANALDO_CON20 0x041E
243 #define MT6323_ANALDO_CON21 0x0420
244 #define MT6323_DIGLDO_CON0 0x0500
245 #define MT6323_DIGLDO_CON2 0x0502
246 #define MT6323_DIGLDO_CON3 0x0504
247 #define MT6323_DIGLDO_CON5 0x0506
248 #define MT6323_DIGLDO_CON6 0x0508
249 #define MT6323_DIGLDO_CON7 0x050A
250 #define MT6323_DIGLDO_CON8 0x050C
251 #define MT6323_DIGLDO_CON9 0x050E
252 #define MT6323_DIGLDO_CON10 0x0510
253 #define MT6323_DIGLDO_CON11 0x0512
254 #define MT6323_DIGLDO_CON12 0x0514
255 #define MT6323_DIGLDO_CON13 0x0516
256 #define MT6323_DIGLDO_CON14 0x0518
257 #define MT6323_DIGLDO_CON15 0x051A
258 #define MT6323_DIGLDO_CON16 0x051C
259 #define MT6323_DIGLDO_CON17 0x051E
260 #define MT6323_DIGLDO_CON18 0x0520
261 #define MT6323_DIGLDO_CON19 0x0522
262 #define MT6323_DIGLDO_CON20 0x0524
263 #define MT6323_DIGLDO_CON21 0x0526
264 #define MT6323_DIGLDO_CON23 0x0528
265 #define MT6323_DIGLDO_CON24 0x052A
266 #define MT6323_DIGLDO_CON26 0x052C
267 #define MT6323_DIGLDO_CON27 0x052E
268 #define MT6323_DIGLDO_CON28 0x0530
269 #define MT6323_DIGLDO_CON29 0x0532
270 #define MT6323_DIGLDO_CON30 0x0534
271 #define MT6323_DIGLDO_CON31 0x0536
272 #define MT6323_DIGLDO_CON32 0x0538
273 #define MT6323_DIGLDO_CON33 0x053A
274 #define MT6323_DIGLDO_CON34 0x053C
275 #define MT6323_DIGLDO_CON35 0x053E
276 #define MT6323_DIGLDO_CON36 0x0540
277 #define MT6323_DIGLDO_CON39 0x0542
278 #define MT6323_DIGLDO_CON40 0x0544
279 #define MT6323_DIGLDO_CON41 0x0546
280 #define MT6323_DIGLDO_CON42 0x0548
281 #define MT6323_DIGLDO_CON43 0x054A
282 #define MT6323_DIGLDO_CON44 0x054C
283 #define MT6323_DIGLDO_CON45 0x054E
284 #define MT6323_DIGLDO_CON46 0x0550
285 #define MT6323_DIGLDO_CON47 0x0552
286 #define MT6323_DIGLDO_CON48 0x0554
287 #define MT6323_DIGLDO_CON49 0x0556
288 #define MT6323_DIGLDO_CON50 0x0558
289 #define MT6323_DIGLDO_CON51 0x055A
290 #define MT6323_DIGLDO_CON52 0x055C
291 #define MT6323_DIGLDO_CON53 0x055E
292 #define MT6323_DIGLDO_CON54 0x0560
293 #define MT6323_EFUSE_CON0 0x0600
294 #define MT6323_EFUSE_CON1 0x0602
295 #define MT6323_EFUSE_CON2 0x0604
296 #define MT6323_EFUSE_CON3 0x0606
297 #define MT6323_EFUSE_CON4 0x0608
298 #define MT6323_EFUSE_CON5 0x060A
299 #define MT6323_EFUSE_CON6 0x060C
300 #define MT6323_EFUSE_VAL_0_15 0x060E
301 #define MT6323_EFUSE_VAL_16_31 0x0610
302 #define MT6323_EFUSE_VAL_32_47 0x0612
303 #define MT6323_EFUSE_VAL_48_63 0x0614
304 #define MT6323_EFUSE_VAL_64_79 0x0616
305 #define MT6323_EFUSE_VAL_80_95 0x0618
306 #define MT6323_EFUSE_VAL_96_111 0x061A
307 #define MT6323_EFUSE_VAL_112_127 0x061C
308 #define MT6323_EFUSE_VAL_128_143 0x061E
309 #define MT6323_EFUSE_VAL_144_159 0x0620
310 #define MT6323_EFUSE_VAL_160_175 0x0622
311 #define MT6323_EFUSE_VAL_176_191 0x0624
312 #define MT6323_EFUSE_DOUT_0_15 0x0626
313 #define MT6323_EFUSE_DOUT_16_31 0x0628
314 #define MT6323_EFUSE_DOUT_32_47 0x062A
315 #define MT6323_EFUSE_DOUT_48_63 0x062C
316 #define MT6323_EFUSE_DOUT_64_79 0x062E
317 #define MT6323_EFUSE_DOUT_80_95 0x0630
318 #define MT6323_EFUSE_DOUT_96_111 0x0632
319 #define MT6323_EFUSE_DOUT_112_127 0x0634
320 #define MT6323_EFUSE_DOUT_128_143 0x0636
321 #define MT6323_EFUSE_DOUT_144_159 0x0638
322 #define MT6323_EFUSE_DOUT_160_175 0x063A
323 #define MT6323_EFUSE_DOUT_176_191 0x063C
324 #define MT6323_EFUSE_CON7 0x063E
325 #define MT6323_EFUSE_CON8 0x0640
326 #define MT6323_EFUSE_CON9 0x0642
327 #define MT6323_RTC_MIX_CON0 0x0644
328 #define MT6323_RTC_MIX_CON1 0x0646
329 #define MT6323_AUDTOP_CON0 0x0700
330 #define MT6323_AUDTOP_CON1 0x0702
331 #define MT6323_AUDTOP_CON2 0x0704
332 #define MT6323_AUDTOP_CON3 0x0706
333 #define MT6323_AUDTOP_CON4 0x0708
334 #define MT6323_AUDTOP_CON5 0x070A
335 #define MT6323_AUDTOP_CON6 0x070C
336 #define MT6323_AUDTOP_CON7 0x070E
337 #define MT6323_AUDTOP_CON8 0x0710
338 #define MT6323_AUDTOP_CON9 0x0712
339 #define MT6323_AUXADC_ADC0 0x0714
340 #define MT6323_AUXADC_ADC1 0x0716
341 #define MT6323_AUXADC_ADC2 0x0718
342 #define MT6323_AUXADC_ADC3 0x071A
343 #define MT6323_AUXADC_ADC4 0x071C
344 #define MT6323_AUXADC_ADC5 0x071E
345 #define MT6323_AUXADC_ADC6 0x0720
346 #define MT6323_AUXADC_ADC7 0x0722
347 #define MT6323_AUXADC_ADC8 0x0724
348 #define MT6323_AUXADC_ADC9 0x0726
349 #define MT6323_AUXADC_ADC10 0x0728
350 #define MT6323_AUXADC_ADC11 0x072A
351 #define MT6323_AUXADC_ADC12 0x072C
352 #define MT6323_AUXADC_ADC13 0x072E
353 #define MT6323_AUXADC_ADC14 0x0730
354 #define MT6323_AUXADC_ADC15 0x0732
355 #define MT6323_AUXADC_ADC16 0x0734
356 #define MT6323_AUXADC_ADC17 0x0736
357 #define MT6323_AUXADC_ADC18 0x0738
358 #define MT6323_AUXADC_ADC19 0x073A
359 #define MT6323_AUXADC_ADC20 0x073C
360 #define MT6323_AUXADC_RSV1 0x073E
361 #define MT6323_AUXADC_RSV2 0x0740
362 #define MT6323_AUXADC_CON0 0x0742
363 #define MT6323_AUXADC_CON1 0x0744
364 #define MT6323_AUXADC_CON2 0x0746
365 #define MT6323_AUXADC_CON3 0x0748
366 #define MT6323_AUXADC_CON4 0x074A
367 #define MT6323_AUXADC_CON5 0x074C
368 #define MT6323_AUXADC_CON6 0x074E
369 #define MT6323_AUXADC_CON7 0x0750
370 #define MT6323_AUXADC_CON8 0x0752
371 #define MT6323_AUXADC_CON9 0x0754
372 #define MT6323_AUXADC_CON10 0x0756
373 #define MT6323_AUXADC_CON11 0x0758
374 #define MT6323_AUXADC_CON12 0x075A
375 #define MT6323_AUXADC_CON13 0x075C
376 #define MT6323_AUXADC_CON14 0x075E
377 #define MT6323_AUXADC_CON15 0x0760
378 #define MT6323_AUXADC_CON16 0x0762
379 #define MT6323_AUXADC_CON17 0x0764
380 #define MT6323_AUXADC_CON18 0x0766
381 #define MT6323_AUXADC_CON19 0x0768
382 #define MT6323_AUXADC_CON20 0x076A
383 #define MT6323_AUXADC_CON21 0x076C
384 #define MT6323_AUXADC_CON22 0x076E
385 #define MT6323_AUXADC_CON23 0x0770
386 #define MT6323_AUXADC_CON24 0x0772
387 #define MT6323_AUXADC_CON25 0x0774
388 #define MT6323_AUXADC_CON26 0x0776
389 #define MT6323_AUXADC_CON27 0x0778
390 #define MT6323_ACCDET_CON0 0x077A
391 #define MT6323_ACCDET_CON1 0x077C
392 #define MT6323_ACCDET_CON2 0x077E
393 #define MT6323_ACCDET_CON3 0x0780
394 #define MT6323_ACCDET_CON4 0x0782
395 #define MT6323_ACCDET_CON5 0x0784
396 #define MT6323_ACCDET_CON6 0x0786
397 #define MT6323_ACCDET_CON7 0x0788
398 #define MT6323_ACCDET_CON8 0x078A
399 #define MT6323_ACCDET_CON9 0x078C
400 #define MT6323_ACCDET_CON10 0x078E
401 #define MT6323_ACCDET_CON11 0x0790
402 #define MT6323_ACCDET_CON12 0x0792
403 #define MT6323_ACCDET_CON13 0x0794
404 #define MT6323_ACCDET_CON14 0x0796
405 #define MT6323_ACCDET_CON15 0x0798
406 #define MT6323_ACCDET_CON16 0x079A
408 #endif /* __MFD_MT6323_REGISTERS_H__ */