1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2009 Samsung Electronics Ltd.
5 * Jaswinder Singh <jassi.brar@samsung.com>
8 #ifndef __SPI_S3C64XX_H
9 #define __SPI_S3C64XX_H
11 #include <linux/dmaengine.h>
13 struct platform_device
;
16 * struct s3c64xx_spi_csinfo - ChipSelect description
17 * @fb_delay: Slave specific feedback delay.
18 * Refer to FB_CLK_SEL register definition in SPI chapter.
19 * @line: Custom 'identity' of the CS line.
21 * This is per SPI-Slave Chipselect information.
22 * Allocate and initialize one in machine init code and make the
23 * spi_board_info.controller_data point to it.
25 struct s3c64xx_spi_csinfo
{
31 * struct s3c64xx_spi_info - SPI Controller defining structure
32 * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
33 * @num_cs: Number of CS this controller emulates.
34 * @cfg_gpio: Configure pins for this SPI controller.
36 struct s3c64xx_spi_info
{
40 int (*cfg_gpio
)(void);
44 * s3c64xx_spi_set_platdata - SPI Controller configure callback by the board
45 * initialization code.
46 * @cfg_gpio: Pointer to gpio setup function.
47 * @src_clk_nr: Clock the SPI controller is to use to generate SPI clocks.
48 * @num_cs: Number of elements in the 'cs' array.
50 * Call this from machine init code for each SPI Controller that
51 * has some chips attached to it.
53 extern void s3c64xx_spi0_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
55 extern void s3c64xx_spi1_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
57 extern void s3c64xx_spi2_set_platdata(int (*cfg_gpio
)(void), int src_clk_nr
,
60 /* defined by architecture to configure gpio */
61 extern int s3c64xx_spi0_cfg_gpio(void);
62 extern int s3c64xx_spi1_cfg_gpio(void);
63 extern int s3c64xx_spi2_cfg_gpio(void);
65 extern struct s3c64xx_spi_info s3c64xx_spi0_pdata
;
66 extern struct s3c64xx_spi_info s3c64xx_spi1_pdata
;
67 extern struct s3c64xx_spi_info s3c64xx_spi2_pdata
;
68 #endif /*__SPI_S3C64XX_H */