include/linux/platform_data/ti-sysc.h

   1 #ifndef __TI_SYSC_DATA_H__
   2 #define __TI_SYSC_DATA_H__
   3
   4 enum ti_sysc_module_type {
   5         TI_SYSC_OMAP2,
   6         TI_SYSC_OMAP2_TIMER,
   7         TI_SYSC_OMAP3_SHAM,
   8         TI_SYSC_OMAP3_AES,
   9         TI_SYSC_OMAP4,
  10         TI_SYSC_OMAP4_TIMER,
  11         TI_SYSC_OMAP4_SIMPLE,
  12         TI_SYSC_OMAP34XX_SR,
  13         TI_SYSC_OMAP36XX_SR,
  14         TI_SYSC_OMAP4_SR,
  15         TI_SYSC_OMAP4_MCASP,
  16         TI_SYSC_OMAP4_USB_HOST_FS,
  17 };
  18
  19 /**
  20  * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
  21  * @midle_shift: Offset of the midle bit
  22  * @clkact_shift: Offset of the clockactivity bit
  23  * @sidle_shift: Offset of the sidle bit
  24  * @enwkup_shift: Offset of the enawakeup bit
  25  * @srst_shift: Offset of the softreset bit
  26  * @autoidle_shift: Offset of the autoidle bit
  27  * @dmadisable_shift: Offset of the dmadisable bit
  28  * @emufree_shift; Offset of the emufree bit
  29  *
  30  * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
  31  * feature is not available.
  32  */
  33 struct sysc_regbits {
  34         s8 midle_shift;
  35         s8 clkact_shift;
  36         s8 sidle_shift;
  37         s8 enwkup_shift;
  38         s8 srst_shift;
  39         s8 autoidle_shift;
  40         s8 dmadisable_shift;
  41         s8 emufree_shift;
  42 };
  43
  44 #define SYSC_QUIRK_RESET_STATUS         BIT(7)
  45 #define SYSC_QUIRK_NO_IDLE_ON_INIT      BIT(6)
  46 #define SYSC_QUIRK_NO_RESET_ON_INIT     BIT(5)
  47 #define SYSC_QUIRK_OPT_CLKS_NEEDED      BIT(4)
  48 #define SYSC_QUIRK_OPT_CLKS_IN_RESET    BIT(3)
  49 #define SYSC_QUIRK_16BIT                BIT(2)
  50 #define SYSC_QUIRK_UNCACHED             BIT(1)
  51 #define SYSC_QUIRK_USE_CLOCKACT         BIT(0)
  52
  53 #define SYSC_NR_IDLEMODES               4
  54
  55 /**
  56  * struct sysc_capabilities - capabilities for an interconnect target module
  57  *
  58  * @sysc_mask: bitmask of supported SYSCONFIG register bits
  59  * @regbits: bitmask of SYSCONFIG register bits
  60  * @mod_quirks: bitmask of module specific quirks
  61  */
  62 struct sysc_capabilities {
  63         const enum ti_sysc_module_type type;
  64         const u32 sysc_mask;
  65         const struct sysc_regbits *regbits;
  66         const u32 mod_quirks;
  67 };
  68
  69 /**
  70  * struct sysc_config - configuration for an interconnect target module
  71  * @sysc_val: configured value for sysc register
  72  * @midlemodes: bitmask of supported master idle modes
  73  * @sidlemodes: bitmask of supported master idle modes
  74  * @srst_udelay: optional delay needed after OCP soft reset
  75  * @quirks: bitmask of enabled quirks
  76  */
  77 struct sysc_config {
  78         u32 sysc_val;
  79         u32 syss_mask;
  80         u8 midlemodes;
  81         u8 sidlemodes;
  82         u8 srst_udelay;
  83         u32 quirks;
  84 };
  85
  86 #endif  /* __TI_SYSC_DATA_H__ */