2 * sh73a0 processor support
4 * Copyright (C) 2010 Takashi Yoshii
5 * Copyright (C) 2010 Magnus Damm
6 * Copyright (C) 2008 Yoshihiro Shimoda
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/input.h>
29 #include <linux/serial_sci.h>
30 #include <linux/sh_intc.h>
31 #include <linux/sh_timer.h>
32 #include <mach/hardware.h>
33 #include <asm/mach-types.h>
34 #include <asm/mach/arch.h>
36 static struct plat_sci_port scif0_platform_data
= {
37 .mapbase
= 0xe6c40000,
38 .flags
= UPF_BOOT_AUTOCONF
,
39 .scscr
= SCSCR_RE
| SCSCR_TE
,
40 .scbrr_algo_id
= SCBRR_ALGO_4
,
42 .irqs
= { gic_spi(72), gic_spi(72),
43 gic_spi(72), gic_spi(72) },
46 static struct platform_device scif0_device
= {
50 .platform_data
= &scif0_platform_data
,
54 static struct plat_sci_port scif1_platform_data
= {
55 .mapbase
= 0xe6c50000,
56 .flags
= UPF_BOOT_AUTOCONF
,
57 .scscr
= SCSCR_RE
| SCSCR_TE
,
58 .scbrr_algo_id
= SCBRR_ALGO_4
,
60 .irqs
= { gic_spi(73), gic_spi(73),
61 gic_spi(73), gic_spi(73) },
64 static struct platform_device scif1_device
= {
68 .platform_data
= &scif1_platform_data
,
72 static struct plat_sci_port scif2_platform_data
= {
73 .mapbase
= 0xe6c60000,
74 .flags
= UPF_BOOT_AUTOCONF
,
75 .scscr
= SCSCR_RE
| SCSCR_TE
,
76 .scbrr_algo_id
= SCBRR_ALGO_4
,
78 .irqs
= { gic_spi(74), gic_spi(74),
79 gic_spi(74), gic_spi(74) },
82 static struct platform_device scif2_device
= {
86 .platform_data
= &scif2_platform_data
,
90 static struct plat_sci_port scif3_platform_data
= {
91 .mapbase
= 0xe6c70000,
92 .flags
= UPF_BOOT_AUTOCONF
,
93 .scscr
= SCSCR_RE
| SCSCR_TE
,
94 .scbrr_algo_id
= SCBRR_ALGO_4
,
96 .irqs
= { gic_spi(75), gic_spi(75),
97 gic_spi(75), gic_spi(75) },
100 static struct platform_device scif3_device
= {
104 .platform_data
= &scif3_platform_data
,
108 static struct plat_sci_port scif4_platform_data
= {
109 .mapbase
= 0xe6c80000,
110 .flags
= UPF_BOOT_AUTOCONF
,
111 .scscr
= SCSCR_RE
| SCSCR_TE
,
112 .scbrr_algo_id
= SCBRR_ALGO_4
,
114 .irqs
= { gic_spi(78), gic_spi(78),
115 gic_spi(78), gic_spi(78) },
118 static struct platform_device scif4_device
= {
122 .platform_data
= &scif4_platform_data
,
126 static struct plat_sci_port scif5_platform_data
= {
127 .mapbase
= 0xe6cb0000,
128 .flags
= UPF_BOOT_AUTOCONF
,
129 .scscr
= SCSCR_RE
| SCSCR_TE
,
130 .scbrr_algo_id
= SCBRR_ALGO_4
,
132 .irqs
= { gic_spi(79), gic_spi(79),
133 gic_spi(79), gic_spi(79) },
136 static struct platform_device scif5_device
= {
140 .platform_data
= &scif5_platform_data
,
144 static struct plat_sci_port scif6_platform_data
= {
145 .mapbase
= 0xe6cc0000,
146 .flags
= UPF_BOOT_AUTOCONF
,
147 .scscr
= SCSCR_RE
| SCSCR_TE
,
148 .scbrr_algo_id
= SCBRR_ALGO_4
,
150 .irqs
= { gic_spi(156), gic_spi(156),
151 gic_spi(156), gic_spi(156) },
154 static struct platform_device scif6_device
= {
158 .platform_data
= &scif6_platform_data
,
162 static struct plat_sci_port scif7_platform_data
= {
163 .mapbase
= 0xe6cd0000,
164 .flags
= UPF_BOOT_AUTOCONF
,
165 .scscr
= SCSCR_RE
| SCSCR_TE
,
166 .scbrr_algo_id
= SCBRR_ALGO_4
,
168 .irqs
= { gic_spi(143), gic_spi(143),
169 gic_spi(143), gic_spi(143) },
172 static struct platform_device scif7_device
= {
176 .platform_data
= &scif7_platform_data
,
180 static struct plat_sci_port scif8_platform_data
= {
181 .mapbase
= 0xe6c30000,
182 .flags
= UPF_BOOT_AUTOCONF
,
183 .scscr
= SCSCR_RE
| SCSCR_TE
,
184 .scbrr_algo_id
= SCBRR_ALGO_4
,
186 .irqs
= { gic_spi(80), gic_spi(80),
187 gic_spi(80), gic_spi(80) },
190 static struct platform_device scif8_device
= {
194 .platform_data
= &scif8_platform_data
,
198 static struct sh_timer_config cmt10_platform_data
= {
200 .channel_offset
= 0x10,
202 .clockevent_rating
= 125,
203 .clocksource_rating
= 125,
206 static struct resource cmt10_resources
[] = {
211 .flags
= IORESOURCE_MEM
,
214 .start
= gic_spi(65),
215 .flags
= IORESOURCE_IRQ
,
219 static struct platform_device cmt10_device
= {
223 .platform_data
= &cmt10_platform_data
,
225 .resource
= cmt10_resources
,
226 .num_resources
= ARRAY_SIZE(cmt10_resources
),
230 static struct sh_timer_config tmu00_platform_data
= {
232 .channel_offset
= 0x4,
234 .clockevent_rating
= 200,
237 static struct resource tmu00_resources
[] = {
242 .flags
= IORESOURCE_MEM
,
245 .start
= intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
246 .flags
= IORESOURCE_IRQ
,
250 static struct platform_device tmu00_device
= {
254 .platform_data
= &tmu00_platform_data
,
256 .resource
= tmu00_resources
,
257 .num_resources
= ARRAY_SIZE(tmu00_resources
),
260 static struct sh_timer_config tmu01_platform_data
= {
262 .channel_offset
= 0x10,
264 .clocksource_rating
= 200,
267 static struct resource tmu01_resources
[] = {
272 .flags
= IORESOURCE_MEM
,
275 .start
= intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
276 .flags
= IORESOURCE_IRQ
,
280 static struct platform_device tmu01_device
= {
284 .platform_data
= &tmu01_platform_data
,
286 .resource
= tmu01_resources
,
287 .num_resources
= ARRAY_SIZE(tmu01_resources
),
290 static struct resource i2c0_resources
[] = {
294 .end
= 0xe6820425 - 1,
295 .flags
= IORESOURCE_MEM
,
298 .start
= gic_spi(167),
300 .flags
= IORESOURCE_IRQ
,
304 static struct resource i2c1_resources
[] = {
308 .end
= 0xe6822425 - 1,
309 .flags
= IORESOURCE_MEM
,
312 .start
= gic_spi(51),
314 .flags
= IORESOURCE_IRQ
,
318 static struct resource i2c2_resources
[] = {
322 .end
= 0xe6824425 - 1,
323 .flags
= IORESOURCE_MEM
,
326 .start
= gic_spi(171),
328 .flags
= IORESOURCE_IRQ
,
332 static struct resource i2c3_resources
[] = {
336 .end
= 0xe6826425 - 1,
337 .flags
= IORESOURCE_MEM
,
340 .start
= gic_spi(183),
342 .flags
= IORESOURCE_IRQ
,
346 static struct resource i2c4_resources
[] = {
350 .end
= 0xe6828425 - 1,
351 .flags
= IORESOURCE_MEM
,
354 .start
= gic_spi(187),
356 .flags
= IORESOURCE_IRQ
,
360 static struct platform_device i2c0_device
= {
361 .name
= "i2c-sh_mobile",
363 .resource
= i2c0_resources
,
364 .num_resources
= ARRAY_SIZE(i2c0_resources
),
367 static struct platform_device i2c1_device
= {
368 .name
= "i2c-sh_mobile",
370 .resource
= i2c1_resources
,
371 .num_resources
= ARRAY_SIZE(i2c1_resources
),
374 static struct platform_device i2c2_device
= {
375 .name
= "i2c-sh_mobile",
377 .resource
= i2c2_resources
,
378 .num_resources
= ARRAY_SIZE(i2c2_resources
),
381 static struct platform_device i2c3_device
= {
382 .name
= "i2c-sh_mobile",
384 .resource
= i2c3_resources
,
385 .num_resources
= ARRAY_SIZE(i2c3_resources
),
388 static struct platform_device i2c4_device
= {
389 .name
= "i2c-sh_mobile",
391 .resource
= i2c4_resources
,
392 .num_resources
= ARRAY_SIZE(i2c4_resources
),
395 static struct platform_device
*sh73a0_early_devices
[] __initdata
= {
410 static struct platform_device
*sh73a0_late_devices
[] __initdata
= {
418 void __init
sh73a0_add_standard_devices(void)
420 platform_add_devices(sh73a0_early_devices
,
421 ARRAY_SIZE(sh73a0_early_devices
));
422 platform_add_devices(sh73a0_late_devices
,
423 ARRAY_SIZE(sh73a0_late_devices
));
426 void __init
sh73a0_add_early_devices(void)
428 early_platform_add_devices(sh73a0_early_devices
,
429 ARRAY_SIZE(sh73a0_early_devices
));