include/asm-mips/it8172/it8172_cir.h

   1 /*
   2  *
   3  * BRIEF MODULE DESCRIPTION
   4  *      IT8172 Consumer IR port defines.
   5  *
   6  * Copyright 2001 MontaVista Software Inc.
   7  * Author: MontaVista Software, Inc.
   8  *              ppopov@mvista.com or source@mvista.com
   9  *
  10  *  This program is free software; you can redistribute  it and/or modify it
  11  *  under  the terms of  the GNU General  Public License as published by the
  12  *  Free Software Foundation;  either version 2 of the  License, or (at your
  13  *  option) any later version.
  14  *
  15  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  16  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  17  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  18  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  19  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  21  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  22  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  23  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  *  You should have received a copy of the  GNU General Public License along
  27  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  28  *  675 Mass Ave, Cambridge, MA 02139, USA.
  29  */
  30
  31 #define NUM_CIR_PORTS 2
  32
  33 /* Master Control Register */
  34 #define CIR_RESET              0x1
  35 #define CIR_FIFO_CLEAR         0x2
  36 #define CIR_SET_FIFO_TL(x)     (((x)&0x3)<<2)
  37 #define CIR_ILE                0x10
  38 #define CIR_ILSEL              0x20
  39
  40 /* Interrupt Enable Register */
  41 #define CIR_TLDLIE             0x1
  42 #define CIR_RDAIE              0x2
  43 #define CIR_RFOIE              0x4
  44 #define CIR_IEC                0x80
  45
  46 /* Interrupt Identification Register */
  47 #define CIR_TLDLI              0x1
  48 #define CIR_RDAI               0x2
  49 #define CIR_RFOI               0x4
  50 #define CIR_NIP                0x80
  51
  52 /* Carrier Frequency Register */
  53 #define CIR_SET_CF(x)          ((x)&0x1f)
  54   #define CFQ_38_480           0xB       /* 38 KHz low, 480 KHz high */
  55 #define CIR_HCFS               0x20
  56   #define CIR_SET_HS(x)        (((x)&0x1)<<5)
  57
  58
  59 /* Receiver Control Register */
  60 #define CIR_SET_RXDCR(x)       ((x)&0x7)
  61 #define CIR_RXACT              0x8
  62 #define CIR_RXEND              0x10
  63 #define CIR_RDWOS              0x20
  64   #define CIR_SET_RDWOS(x)     (((x)&0x1)<<5)
  65 #define CIR_RXEN               0x80
  66
  67 /* Transmitter Control Register */
  68 #define CIR_SET_TXMPW(x)       ((x)&0x7)
  69 #define CIR_SET_TXMPM(x)       (((x)&0x3)<<3)
  70 #define CIR_TXENDF             0x20
  71 #define CIR_TXRLE              0x40
  72
  73 /* Receiver FIFO Status Register */
  74 #define CIR_RXFBC_MASK         0x3f
  75 #define CIR_RXFTO              0x80
  76
  77 /* Wakeup Code Length Register */
  78 #define CIR_SET_WCL            ((x)&0x3f)
  79 #define CIR_WCL_MASK(x)        ((x)&0x3f)
  80
  81 /* Wakeup Power Control/Status Register */
  82 #define CIR_BTMON              0x2
  83 #define CIR_CIRON              0x4
  84 #define CIR_RCRST              0x10
  85 #define CIR_WCRST              0x20
  86
  87 struct cir_port {
  88         int port;
  89         unsigned short baud_rate;
  90         unsigned char fifo_tl;
  91         unsigned char cfq;
  92         unsigned char hcfs;
  93         unsigned char rdwos;
  94         unsigned char rxdcr;
  95 };
  96
  97 struct it8172_cir_regs {
  98         unsigned char dr;       /* data                        */
  99         char pad;
 100         unsigned char mstcr;    /* master control              */
 101         char pad1;
 102         unsigned char ier;      /* interrupt enable            */
 103         char pad2;
 104         unsigned char iir;      /* interrupt identification    */
 105         char pad3;
 106         unsigned char cfr;      /* carrier frequency           */
 107         char pad4;
 108         unsigned char rcr;      /* receiver control            */
 109         char pad5;
 110         unsigned char tcr;      /* transmitter control         */
 111         char pad6;
 112         char pad7;
 113         char pad8;
 114         unsigned char bdlr;     /* baud rate divisor low byte  */
 115         char pad9;
 116         unsigned char bdhr;     /* baud rate divisor high byte */
 117         char pad10;
 118         unsigned char tfsr;     /* tx fifo byte count          */
 119         char pad11;
 120         unsigned char rfsr;     /* rx fifo status              */
 121         char pad12;
 122         unsigned char wcl;      /* wakeup code length          */
 123         char pad13;
 124         unsigned char wcr;      /* wakeup code read/write      */
 125         char pad14;
 126         unsigned char wps;      /* wakeup power control/status */
 127 };
 128
 129 int cir_port_init(struct cir_port *cir);
 130 extern void clear_fifo(struct cir_port *cir);
 131 extern void enable_receiver(struct cir_port *cir);
 132 extern void disable_receiver(struct cir_port *cir);
 133 extern void enable_rx_demodulation(struct cir_port *cir);
 134 extern void disable_rx_demodulation(struct cir_port *cir);
 135 extern void set_rx_active(struct cir_port *cir);
 136 extern void int_enable(struct cir_port *cir);
 137 extern void rx_int_enable(struct cir_port *cir);
 138 extern char get_int_status(struct cir_port *cir);
 139 extern int cir_get_rx_count(struct cir_port *cir);
 140 extern char cir_read_data(struct cir_port *cir);