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signal: Document glibc's si_code of SI_ASYNCNL
[cris-mirror.git] / drivers / scsi / lpfc / lpfc.h
blob231302273257e2be64041cf220be9d23f8f1c45d
1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Limited and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <scsi/scsi_host.h>
25 #include <linux/ktime.h>
26 #include <linux/workqueue.h>
27
28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
29 #define CONFIG_SCSI_LPFC_DEBUG_FS
30 #endif
31
32 struct lpfc_sli2_slim;
33
34 #define ELX_MODEL_NAME_SIZE 80
35
36 #define LPFC_PCI_DEV_LP 0x1
37 #define LPFC_PCI_DEV_OC 0x2
38
39 #define LPFC_SLI_REV2 2
40 #define LPFC_SLI_REV3 3
41 #define LPFC_SLI_REV4 4
42
43 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */
44 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
45 requests */
46 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
47 the NameServer before giving up. */
48 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
49 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
50 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
51 cmnd for menlo needs nearly twice as for firmware
52 downloads using bsg */
53
54 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
55 #define LPFC_MAX_SG_SLI4_SEG_CNT_DIF 128 /* sg element count per scsi cmnd */
56 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
57 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
58 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
59 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
60 #define LPFC_MAX_NVME_SEG_CNT 128 /* max SGL element cnt per NVME cmnd */
61
62 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
63 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
64 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
65 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */
66 #define LPFC_TGTQ_INTERVAL 40000 /* Min amount of time between tgt
67 queue depth change in millisecs */
68 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
69 #define LPFC_MIN_TGT_QDEPTH 10
70 #define LPFC_MAX_TGT_QDEPTH 0xFFFF
71
72 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
73 collection. */
74 /*
75 * Following time intervals are used of adjusting SCSI device
76 * queue depths when there are driver resource error or Firmware
77 * resource error.
78 */
79 /* 1 Second */
80 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
81
82 /* Number of exchanges reserved for discovery to complete */
83 #define LPFC_DISC_IOCB_BUFF_COUNT 20
84
85 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
86 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
87
88 #define LPFC_LOOK_AHEAD_OFF 0 /* Look ahead logic is turned off */
89
90 /* Error Attention event polling interval */
91 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
92
93 /* Define macros for 64 bit support */
94 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
95 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
96 #define getPaddr(high, low) ((dma_addr_t)( \
97 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
98 /* Provide maximum configuration definitions. */
99 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
100 #define FC_MAX_ADPTMSG 64
101
102 #define MAX_HBAEVT 32
103 #define MAX_HBAS_NO_RESET 16
104
105 /* Number of MSI-X vectors the driver uses */
106 #define LPFC_MSIX_VECTORS 2
107
108 /* lpfc wait event data ready flag */
109 #define LPFC_DATA_READY 0 /* bit 0 */
110
111 /* queue dump line buffer size */
112 #define LPFC_LBUF_SZ 128
113
114 /* mailbox system shutdown options */
115 #define LPFC_MBX_NO_WAIT 0
116 #define LPFC_MBX_WAIT 1
117
118 enum lpfc_polling_flags {
119 ENABLE_FCP_RING_POLLING = 0x1,
120 DISABLE_FCP_RING_INT = 0x2
121 };
122
123 struct perf_prof {
124 uint16_t cmd_cpu[40];
125 uint16_t rsp_cpu[40];
126 uint16_t qh_cpu[40];
127 uint16_t wqidx[40];
128 };
129
130 /*
131 * Provide for FC4 TYPE x28 - NVME. The
132 * bit mask for FCP and NVME is 0x8 identically
133 * because they are 32 bit positions distance.
134 */
135 #define LPFC_FC4_TYPE_BITMASK 0x00000100
136
137 /* Provide DMA memory definitions the driver uses per port instance. */
138 struct lpfc_dmabuf {
139 struct list_head list;
140 void *virt; /* virtual address ptr */
141 dma_addr_t phys; /* mapped address */
142 uint32_t buffer_tag; /* used for tagged queue ring */
143 };
144
145 struct lpfc_nvmet_ctxbuf {
146 struct list_head list;
147 struct lpfc_nvmet_rcv_ctx *context;
148 struct lpfc_iocbq *iocbq;
149 struct lpfc_sglq *sglq;
150 };
151
152 struct lpfc_dma_pool {
153 struct lpfc_dmabuf *elements;
154 uint32_t max_count;
155 uint32_t current_count;
156 };
157
158 struct hbq_dmabuf {
159 struct lpfc_dmabuf hbuf;
160 struct lpfc_dmabuf dbuf;
161 uint16_t total_size;
162 uint16_t bytes_recv;
163 uint32_t tag;
164 struct lpfc_cq_event cq_event;
165 unsigned long time_stamp;
166 void *context;
167 };
168
169 struct rqb_dmabuf {
170 struct lpfc_dmabuf hbuf;
171 struct lpfc_dmabuf dbuf;
172 uint16_t total_size;
173 uint16_t bytes_recv;
174 uint16_t idx;
175 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
176 struct lpfc_queue *drq; /* ptr to associated Data RQ */
177 };
178
179 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */
180 #define MEM_PRI 0x100
181
182
183 /****************************************************************************/
184 /* Device VPD save area */
185 /****************************************************************************/
186 typedef struct lpfc_vpd {
187 uint32_t status; /* vpd status value */
188 uint32_t length; /* number of bytes actually returned */
189 struct {
190 uint32_t rsvd1; /* Revision numbers */
191 uint32_t biuRev;
192 uint32_t smRev;
193 uint32_t smFwRev;
194 uint32_t endecRev;
195 uint16_t rBit;
196 uint8_t fcphHigh;
197 uint8_t fcphLow;
198 uint8_t feaLevelHigh;
199 uint8_t feaLevelLow;
200 uint32_t postKernRev;
201 uint32_t opFwRev;
202 uint8_t opFwName[16];
203 uint32_t sli1FwRev;
204 uint8_t sli1FwName[16];
205 uint32_t sli2FwRev;
206 uint8_t sli2FwName[16];
207 } rev;
208 struct {
209 #ifdef __BIG_ENDIAN_BITFIELD
210 uint32_t rsvd3 :19; /* Reserved */
211 uint32_t cdss : 1; /* Configure Data Security SLI */
212 uint32_t rsvd2 : 3; /* Reserved */
213 uint32_t cbg : 1; /* Configure BlockGuard */
214 uint32_t cmv : 1; /* Configure Max VPIs */
215 uint32_t ccrp : 1; /* Config Command Ring Polling */
216 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
217 uint32_t chbs : 1; /* Cofigure Host Backing store */
218 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
219 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
220 uint32_t cmx : 1; /* Configure Max XRIs */
221 uint32_t cmr : 1; /* Configure Max RPIs */
222 #else /* __LITTLE_ENDIAN */
223 uint32_t cmr : 1; /* Configure Max RPIs */
224 uint32_t cmx : 1; /* Configure Max XRIs */
225 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
226 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
227 uint32_t chbs : 1; /* Cofigure Host Backing store */
228 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
229 uint32_t ccrp : 1; /* Config Command Ring Polling */
230 uint32_t cmv : 1; /* Configure Max VPIs */
231 uint32_t cbg : 1; /* Configure BlockGuard */
232 uint32_t rsvd2 : 3; /* Reserved */
233 uint32_t cdss : 1; /* Configure Data Security SLI */
234 uint32_t rsvd3 :19; /* Reserved */
235 #endif
236 } sli3Feat;
237 } lpfc_vpd_t;
238
239 struct lpfc_scsi_buf;
240
241
242 /*
243 * lpfc stat counters
244 */
245 struct lpfc_stats {
246 /* Statistics for ELS commands */
247 uint32_t elsLogiCol;
248 uint32_t elsRetryExceeded;
249 uint32_t elsXmitRetry;
250 uint32_t elsDelayRetry;
251 uint32_t elsRcvDrop;
252 uint32_t elsRcvFrame;
253 uint32_t elsRcvRSCN;
254 uint32_t elsRcvRNID;
255 uint32_t elsRcvFARP;
256 uint32_t elsRcvFARPR;
257 uint32_t elsRcvFLOGI;
258 uint32_t elsRcvPLOGI;
259 uint32_t elsRcvADISC;
260 uint32_t elsRcvPDISC;
261 uint32_t elsRcvFAN;
262 uint32_t elsRcvLOGO;
263 uint32_t elsRcvPRLO;
264 uint32_t elsRcvPRLI;
265 uint32_t elsRcvLIRR;
266 uint32_t elsRcvRLS;
267 uint32_t elsRcvRPS;
268 uint32_t elsRcvRPL;
269 uint32_t elsRcvRRQ;
270 uint32_t elsRcvRTV;
271 uint32_t elsRcvECHO;
272 uint32_t elsRcvLCB;
273 uint32_t elsRcvRDP;
274 uint32_t elsXmitFLOGI;
275 uint32_t elsXmitFDISC;
276 uint32_t elsXmitPLOGI;
277 uint32_t elsXmitPRLI;
278 uint32_t elsXmitADISC;
279 uint32_t elsXmitLOGO;
280 uint32_t elsXmitSCR;
281 uint32_t elsXmitRNID;
282 uint32_t elsXmitFARP;
283 uint32_t elsXmitFARPR;
284 uint32_t elsXmitACC;
285 uint32_t elsXmitLSRJT;
286
287 uint32_t frameRcvBcast;
288 uint32_t frameRcvMulti;
289 uint32_t strayXmitCmpl;
290 uint32_t frameXmitDelay;
291 uint32_t xriCmdCmpl;
292 uint32_t xriStatErr;
293 uint32_t LinkUp;
294 uint32_t LinkDown;
295 uint32_t LinkMultiEvent;
296 uint32_t NoRcvBuf;
297 uint32_t fcpCmd;
298 uint32_t fcpCmpl;
299 uint32_t fcpRspErr;
300 uint32_t fcpRemoteStop;
301 uint32_t fcpPortRjt;
302 uint32_t fcpPortBusy;
303 uint32_t fcpError;
304 uint32_t fcpLocalErr;
305 };
306
307 struct lpfc_hba;
308
309
310 enum discovery_state {
311 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
312 LPFC_VPORT_FAILED = 1, /* vport has failed */
313 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
314 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
315 LPFC_FDISC = 8, /* FDISC sent for vport */
316 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
317 * configured */
318 LPFC_NS_REG = 10, /* Register with NameServer */
319 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
320 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
321 * device authentication / discovery */
322 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
323 LPFC_VPORT_READY = 32,
324 };
325
326 enum hba_state {
327 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
328 LPFC_WARM_START = 1, /* HBA state after selective reset */
329 LPFC_INIT_START = 2, /* Initial state after board reset */
330 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
331 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
332 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
333 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
334 * CLEAR_LA */
335 LPFC_HBA_READY = 32,
336 LPFC_HBA_ERROR = -1
337 };
338
339 struct lpfc_vport {
340 struct lpfc_hba *phba;
341 struct list_head listentry;
342 uint8_t port_type;
343 #define LPFC_PHYSICAL_PORT 1
344 #define LPFC_NPIV_PORT 2
345 #define LPFC_FABRIC_PORT 3
346 enum discovery_state port_state;
347
348 uint16_t vpi;
349 uint16_t vfi;
350 uint8_t vpi_state;
351 #define LPFC_VPI_REGISTERED 0x1
352
353 uint32_t fc_flag; /* FC flags */
354 /* Several of these flags are HBA centric and should be moved to
355 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
356 */
357 #define FC_PT2PT 0x1 /* pt2pt with no fabric */
358 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
359 #define FC_DISC_TMO 0x4 /* Discovery timer running */
360 #define FC_PUBLIC_LOOP 0x8 /* Public loop */
361 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
362 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
363 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */
364 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
365 #define FC_FABRIC 0x100 /* We are fabric attached */
366 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
367 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
368 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
369 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
370 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
371 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
372 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
373 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
374 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
375 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
376 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
377 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
378 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
379 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
380
381 uint32_t ct_flags;
382 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
383 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
384 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
385 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
386 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
387
388 struct list_head fc_nodes;
389
390 /* Keep counters for the number of entries in each list. */
391 uint16_t fc_plogi_cnt;
392 uint16_t fc_adisc_cnt;
393 uint16_t fc_reglogin_cnt;
394 uint16_t fc_prli_cnt;
395 uint16_t fc_unmap_cnt;
396 uint16_t fc_map_cnt;
397 uint16_t fc_npr_cnt;
398 uint16_t fc_unused_cnt;
399 struct serv_parm fc_sparam; /* buffer for our service parameters */
400
401 uint32_t fc_myDID; /* fibre channel S_ID */
402 uint32_t fc_prevDID; /* previous fibre channel S_ID */
403 struct lpfc_name fabric_portname;
404 struct lpfc_name fabric_nodename;
405
406 int32_t stopped; /* HBA has not been restarted since last ERATT */
407 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
408
409 uint32_t num_disc_nodes; /* in addition to hba_state */
410 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
411
412 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
413 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
414 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
415 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
416 struct lpfc_name fc_nodename; /* fc nodename */
417 struct lpfc_name fc_portname; /* fc portname */
418
419 struct lpfc_work_evt disc_timeout_evt;
420
421 struct timer_list fc_disctmo; /* Discovery rescue timer */
422 uint8_t fc_ns_retry; /* retries for fabric nameserver */
423 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
424
425 spinlock_t work_port_lock;
426 uint32_t work_port_events; /* Timeout to be handled */
427 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
428 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
429 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
430
431 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
432 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
433 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
434 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
435 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
436 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
437
438 struct timer_list els_tmofunc;
439 struct timer_list delayed_disc_tmo;
440
441 int unreg_vpi_cmpl;
442
443 uint8_t load_flag;
444 #define FC_LOADING 0x1 /* HBA in process of loading drvr */
445 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
446 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
447 /* Vport Config Parameters */
448 uint32_t cfg_scan_down;
449 uint32_t cfg_lun_queue_depth;
450 uint32_t cfg_nodev_tmo;
451 uint32_t cfg_devloss_tmo;
452 uint32_t cfg_restrict_login;
453 uint32_t cfg_peer_port_login;
454 uint32_t cfg_fcp_class;
455 uint32_t cfg_use_adisc;
456 uint32_t cfg_discovery_threads;
457 uint32_t cfg_log_verbose;
458 uint32_t cfg_max_luns;
459 uint32_t cfg_enable_da_id;
460 uint32_t cfg_max_scsicmpl_time;
461 uint32_t cfg_tgt_queue_depth;
462 uint32_t cfg_first_burst_size;
463 uint32_t dev_loss_tmo_changed;
464
465 struct fc_vport *fc_vport;
466
467 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
468 struct dentry *debug_disc_trc;
469 struct dentry *debug_nodelist;
470 struct dentry *debug_nvmestat;
471 struct dentry *debug_nvmektime;
472 struct dentry *debug_cpucheck;
473 struct dentry *vport_debugfs_root;
474 struct lpfc_debugfs_trc *disc_trc;
475 atomic_t disc_trc_cnt;
476 #endif
477 uint8_t stat_data_enabled;
478 uint8_t stat_data_blocked;
479 struct list_head rcv_buffer_list;
480 unsigned long rcv_buffer_time_stamp;
481 uint32_t vport_flag;
482 #define STATIC_VPORT 1
483 #define FAWWPN_SET 2
484 #define FAWWPN_PARAM_CHG 4
485
486 uint16_t fdmi_num_disc;
487 uint32_t fdmi_hba_mask;
488 uint32_t fdmi_port_mask;
489
490 /* There is a single nvme instance per vport. */
491 struct nvme_fc_local_port *localport;
492 uint8_t nvmei_support; /* driver supports NVME Initiator */
493 uint32_t last_fcp_wqidx;
494 };
495
496 struct hbq_s {
497 uint16_t entry_count; /* Current number of HBQ slots */
498 uint16_t buffer_count; /* Current number of buffers posted */
499 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
500 uint32_t hbqPutIdx; /* HBQ slot to use */
501 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
502 void *hbq_virt; /* Virtual ptr to this hbq */
503 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
504 /* Callback for HBQ buffer allocation */
505 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
506 /* Callback for HBQ buffer free */
507 void (*hbq_free_buffer) (struct lpfc_hba *,
508 struct hbq_dmabuf *);
509 };
510
511 /* this matches the position in the lpfc_hbq_defs array */
512 #define LPFC_ELS_HBQ 0
513 #define LPFC_MAX_HBQS 1
514
515 enum hba_temp_state {
516 HBA_NORMAL_TEMP,
517 HBA_OVER_TEMP
518 };
519
520 enum intr_type_t {
521 NONE = 0,
522 INTx,
523 MSI,
524 MSIX,
525 };
526
527 #define LPFC_CT_CTX_MAX 64
528 struct unsol_rcv_ct_ctx {
529 uint32_t ctxt_id;
530 uint32_t SID;
531 uint32_t valid;
532 #define UNSOL_INVALID 0
533 #define UNSOL_VALID 1
534 uint16_t oxid;
535 uint16_t rxid;
536 };
537
538 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
539 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
540 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
541 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
542 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
543 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
544 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
545 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
546 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_32G
547 #define LPFC_USER_LINK_SPEED_BITMAP ((1ULL << LPFC_USER_LINK_SPEED_32G) | \
548 (1 << LPFC_USER_LINK_SPEED_16G) | \
549 (1 << LPFC_USER_LINK_SPEED_10G) | \
550 (1 << LPFC_USER_LINK_SPEED_8G) | \
551 (1 << LPFC_USER_LINK_SPEED_4G) | \
552 (1 << LPFC_USER_LINK_SPEED_2G) | \
553 (1 << LPFC_USER_LINK_SPEED_1G) | \
554 (1 << LPFC_USER_LINK_SPEED_AUTO))
555 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32"
556
557 enum nemb_type {
558 nemb_mse = 1,
559 nemb_hbd
560 };
561
562 enum mbox_type {
563 mbox_rd = 1,
564 mbox_wr
565 };
566
567 enum dma_type {
568 dma_mbox = 1,
569 dma_ebuf
570 };
571
572 enum sta_type {
573 sta_pre_addr = 1,
574 sta_pos_addr
575 };
576
577 struct lpfc_mbox_ext_buf_ctx {
578 uint32_t state;
579 #define LPFC_BSG_MBOX_IDLE 0
580 #define LPFC_BSG_MBOX_HOST 1
581 #define LPFC_BSG_MBOX_PORT 2
582 #define LPFC_BSG_MBOX_DONE 3
583 #define LPFC_BSG_MBOX_ABTS 4
584 enum nemb_type nembType;
585 enum mbox_type mboxType;
586 uint32_t numBuf;
587 uint32_t mbxTag;
588 uint32_t seqNum;
589 struct lpfc_dmabuf *mbx_dmabuf;
590 struct list_head ext_dmabuf_list;
591 };
592
593 struct lpfc_hba {
594 /* SCSI interface function jump table entries */
595 int (*lpfc_new_scsi_buf)
596 (struct lpfc_vport *, int);
597 struct lpfc_scsi_buf * (*lpfc_get_scsi_buf)
598 (struct lpfc_hba *, struct lpfc_nodelist *);
599 int (*lpfc_scsi_prep_dma_buf)
600 (struct lpfc_hba *, struct lpfc_scsi_buf *);
601 void (*lpfc_scsi_unprep_dma_buf)
602 (struct lpfc_hba *, struct lpfc_scsi_buf *);
603 void (*lpfc_release_scsi_buf)
604 (struct lpfc_hba *, struct lpfc_scsi_buf *);
605 void (*lpfc_rampdown_queue_depth)
606 (struct lpfc_hba *);
607 void (*lpfc_scsi_prep_cmnd)
608 (struct lpfc_vport *, struct lpfc_scsi_buf *,
609 struct lpfc_nodelist *);
610
611 /* IOCB interface function jump table entries */
612 int (*__lpfc_sli_issue_iocb)
613 (struct lpfc_hba *, uint32_t,
614 struct lpfc_iocbq *, uint32_t);
615 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
616 struct lpfc_iocbq *);
617 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
618 IOCB_t * (*lpfc_get_iocb_from_iocbq)
619 (struct lpfc_iocbq *);
620 void (*lpfc_scsi_cmd_iocb_cmpl)
621 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
622
623 /* MBOX interface function jump table entries */
624 int (*lpfc_sli_issue_mbox)
625 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
626
627 /* Slow-path IOCB process function jump table entries */
628 void (*lpfc_sli_handle_slow_ring_event)
629 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
630 uint32_t mask);
631
632 /* INIT device interface function jump table entries */
633 int (*lpfc_sli_hbq_to_firmware)
634 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
635 int (*lpfc_sli_brdrestart)
636 (struct lpfc_hba *);
637 int (*lpfc_sli_brdready)
638 (struct lpfc_hba *, uint32_t);
639 void (*lpfc_handle_eratt)
640 (struct lpfc_hba *);
641 void (*lpfc_stop_port)
642 (struct lpfc_hba *);
643 int (*lpfc_hba_init_link)
644 (struct lpfc_hba *, uint32_t);
645 int (*lpfc_hba_down_link)
646 (struct lpfc_hba *, uint32_t);
647 int (*lpfc_selective_reset)
648 (struct lpfc_hba *);
649
650 int (*lpfc_bg_scsi_prep_dma_buf)
651 (struct lpfc_hba *, struct lpfc_scsi_buf *);
652 /* Add new entries here */
653
654 /* SLI4 specific HBA data structure */
655 struct lpfc_sli4_hba sli4_hba;
656
657 struct workqueue_struct *wq;
658
659 struct lpfc_sli sli;
660 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
661 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
662 uint32_t sli3_options; /* Mask of enabled SLI3 options */
663 #define LPFC_SLI3_HBQ_ENABLED 0x01
664 #define LPFC_SLI3_NPIV_ENABLED 0x02
665 #define LPFC_SLI3_VPORT_TEARDOWN 0x04
666 #define LPFC_SLI3_CRP_ENABLED 0x08
667 #define LPFC_SLI3_BG_ENABLED 0x20
668 #define LPFC_SLI3_DSS_ENABLED 0x40
669 #define LPFC_SLI4_PERFH_ENABLED 0x80
670 #define LPFC_SLI4_PHWQ_ENABLED 0x100
671 uint32_t iocb_cmd_size;
672 uint32_t iocb_rsp_size;
673
674 enum hba_state link_state;
675 uint32_t link_flag; /* link state flags */
676 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
677 /* This flag is set while issuing */
678 /* INIT_LINK mailbox command */
679 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
680 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
681 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */
682 #define LS_MDS_LOOPBACK 0x16 /* MDS Diagnostics Link Up (Loopback) */
683
684 uint32_t hba_flag; /* hba generic flags */
685 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
686 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */
687 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
688 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
689 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
690 #define FCP_XRI_ABORT_EVENT 0x20
691 #define ELS_XRI_ABORT_EVENT 0x40
692 #define ASYNC_EVENT 0x80
693 #define LINK_DISABLED 0x100 /* Link disabled by user */
694 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
695 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
696 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
697 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
698 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
699 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
700 #define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */
701 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */
702 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
703 #define HBA_FORCED_LINK_SPEED 0x40000 /*
704 * Firmware supports Forced Link Speed
705 * capability
706 */
707 #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */
708 #define NVME_XRI_ABORT_EVENT 0x100000
709
710 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
711 struct lpfc_dmabuf slim2p;
712
713 MAILBOX_t *mbox;
714 uint32_t *mbox_ext;
715 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
716 uint32_t ha_copy;
717 struct _PCB *pcb;
718 struct _IOCB *IOCBs;
719
720 struct lpfc_dmabuf hbqslimp;
721
722 uint16_t pci_cfg_value;
723
724 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
725
726 uint32_t fc_eventTag; /* event tag for link attention */
727 uint32_t link_events;
728
729 /* These fields used to be binfo */
730 uint32_t fc_pref_DID; /* preferred D_ID */
731 uint8_t fc_pref_ALPA; /* preferred AL_PA */
732 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
733 uint32_t fc_edtov; /* E_D_TOV timer value */
734 uint32_t fc_arbtov; /* ARB_TOV timer value */
735 uint32_t fc_ratov; /* R_A_TOV timer value */
736 uint32_t fc_rttov; /* R_T_TOV timer value */
737 uint32_t fc_altov; /* AL_TOV timer value */
738 uint32_t fc_crtov; /* C_R_TOV timer value */
739
740 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
741 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
742
743 uint32_t lmt;
744
745 uint32_t fc_topology; /* link topology, from LINK INIT */
746 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
747
748 struct lpfc_stats fc_stat;
749
750 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
751 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
752
753 uint8_t wwnn[8];
754 uint8_t wwpn[8];
755 uint32_t RandomData[7];
756 uint8_t fcp_embed_io;
757 uint8_t nvme_support; /* Firmware supports NVME */
758 uint8_t nvmet_support; /* driver supports NVMET */
759 #define LPFC_NVMET_MAX_PORTS 32
760 uint8_t mds_diags_support;
761 uint32_t initial_imax;
762 uint8_t bbcredit_support;
763
764 /* HBA Config Parameters */
765 uint32_t cfg_ack0;
766 uint32_t cfg_enable_npiv;
767 uint32_t cfg_enable_rrq;
768 uint32_t cfg_topology;
769 uint32_t cfg_link_speed;
770 #define LPFC_FCF_FOV 1 /* Fast fcf failover */
771 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
772 uint32_t cfg_fcf_failover_policy;
773 uint32_t cfg_fcp_io_sched;
774 uint32_t cfg_fcp2_no_tgt_reset;
775 uint32_t cfg_cr_delay;
776 uint32_t cfg_cr_count;
777 uint32_t cfg_multi_ring_support;
778 uint32_t cfg_multi_ring_rctl;
779 uint32_t cfg_multi_ring_type;
780 uint32_t cfg_poll;
781 uint32_t cfg_poll_tmo;
782 uint32_t cfg_task_mgmt_tmo;
783 uint32_t cfg_use_msi;
784 uint32_t cfg_auto_imax;
785 uint32_t cfg_fcp_imax;
786 uint32_t cfg_fcp_cpu_map;
787 uint32_t cfg_fcp_io_channel;
788 uint32_t cfg_suppress_rsp;
789 uint32_t cfg_nvme_oas;
790 uint32_t cfg_nvme_io_channel;
791 uint32_t cfg_nvmet_mrq;
792 uint32_t cfg_enable_nvmet;
793 uint32_t cfg_nvme_enable_fb;
794 uint32_t cfg_nvmet_fb_size;
795 uint32_t cfg_total_seg_cnt;
796 uint32_t cfg_sg_seg_cnt;
797 uint32_t cfg_nvme_seg_cnt;
798 uint32_t cfg_sg_dma_buf_size;
799 uint64_t cfg_soft_wwnn;
800 uint64_t cfg_soft_wwpn;
801 uint32_t cfg_hba_queue_depth;
802 uint32_t cfg_enable_hba_reset;
803 uint32_t cfg_enable_hba_heartbeat;
804 uint32_t cfg_fof;
805 uint32_t cfg_EnableXLane;
806 uint8_t cfg_oas_tgt_wwpn[8];
807 uint8_t cfg_oas_vpt_wwpn[8];
808 uint32_t cfg_oas_lun_state;
809 #define OAS_LUN_ENABLE 1
810 #define OAS_LUN_DISABLE 0
811 uint32_t cfg_oas_lun_status;
812 #define OAS_LUN_STATUS_EXISTS 0x01
813 uint32_t cfg_oas_flags;
814 #define OAS_FIND_ANY_VPORT 0x01
815 #define OAS_FIND_ANY_TARGET 0x02
816 #define OAS_LUN_VALID 0x04
817 uint32_t cfg_oas_priority;
818 uint32_t cfg_XLanePriority;
819 uint32_t cfg_enable_bg;
820 uint32_t cfg_prot_mask;
821 uint32_t cfg_prot_guard;
822 uint32_t cfg_hostmem_hgp;
823 uint32_t cfg_log_verbose;
824 uint32_t cfg_aer_support;
825 uint32_t cfg_sriov_nr_virtfn;
826 uint32_t cfg_request_firmware_upgrade;
827 uint32_t cfg_iocb_cnt;
828 uint32_t cfg_suppress_link_up;
829 uint32_t cfg_rrq_xri_bitmap_sz;
830 uint32_t cfg_delay_discovery;
831 uint32_t cfg_sli_mode;
832 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
833 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
834 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
835 uint32_t cfg_enable_dss;
836 uint32_t cfg_fdmi_on;
837 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
838 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
839 uint32_t cfg_enable_SmartSAN;
840 uint32_t cfg_enable_mds_diags;
841 uint32_t cfg_enable_fc4_type;
842 uint32_t cfg_enable_bbcr; /*Enable BB Credit Recovery*/
843 uint32_t cfg_xri_split;
844 #define LPFC_ENABLE_FCP 1
845 #define LPFC_ENABLE_NVME 2
846 #define LPFC_ENABLE_BOTH 3
847 uint32_t io_channel_irqs; /* number of irqs for io channels */
848 struct nvmet_fc_target_port *targetport;
849 lpfc_vpd_t vpd; /* vital product data */
850
851 struct pci_dev *pcidev;
852 struct list_head work_list;
853 uint32_t work_ha; /* Host Attention Bits for WT */
854 uint32_t work_ha_mask; /* HA Bits owned by WT */
855 uint32_t work_hs; /* HS stored in case of ERRAT */
856 uint32_t work_status[2]; /* Extra status from SLIM */
857
858 wait_queue_head_t work_waitq;
859 struct task_struct *worker_thread;
860 unsigned long data_flags;
861
862 uint32_t hbq_in_use; /* HBQs in use flag */
863 uint32_t hbq_count; /* Count of configured HBQs */
864 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
865
866 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
867 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
868
869 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
870 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
871 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
872 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
873 PCI BAR0 */
874 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
875 PCI BAR2 */
876
877 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
878 PCI BAR0 with dual-ULP support */
879 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
880 PCI BAR2 with dual-ULP support */
881 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
882 PCI BAR4 with dual-ULP support */
883 #define PCI_64BIT_BAR0 0
884 #define PCI_64BIT_BAR2 2
885 #define PCI_64BIT_BAR4 4
886 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
887 void __iomem *HAregaddr; /* virtual address for host attn reg */
888 void __iomem *CAregaddr; /* virtual address for chip attn reg */
889 void __iomem *HSregaddr; /* virtual address for host status
890 reg */
891 void __iomem *HCregaddr; /* virtual address for host ctl reg */
892
893 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
894 struct lpfc_pgp *port_gp;
895 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
896 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
897
898 int brd_no; /* FC board number */
899 char SerialNumber[32]; /* adapter Serial Number */
900 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
901 char ModelDesc[256]; /* Model Description */
902 char ModelName[80]; /* Model Name */
903 char ProgramType[256]; /* Program Type */
904 char Port[20]; /* Port No */
905 uint8_t vpd_flag; /* VPD data flag */
906
907 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */
908 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */
909 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
910 #define VPD_PORT 0x8 /* valid vpd port data */
911 #define VPD_MASK 0xf /* mask for any vpd data */
912
913 uint8_t soft_wwn_enable;
914
915 struct timer_list fcp_poll_timer;
916 struct timer_list eratt_poll;
917 uint32_t eratt_poll_interval;
918
919 /*
920 * stat counters
921 */
922 atomic_t fc4ScsiInputRequests;
923 atomic_t fc4ScsiOutputRequests;
924 atomic_t fc4ScsiControlRequests;
925 atomic_t fc4ScsiIoCmpls;
926 atomic_t fc4NvmeInputRequests;
927 atomic_t fc4NvmeOutputRequests;
928 atomic_t fc4NvmeControlRequests;
929 atomic_t fc4NvmeIoCmpls;
930 atomic_t fc4NvmeLsRequests;
931 atomic_t fc4NvmeLsCmpls;
932
933 uint64_t bg_guard_err_cnt;
934 uint64_t bg_apptag_err_cnt;
935 uint64_t bg_reftag_err_cnt;
936
937 /* fastpath list. */
938 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
939 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
940 struct list_head lpfc_scsi_buf_list_get;
941 struct list_head lpfc_scsi_buf_list_put;
942 uint32_t total_scsi_bufs;
943 spinlock_t nvme_buf_list_get_lock; /* NVME buf alloc list lock */
944 spinlock_t nvme_buf_list_put_lock; /* NVME buf free list lock */
945 struct list_head lpfc_nvme_buf_list_get;
946 struct list_head lpfc_nvme_buf_list_put;
947 uint32_t total_nvme_bufs;
948 struct list_head lpfc_iocb_list;
949 uint32_t total_iocbq_bufs;
950 struct list_head active_rrq_list;
951 spinlock_t hbalock;
952
953 /* dma_mem_pools */
954 struct dma_pool *lpfc_sg_dma_buf_pool;
955 struct dma_pool *lpfc_mbuf_pool;
956 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
957 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
958 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
959 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
960 struct dma_pool *txrdy_payload_pool;
961 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
962
963 mempool_t *mbox_mem_pool;
964 mempool_t *nlp_mem_pool;
965 mempool_t *rrq_pool;
966 mempool_t *active_rrq_pool;
967
968 struct fc_host_statistics link_stats;
969 enum intr_type_t intr_type;
970 uint32_t intr_mode;
971 #define LPFC_INTR_ERROR 0xFFFFFFFF
972 struct list_head port_list;
973 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
974 uint16_t max_vpi; /* Maximum virtual nports */
975 #define LPFC_MAX_VPI 0xFFFF /* Max number of VPI supported */
976 uint16_t max_vports; /*
977 * For IOV HBAs max_vpi can change
978 * after a reset. max_vports is max
979 * number of vports present. This can
980 * be greater than max_vpi.
981 */
982 uint16_t vpi_base;
983 uint16_t vfi_base;
984 unsigned long *vpi_bmask; /* vpi allocation table */
985 uint16_t *vpi_ids;
986 uint16_t vpi_count;
987 struct list_head lpfc_vpi_blk_list;
988
989 /* Data structure used by fabric iocb scheduler */
990 struct list_head fabric_iocb_list;
991 atomic_t fabric_iocb_count;
992 struct timer_list fabric_block_timer;
993 unsigned long bit_flags;
994 #define FABRIC_COMANDS_BLOCKED 0
995 atomic_t num_rsrc_err;
996 atomic_t num_cmd_success;
997 unsigned long last_rsrc_error_time;
998 unsigned long last_ramp_down_time;
999 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1000 struct dentry *hba_debugfs_root;
1001 atomic_t debugfs_vport_count;
1002 struct dentry *debug_hbqinfo;
1003 struct dentry *debug_dumpHostSlim;
1004 struct dentry *debug_dumpHBASlim;
1005 struct dentry *debug_dumpData; /* BlockGuard BPL */
1006 struct dentry *debug_dumpDif; /* BlockGuard BPL */
1007 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
1008 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
1009 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
1010 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1011 struct dentry *debug_writeApp; /* inject write app_tag errors */
1012 struct dentry *debug_writeRef; /* inject write ref_tag errors */
1013 struct dentry *debug_readGuard; /* inject read guard_tag errors */
1014 struct dentry *debug_readApp; /* inject read app_tag errors */
1015 struct dentry *debug_readRef; /* inject read ref_tag errors */
1016
1017 struct dentry *debug_nvmeio_trc;
1018 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1019 atomic_t nvmeio_trc_cnt;
1020 uint32_t nvmeio_trc_size;
1021 uint32_t nvmeio_trc_output_idx;
1022
1023 /* T10 DIF error injection */
1024 uint32_t lpfc_injerr_wgrd_cnt;
1025 uint32_t lpfc_injerr_wapp_cnt;
1026 uint32_t lpfc_injerr_wref_cnt;
1027 uint32_t lpfc_injerr_rgrd_cnt;
1028 uint32_t lpfc_injerr_rapp_cnt;
1029 uint32_t lpfc_injerr_rref_cnt;
1030 uint32_t lpfc_injerr_nportid;
1031 struct lpfc_name lpfc_injerr_wwpn;
1032 sector_t lpfc_injerr_lba;
1033 #define LPFC_INJERR_LBA_OFF (sector_t)(-1)
1034
1035 struct dentry *debug_slow_ring_trc;
1036 struct lpfc_debugfs_trc *slow_ring_trc;
1037 atomic_t slow_ring_trc_cnt;
1038 /* iDiag debugfs sub-directory */
1039 struct dentry *idiag_root;
1040 struct dentry *idiag_pci_cfg;
1041 struct dentry *idiag_bar_acc;
1042 struct dentry *idiag_que_info;
1043 struct dentry *idiag_que_acc;
1044 struct dentry *idiag_drb_acc;
1045 struct dentry *idiag_ctl_acc;
1046 struct dentry *idiag_mbx_acc;
1047 struct dentry *idiag_ext_acc;
1048 uint8_t lpfc_idiag_last_eq;
1049 #endif
1050 uint16_t nvmeio_trc_on;
1051
1052 /* Used for deferred freeing of ELS data buffers */
1053 struct list_head elsbuf;
1054 int elsbuf_cnt;
1055 int elsbuf_prev_cnt;
1056
1057 uint8_t temp_sensor_support;
1058 /* Fields used for heart beat. */
1059 unsigned long last_eqdelay_time;
1060 unsigned long last_completion_time;
1061 unsigned long skipped_hb;
1062 struct timer_list hb_tmofunc;
1063 uint8_t hb_outstanding;
1064 struct timer_list rrq_tmr;
1065 enum hba_temp_state over_temp_state;
1066 /* ndlp reference management */
1067 spinlock_t ndlp_lock;
1068 /*
1069 * Following bit will be set for all buffer tags which are not
1070 * associated with any HBQ.
1071 */
1072 #define QUE_BUFTAG_BIT (1<<31)
1073 uint32_t buffer_tag_count;
1074 int wait_4_mlo_maint_flg;
1075 wait_queue_head_t wait_4_mlo_m_q;
1076 /* data structure used for latency data collection */
1077 #define LPFC_NO_BUCKET 0
1078 #define LPFC_LINEAR_BUCKET 1
1079 #define LPFC_POWER2_BUCKET 2
1080 uint8_t bucket_type;
1081 uint32_t bucket_base;
1082 uint32_t bucket_step;
1083
1084 /* Maximum number of events that can be outstanding at any time*/
1085 #define LPFC_MAX_EVT_COUNT 512
1086 atomic_t fast_event_count;
1087 uint32_t fcoe_eventtag;
1088 uint32_t fcoe_eventtag_at_fcf_scan;
1089 uint32_t fcoe_cvl_eventtag;
1090 uint32_t fcoe_cvl_eventtag_attn;
1091 struct lpfc_fcf fcf;
1092 uint8_t fc_map[3];
1093 uint8_t valid_vlan;
1094 uint16_t vlan_id;
1095 struct list_head fcf_conn_rec_list;
1096
1097 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1098 struct list_head ct_ev_waiters;
1099 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1100 uint32_t ctx_idx;
1101
1102 uint8_t menlo_flag; /* menlo generic flags */
1103 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
1104 uint32_t iocb_cnt;
1105 uint32_t iocb_max;
1106 atomic_t sdev_cnt;
1107 uint8_t fips_spec_rev;
1108 uint8_t fips_level;
1109 spinlock_t devicelock; /* lock for luns list */
1110 mempool_t *device_data_mem_pool;
1111 struct list_head luns;
1112 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1113 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1114 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1115 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1116 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1117 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1118 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1119 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1120 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1121 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1122 uint16_t sfp_alarm;
1123 uint16_t sfp_warning;
1124
1125 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1126 #define LPFC_CHECK_CPU_CNT 32
1127 uint32_t cpucheck_rcv_io[LPFC_CHECK_CPU_CNT];
1128 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT];
1129 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT];
1130 uint32_t cpucheck_ccmpl_io[LPFC_CHECK_CPU_CNT];
1131 uint16_t cpucheck_on;
1132 #define LPFC_CHECK_OFF 0
1133 #define LPFC_CHECK_NVME_IO 1
1134 #define LPFC_CHECK_NVMET_RCV 2
1135 #define LPFC_CHECK_NVMET_IO 4
1136 uint16_t ktime_on;
1137 uint64_t ktime_data_samples;
1138 uint64_t ktime_status_samples;
1139 uint64_t ktime_last_cmd;
1140 uint64_t ktime_seg1_total;
1141 uint64_t ktime_seg1_min;
1142 uint64_t ktime_seg1_max;
1143 uint64_t ktime_seg2_total;
1144 uint64_t ktime_seg2_min;
1145 uint64_t ktime_seg2_max;
1146 uint64_t ktime_seg3_total;
1147 uint64_t ktime_seg3_min;
1148 uint64_t ktime_seg3_max;
1149 uint64_t ktime_seg4_total;
1150 uint64_t ktime_seg4_min;
1151 uint64_t ktime_seg4_max;
1152 uint64_t ktime_seg5_total;
1153 uint64_t ktime_seg5_min;
1154 uint64_t ktime_seg5_max;
1155 uint64_t ktime_seg6_total;
1156 uint64_t ktime_seg6_min;
1157 uint64_t ktime_seg6_max;
1158 uint64_t ktime_seg7_total;
1159 uint64_t ktime_seg7_min;
1160 uint64_t ktime_seg7_max;
1161 uint64_t ktime_seg8_total;
1162 uint64_t ktime_seg8_min;
1163 uint64_t ktime_seg8_max;
1164 uint64_t ktime_seg9_total;
1165 uint64_t ktime_seg9_min;
1166 uint64_t ktime_seg9_max;
1167 uint64_t ktime_seg10_total;
1168 uint64_t ktime_seg10_min;
1169 uint64_t ktime_seg10_max;
1170 #endif
1171 };
1172
1173 static inline struct Scsi_Host *
1174 lpfc_shost_from_vport(struct lpfc_vport *vport)
1175 {
1176 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1177 }
1178
1179 static inline void
1180 lpfc_set_loopback_flag(struct lpfc_hba *phba)
1181 {
1182 if (phba->cfg_topology == FLAGS_LOCAL_LB)
1183 phba->link_flag |= LS_LOOPBACK_MODE;
1184 else
1185 phba->link_flag &= ~LS_LOOPBACK_MODE;
1186 }
1187
1188 static inline int
1189 lpfc_is_link_up(struct lpfc_hba *phba)
1190 {
1191 return phba->link_state == LPFC_LINK_UP ||
1192 phba->link_state == LPFC_CLEAR_LA ||
1193 phba->link_state == LPFC_HBA_READY;
1194 }
1195
1196 static inline void
1197 lpfc_worker_wake_up(struct lpfc_hba *phba)
1198 {
1199 /* Set the lpfc data pending flag */
1200 set_bit(LPFC_DATA_READY, &phba->data_flags);
1201
1202 /* Wake up worker thread */
1203 wake_up(&phba->work_waitq);
1204 return;
1205 }
1206
1207 static inline int
1208 lpfc_readl(void __iomem *addr, uint32_t *data)
1209 {
1210 uint32_t temp;
1211 temp = readl(addr);
1212 if (temp == 0xffffffff)
1213 return -EIO;
1214 *data = temp;
1215 return 0;
1216 }
1217
1218 static inline int
1219 lpfc_sli_read_hs(struct lpfc_hba *phba)
1220 {
1221 /*
1222 * There was a link/board error. Read the status register to retrieve
1223 * the error event and process it.
1224 */
1225 phba->sli.slistat.err_attn_event++;
1226
1227 /* Save status info and check for unplug error */
1228 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1229 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1230 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1231 return -EIO;
1232 }
1233
1234 /* Clear chip Host Attention error bit */
1235 writel(HA_ERATT, phba->HAregaddr);
1236 readl(phba->HAregaddr); /* flush */
1237 phba->pport->stopped = 1;
1238
1239 return 0;
1240 }
1241
1242 static inline struct lpfc_sli_ring *
1243 lpfc_phba_elsring(struct lpfc_hba *phba)
1244 {
1245 if (phba->sli_rev == LPFC_SLI_REV4) {
1246 if (phba->sli4_hba.els_wq)
1247 return phba->sli4_hba.els_wq->pring;
1248 else
1249 return NULL;
1250 }
1251 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1252 }
CRIS linux kernel tree