include/linux/iio/imu/adis.h

   1 /*
   2  * Common library for ADIS16XXX devices
   3  *
   4  * Copyright 2012 Analog Devices Inc.
   5  *   Author: Lars-Peter Clausen <lars@metafoo.de>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #ifndef __IIO_ADIS_H__
  11 #define __IIO_ADIS_H__
  12
  13 #include <linux/spi/spi.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/iio/types.h>
  16
  17 #define ADIS_WRITE_REG(reg) ((0x80 | (reg)))
  18 #define ADIS_READ_REG(reg) ((reg) & 0x7f)
  19
  20 #define ADIS_PAGE_SIZE 0x80
  21 #define ADIS_REG_PAGE_ID 0x00
  22
  23 struct adis;
  24
  25 /**
  26  * struct adis_data - ADIS chip variant specific data
  27  * @read_delay: SPI delay for read operations in us
  28  * @write_delay: SPI delay for write operations in us
  29  * @glob_cmd_reg: Register address of the GLOB_CMD register
  30  * @msc_ctrl_reg: Register address of the MSC_CTRL register
  31  * @diag_stat_reg: Register address of the DIAG_STAT register
  32  * @status_error_msgs: Array of error messgaes
  33  * @status_error_mask:
  34  */
  35 struct adis_data {
  36         unsigned int read_delay;
  37         unsigned int write_delay;
  38
  39         unsigned int glob_cmd_reg;
  40         unsigned int msc_ctrl_reg;
  41         unsigned int diag_stat_reg;
  42
  43         unsigned int self_test_mask;
  44         bool self_test_no_autoclear;
  45         unsigned int startup_delay;
  46
  47         const char * const *status_error_msgs;
  48         unsigned int status_error_mask;
  49
  50         int (*enable_irq)(struct adis *adis, bool enable);
  51
  52         bool has_paging;
  53 };
  54
  55 struct adis {
  56         struct spi_device       *spi;
  57         struct iio_trigger      *trig;
  58
  59         const struct adis_data  *data;
  60
  61         struct mutex            txrx_lock;
  62         struct spi_message      msg;
  63         struct spi_transfer     *xfer;
  64         unsigned int            current_page;
  65         void                    *buffer;
  66
  67         uint8_t                 tx[10] ____cacheline_aligned;
  68         uint8_t                 rx[4];
  69 };
  70
  71 int adis_init(struct adis *adis, struct iio_dev *indio_dev,
  72         struct spi_device *spi, const struct adis_data *data);
  73 int adis_reset(struct adis *adis);
  74
  75 int adis_write_reg(struct adis *adis, unsigned int reg,
  76         unsigned int val, unsigned int size);
  77 int adis_read_reg(struct adis *adis, unsigned int reg,
  78         unsigned int *val, unsigned int size);
  79
  80 /**
  81  * adis_write_reg_8() - Write single byte to a register
  82  * @adis: The adis device
  83  * @reg: The address of the register to be written
  84  * @value: The value to write
  85  */
  86 static inline int adis_write_reg_8(struct adis *adis, unsigned int reg,
  87         uint8_t val)
  88 {
  89         return adis_write_reg(adis, reg, val, 1);
  90 }
  91
  92 /**
  93  * adis_write_reg_16() - Write 2 bytes to a pair of registers
  94  * @adis: The adis device
  95  * @reg: The address of the lower of the two registers
  96  * @value: Value to be written
  97  */
  98 static inline int adis_write_reg_16(struct adis *adis, unsigned int reg,
  99         uint16_t val)
 100 {
 101         return adis_write_reg(adis, reg, val, 2);
 102 }
 103
 104 /**
 105  * adis_write_reg_32() - write 4 bytes to four registers
 106  * @adis: The adis device
 107  * @reg: The address of the lower of the four register
 108  * @value: Value to be written
 109  */
 110 static inline int adis_write_reg_32(struct adis *adis, unsigned int reg,
 111         uint32_t val)
 112 {
 113         return adis_write_reg(adis, reg, val, 4);
 114 }
 115
 116 /**
 117  * adis_read_reg_16() - read 2 bytes from a 16-bit register
 118  * @adis: The adis device
 119  * @reg: The address of the lower of the two registers
 120  * @val: The value read back from the device
 121  */
 122 static inline int adis_read_reg_16(struct adis *adis, unsigned int reg,
 123         uint16_t *val)
 124 {
 125         unsigned int tmp;
 126         int ret;
 127
 128         ret = adis_read_reg(adis, reg, &tmp, 2);
 129         *val = tmp;
 130
 131         return ret;
 132 }
 133
 134 /**
 135  * adis_read_reg_32() - read 4 bytes from a 32-bit register
 136  * @adis: The adis device
 137  * @reg: The address of the lower of the two registers
 138  * @val: The value read back from the device
 139  */
 140 static inline int adis_read_reg_32(struct adis *adis, unsigned int reg,
 141         uint32_t *val)
 142 {
 143         unsigned int tmp;
 144         int ret;
 145
 146         ret = adis_read_reg(adis, reg, &tmp, 4);
 147         *val = tmp;
 148
 149         return ret;
 150 }
 151
 152 int adis_enable_irq(struct adis *adis, bool enable);
 153 int adis_check_status(struct adis *adis);
 154
 155 int adis_initial_startup(struct adis *adis);
 156
 157 int adis_single_conversion(struct iio_dev *indio_dev,
 158         const struct iio_chan_spec *chan, unsigned int error_mask,
 159         int *val);
 160
 161 #define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
 162         .type = IIO_VOLTAGE, \
 163         .indexed = 1, \
 164         .channel = (chan), \
 165         .extend_name = name, \
 166         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 167                 BIT(IIO_CHAN_INFO_SCALE), \
 168         .info_mask_shared_by_all = info_all, \
 169         .address = (addr), \
 170         .scan_index = (si), \
 171         .scan_type = { \
 172                 .sign = 'u', \
 173                 .realbits = (bits), \
 174                 .storagebits = 16, \
 175                 .endianness = IIO_BE, \
 176         }, \
 177 }
 178
 179 #define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
 180         ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
 181
 182 #define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
 183         ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
 184
 185 #define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
 186         .type = IIO_TEMP, \
 187         .indexed = 1, \
 188         .channel = 0, \
 189         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 190                 BIT(IIO_CHAN_INFO_SCALE) | \
 191                 BIT(IIO_CHAN_INFO_OFFSET), \
 192         .info_mask_shared_by_all = info_all, \
 193         .address = (addr), \
 194         .scan_index = (si), \
 195         .scan_type = { \
 196                 .sign = 'u', \
 197                 .realbits = (bits), \
 198                 .storagebits = 16, \
 199                 .endianness = IIO_BE, \
 200         }, \
 201 }
 202
 203 #define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
 204         .type = (_type), \
 205         .modified = 1, \
 206         .channel2 = IIO_MOD_ ## mod, \
 207         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
 208                  info_sep, \
 209         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
 210         .info_mask_shared_by_all = info_all, \
 211         .address = (addr), \
 212         .scan_index = (si), \
 213         .scan_type = { \
 214                 .sign = 's', \
 215                 .realbits = (bits), \
 216                 .storagebits = 16, \
 217                 .endianness = IIO_BE, \
 218         }, \
 219 }
 220
 221 #define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
 222         ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
 223
 224 #define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits)         \
 225         ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
 226
 227 #define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
 228         ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
 229
 230 #define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
 231         ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
 232
 233 #ifdef CONFIG_IIO_ADIS_LIB_BUFFER
 234
 235 int adis_setup_buffer_and_trigger(struct adis *adis,
 236         struct iio_dev *indio_dev, irqreturn_t (*trigger_handler)(int, void *));
 237 void adis_cleanup_buffer_and_trigger(struct adis *adis,
 238         struct iio_dev *indio_dev);
 239
 240 int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
 241 void adis_remove_trigger(struct adis *adis);
 242
 243 int adis_update_scan_mode(struct iio_dev *indio_dev,
 244         const unsigned long *scan_mask);
 245
 246 #else /* CONFIG_IIO_BUFFER */
 247
 248 static inline int adis_setup_buffer_and_trigger(struct adis *adis,
 249         struct iio_dev *indio_dev, irqreturn_t (*trigger_handler)(int, void *))
 250 {
 251         return 0;
 252 }
 253
 254 static inline void adis_cleanup_buffer_and_trigger(struct adis *adis,
 255         struct iio_dev *indio_dev)
 256 {
 257 }
 258
 259 static inline int adis_probe_trigger(struct adis *adis,
 260         struct iio_dev *indio_dev)
 261 {
 262         return 0;
 263 }
 264
 265 static inline void adis_remove_trigger(struct adis *adis)
 266 {
 267 }
 268
 269 #define adis_update_scan_mode NULL
 270
 271 #endif /* CONFIG_IIO_BUFFER */
 272
 273 #ifdef CONFIG_DEBUG_FS
 274
 275 int adis_debugfs_reg_access(struct iio_dev *indio_dev,
 276         unsigned int reg, unsigned int writeval, unsigned int *readval);
 277
 278 #else
 279
 280 #define adis_debugfs_reg_access NULL
 281
 282 #endif
 283
 284 #endif