unify {de,}mangle_poll(), get rid of kernel-side POLL...
[cris-mirror.git] / arch / m68k / include / asm / raw_io.h
blob05e940c29b54390506289930d6947ca2299ed55d
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * linux/include/asm-m68k/raw_io.h
5 * 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
7 */
9 #ifndef _RAW_IO_H
10 #define _RAW_IO_H
12 #ifdef __KERNEL__
14 #include <asm/byteorder.h>
17 /* Values for nocacheflag and cmode */
18 #define IOMAP_FULL_CACHING 0
19 #define IOMAP_NOCACHE_SER 1
20 #define IOMAP_NOCACHE_NONSER 2
21 #define IOMAP_WRITETHROUGH 3
23 extern void iounmap(void __iomem *addr);
25 extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
26 int cacheflag);
27 extern void __iounmap(void *addr, unsigned long size);
30 /* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
31 * two accesses to memory, which may be undesirable for some devices.
33 #define in_8(addr) \
34 ({ u8 __v = (*(__force volatile u8 *) (addr)); __v; })
35 #define in_be16(addr) \
36 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
37 #define in_be32(addr) \
38 ({ u32 __v = (*(__force volatile u32 *) (addr)); __v; })
39 #define in_le16(addr) \
40 ({ u16 __v = le16_to_cpu(*(__force volatile __le16 *) (addr)); __v; })
41 #define in_le32(addr) \
42 ({ u32 __v = le32_to_cpu(*(__force volatile __le32 *) (addr)); __v; })
44 #define out_8(addr,b) (void)((*(__force volatile u8 *) (addr)) = (b))
45 #define out_be16(addr,w) (void)((*(__force volatile u16 *) (addr)) = (w))
46 #define out_be32(addr,l) (void)((*(__force volatile u32 *) (addr)) = (l))
47 #define out_le16(addr,w) (void)((*(__force volatile __le16 *) (addr)) = cpu_to_le16(w))
48 #define out_le32(addr,l) (void)((*(__force volatile __le32 *) (addr)) = cpu_to_le32(l))
50 #define raw_inb in_8
51 #define raw_inw in_be16
52 #define raw_inl in_be32
53 #define __raw_readb in_8
54 #define __raw_readw in_be16
55 #define __raw_readl in_be32
57 #define raw_outb(val,port) out_8((port),(val))
58 #define raw_outw(val,port) out_be16((port),(val))
59 #define raw_outl(val,port) out_be32((port),(val))
60 #define __raw_writeb(val,addr) out_8((addr),(val))
61 #define __raw_writew(val,addr) out_be16((addr),(val))
62 #define __raw_writel(val,addr) out_be32((addr),(val))
65 * Atari ROM port (cartridge port) ISA adapter, used for the EtherNEC NE2000
66 * network card driver.
67 * The ISA adapter connects address lines A9-A13 to ISA address lines A0-A4,
68 * and hardwires the rest of the ISA addresses for a base address of 0x300.
70 * Data lines D8-D15 are connected to ISA data lines D0-D7 for reading.
71 * For writes, address lines A1-A8 are latched to ISA data lines D0-D7
72 * (meaning the bit pattern on A1-A8 can be read back as byte).
74 * Read and write operations are distinguished by the base address used:
75 * reads are from the ROM A side range, writes are through the B side range
76 * addresses (A side base + 0x10000).
78 * Reads and writes are byte only.
80 * 16 bit reads and writes are necessary for the NetUSBee adapter's USB
81 * chipset - 16 bit words are read straight off the ROM port while 16 bit
82 * reads are split into two byte writes. The low byte is latched to the
83 * NetUSBee buffer by a read from the _read_ window (with the data pattern
84 * asserted as A1-A8 address pattern). The high byte is then written to the
85 * write range as usual, completing the write cycle.
88 #if defined(CONFIG_ATARI_ROM_ISA)
89 #define rom_in_8(addr) \
90 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v >>= 8; __v; })
91 #define rom_in_be16(addr) \
92 ({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
93 #define rom_in_le16(addr) \
94 ({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v; })
96 #define rom_out_8(addr, b) \
97 ({u8 __w, __v = (b); u32 _addr = ((u32) (addr)); \
98 __w = ((*(__force volatile u8 *) ((_addr | 0x10000) + (__v<<1)))); })
99 #define rom_out_be16(addr, w) \
100 ({u16 __w, __v = (w); u32 _addr = ((u32) (addr)); \
101 __w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v & 0xFF)<<1)))); \
102 __w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v >> 8)<<1)))); })
103 #define rom_out_le16(addr, w) \
104 ({u16 __w, __v = (w); u32 _addr = ((u32) (addr)); \
105 __w = ((*(__force volatile u16 *) ((_addr & 0xFFFF0000UL) + ((__v >> 8)<<1)))); \
106 __w = ((*(__force volatile u16 *) ((_addr | 0x10000) + ((__v & 0xFF)<<1)))); })
108 #define raw_rom_inb rom_in_8
109 #define raw_rom_inw rom_in_be16
111 #define raw_rom_outb(val, port) rom_out_8((port), (val))
112 #define raw_rom_outw(val, port) rom_out_be16((port), (val))
113 #endif /* CONFIG_ATARI_ROM_ISA */
115 static inline void raw_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
117 unsigned int i;
119 for (i = 0; i < len; i++)
120 *buf++ = in_8(port);
123 static inline void raw_outsb(volatile u8 __iomem *port, const u8 *buf,
124 unsigned int len)
126 unsigned int i;
128 for (i = 0; i < len; i++)
129 out_8(port, *buf++);
132 static inline void raw_insw(volatile u16 __iomem *port, u16 *buf, unsigned int nr)
134 unsigned int tmp;
136 if (nr & 15) {
137 tmp = (nr & 15) - 1;
138 asm volatile (
139 "1: movew %2@,%0@+; dbra %1,1b"
140 : "=a" (buf), "=d" (tmp)
141 : "a" (port), "0" (buf),
142 "1" (tmp));
144 if (nr >> 4) {
145 tmp = (nr >> 4) - 1;
146 asm volatile (
147 "1: "
148 "movew %2@,%0@+; "
149 "movew %2@,%0@+; "
150 "movew %2@,%0@+; "
151 "movew %2@,%0@+; "
152 "movew %2@,%0@+; "
153 "movew %2@,%0@+; "
154 "movew %2@,%0@+; "
155 "movew %2@,%0@+; "
156 "movew %2@,%0@+; "
157 "movew %2@,%0@+; "
158 "movew %2@,%0@+; "
159 "movew %2@,%0@+; "
160 "movew %2@,%0@+; "
161 "movew %2@,%0@+; "
162 "movew %2@,%0@+; "
163 "movew %2@,%0@+; "
164 "dbra %1,1b"
165 : "=a" (buf), "=d" (tmp)
166 : "a" (port), "0" (buf),
167 "1" (tmp));
171 static inline void raw_outsw(volatile u16 __iomem *port, const u16 *buf,
172 unsigned int nr)
174 unsigned int tmp;
176 if (nr & 15) {
177 tmp = (nr & 15) - 1;
178 asm volatile (
179 "1: movew %0@+,%2@; dbra %1,1b"
180 : "=a" (buf), "=d" (tmp)
181 : "a" (port), "0" (buf),
182 "1" (tmp));
184 if (nr >> 4) {
185 tmp = (nr >> 4) - 1;
186 asm volatile (
187 "1: "
188 "movew %0@+,%2@; "
189 "movew %0@+,%2@; "
190 "movew %0@+,%2@; "
191 "movew %0@+,%2@; "
192 "movew %0@+,%2@; "
193 "movew %0@+,%2@; "
194 "movew %0@+,%2@; "
195 "movew %0@+,%2@; "
196 "movew %0@+,%2@; "
197 "movew %0@+,%2@; "
198 "movew %0@+,%2@; "
199 "movew %0@+,%2@; "
200 "movew %0@+,%2@; "
201 "movew %0@+,%2@; "
202 "movew %0@+,%2@; "
203 "movew %0@+,%2@; "
204 "dbra %1,1b"
205 : "=a" (buf), "=d" (tmp)
206 : "a" (port), "0" (buf),
207 "1" (tmp));
211 static inline void raw_insl(volatile u32 __iomem *port, u32 *buf, unsigned int nr)
213 unsigned int tmp;
215 if (nr & 15) {
216 tmp = (nr & 15) - 1;
217 asm volatile (
218 "1: movel %2@,%0@+; dbra %1,1b"
219 : "=a" (buf), "=d" (tmp)
220 : "a" (port), "0" (buf),
221 "1" (tmp));
223 if (nr >> 4) {
224 tmp = (nr >> 4) - 1;
225 asm volatile (
226 "1: "
227 "movel %2@,%0@+; "
228 "movel %2@,%0@+; "
229 "movel %2@,%0@+; "
230 "movel %2@,%0@+; "
231 "movel %2@,%0@+; "
232 "movel %2@,%0@+; "
233 "movel %2@,%0@+; "
234 "movel %2@,%0@+; "
235 "movel %2@,%0@+; "
236 "movel %2@,%0@+; "
237 "movel %2@,%0@+; "
238 "movel %2@,%0@+; "
239 "movel %2@,%0@+; "
240 "movel %2@,%0@+; "
241 "movel %2@,%0@+; "
242 "movel %2@,%0@+; "
243 "dbra %1,1b"
244 : "=a" (buf), "=d" (tmp)
245 : "a" (port), "0" (buf),
246 "1" (tmp));
250 static inline void raw_outsl(volatile u32 __iomem *port, const u32 *buf,
251 unsigned int nr)
253 unsigned int tmp;
255 if (nr & 15) {
256 tmp = (nr & 15) - 1;
257 asm volatile (
258 "1: movel %0@+,%2@; dbra %1,1b"
259 : "=a" (buf), "=d" (tmp)
260 : "a" (port), "0" (buf),
261 "1" (tmp));
263 if (nr >> 4) {
264 tmp = (nr >> 4) - 1;
265 asm volatile (
266 "1: "
267 "movel %0@+,%2@; "
268 "movel %0@+,%2@; "
269 "movel %0@+,%2@; "
270 "movel %0@+,%2@; "
271 "movel %0@+,%2@; "
272 "movel %0@+,%2@; "
273 "movel %0@+,%2@; "
274 "movel %0@+,%2@; "
275 "movel %0@+,%2@; "
276 "movel %0@+,%2@; "
277 "movel %0@+,%2@; "
278 "movel %0@+,%2@; "
279 "movel %0@+,%2@; "
280 "movel %0@+,%2@; "
281 "movel %0@+,%2@; "
282 "movel %0@+,%2@; "
283 "dbra %1,1b"
284 : "=a" (buf), "=d" (tmp)
285 : "a" (port), "0" (buf),
286 "1" (tmp));
291 static inline void raw_insw_swapw(volatile u16 __iomem *port, u16 *buf,
292 unsigned int nr)
294 if ((nr) % 8)
295 __asm__ __volatile__
296 ("\tmovel %0,%/a0\n\t"
297 "movel %1,%/a1\n\t"
298 "movel %2,%/d6\n\t"
299 "subql #1,%/d6\n"
300 "1:\tmovew %/a0@,%/d0\n\t"
301 "rolw #8,%/d0\n\t"
302 "movew %/d0,%/a1@+\n\t"
303 "dbra %/d6,1b"
305 : "g" (port), "g" (buf), "g" (nr)
306 : "d0", "a0", "a1", "d6");
307 else
308 __asm__ __volatile__
309 ("movel %0,%/a0\n\t"
310 "movel %1,%/a1\n\t"
311 "movel %2,%/d6\n\t"
312 "lsrl #3,%/d6\n\t"
313 "subql #1,%/d6\n"
314 "1:\tmovew %/a0@,%/d0\n\t"
315 "rolw #8,%/d0\n\t"
316 "movew %/d0,%/a1@+\n\t"
317 "movew %/a0@,%/d0\n\t"
318 "rolw #8,%/d0\n\t"
319 "movew %/d0,%/a1@+\n\t"
320 "movew %/a0@,%/d0\n\t"
321 "rolw #8,%/d0\n\t"
322 "movew %/d0,%/a1@+\n\t"
323 "movew %/a0@,%/d0\n\t"
324 "rolw #8,%/d0\n\t"
325 "movew %/d0,%/a1@+\n\t"
326 "movew %/a0@,%/d0\n\t"
327 "rolw #8,%/d0\n\t"
328 "movew %/d0,%/a1@+\n\t"
329 "movew %/a0@,%/d0\n\t"
330 "rolw #8,%/d0\n\t"
331 "movew %/d0,%/a1@+\n\t"
332 "movew %/a0@,%/d0\n\t"
333 "rolw #8,%/d0\n\t"
334 "movew %/d0,%/a1@+\n\t"
335 "movew %/a0@,%/d0\n\t"
336 "rolw #8,%/d0\n\t"
337 "movew %/d0,%/a1@+\n\t"
338 "dbra %/d6,1b"
340 : "g" (port), "g" (buf), "g" (nr)
341 : "d0", "a0", "a1", "d6");
344 static inline void raw_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
345 unsigned int nr)
347 if ((nr) % 8)
348 __asm__ __volatile__
349 ("movel %0,%/a0\n\t"
350 "movel %1,%/a1\n\t"
351 "movel %2,%/d6\n\t"
352 "subql #1,%/d6\n"
353 "1:\tmovew %/a1@+,%/d0\n\t"
354 "rolw #8,%/d0\n\t"
355 "movew %/d0,%/a0@\n\t"
356 "dbra %/d6,1b"
358 : "g" (port), "g" (buf), "g" (nr)
359 : "d0", "a0", "a1", "d6");
360 else
361 __asm__ __volatile__
362 ("movel %0,%/a0\n\t"
363 "movel %1,%/a1\n\t"
364 "movel %2,%/d6\n\t"
365 "lsrl #3,%/d6\n\t"
366 "subql #1,%/d6\n"
367 "1:\tmovew %/a1@+,%/d0\n\t"
368 "rolw #8,%/d0\n\t"
369 "movew %/d0,%/a0@\n\t"
370 "movew %/a1@+,%/d0\n\t"
371 "rolw #8,%/d0\n\t"
372 "movew %/d0,%/a0@\n\t"
373 "movew %/a1@+,%/d0\n\t"
374 "rolw #8,%/d0\n\t"
375 "movew %/d0,%/a0@\n\t"
376 "movew %/a1@+,%/d0\n\t"
377 "rolw #8,%/d0\n\t"
378 "movew %/d0,%/a0@\n\t"
379 "movew %/a1@+,%/d0\n\t"
380 "rolw #8,%/d0\n\t"
381 "movew %/d0,%/a0@\n\t"
382 "movew %/a1@+,%/d0\n\t"
383 "rolw #8,%/d0\n\t"
384 "movew %/d0,%/a0@\n\t"
385 "movew %/a1@+,%/d0\n\t"
386 "rolw #8,%/d0\n\t"
387 "movew %/d0,%/a0@\n\t"
388 "movew %/a1@+,%/d0\n\t"
389 "rolw #8,%/d0\n\t"
390 "movew %/d0,%/a0@\n\t"
391 "dbra %/d6,1b"
393 : "g" (port), "g" (buf), "g" (nr)
394 : "d0", "a0", "a1", "d6");
398 #if defined(CONFIG_ATARI_ROM_ISA)
399 static inline void raw_rom_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
401 unsigned int i;
403 for (i = 0; i < len; i++)
404 *buf++ = rom_in_8(port);
407 static inline void raw_rom_outsb(volatile u8 __iomem *port, const u8 *buf,
408 unsigned int len)
410 unsigned int i;
412 for (i = 0; i < len; i++)
413 rom_out_8(port, *buf++);
416 static inline void raw_rom_insw(volatile u16 __iomem *port, u16 *buf,
417 unsigned int nr)
419 unsigned int i;
421 for (i = 0; i < nr; i++)
422 *buf++ = rom_in_be16(port);
425 static inline void raw_rom_outsw(volatile u16 __iomem *port, const u16 *buf,
426 unsigned int nr)
428 unsigned int i;
430 for (i = 0; i < nr; i++)
431 rom_out_be16(port, *buf++);
434 static inline void raw_rom_insw_swapw(volatile u16 __iomem *port, u16 *buf,
435 unsigned int nr)
437 unsigned int i;
439 for (i = 0; i < nr; i++)
440 *buf++ = rom_in_le16(port);
443 static inline void raw_rom_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
444 unsigned int nr)
446 unsigned int i;
448 for (i = 0; i < nr; i++)
449 rom_out_le16(port, *buf++);
451 #endif /* CONFIG_ATARI_ROM_ISA */
453 #endif /* __KERNEL__ */
455 #endif /* _RAW_IO_H */