2 * linux/arch/sh/boards/renesas/sh7763rdp/setup.c
4 * Renesas Solutions sh7763rdp board
6 * Copyright (C) 2008 Renesas Solutions Corp.
7 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/interrupt.h>
16 #include <linux/input.h>
17 #include <linux/mtd/physmap.h>
20 #include <linux/sh_eth.h>
21 #include <linux/sh_intc.h>
22 #include <mach/sh7763rdp.h>
23 #include <asm/sh7760fb.h>
26 static struct mtd_partition sh7763rdp_nor_flash_partitions
[] = {
30 .size
= (2 * 128 * 1024),
31 .mask_flags
= MTD_WRITEABLE
, /* Read-only */
33 .name
= "Linux-Kernel",
34 .offset
= MTDPART_OFS_APPEND
,
35 .size
= (20 * 128 * 1024),
37 .name
= "Root Filesystem",
38 .offset
= MTDPART_OFS_APPEND
,
39 .size
= MTDPART_SIZ_FULL
,
43 static struct physmap_flash_data sh7763rdp_nor_flash_data
= {
45 .parts
= sh7763rdp_nor_flash_partitions
,
46 .nr_parts
= ARRAY_SIZE(sh7763rdp_nor_flash_partitions
),
49 static struct resource sh7763rdp_nor_flash_resources
[] = {
53 .end
= (64 * 1024 * 1024),
54 .flags
= IORESOURCE_MEM
,
58 static struct platform_device sh7763rdp_nor_flash_device
= {
59 .name
= "physmap-flash",
60 .resource
= sh7763rdp_nor_flash_resources
,
61 .num_resources
= ARRAY_SIZE(sh7763rdp_nor_flash_resources
),
63 .platform_data
= &sh7763rdp_nor_flash_data
,
70 * SH Ether of SH7763 has multi IRQ handling.
71 * (0x920,0x940,0x960 -> 0x920)
73 static struct resource sh_eth_resources
[] = {
75 .start
= 0xFEE00800, /* use eth1 */
76 .end
= 0xFEE00F7C - 1,
77 .flags
= IORESOURCE_MEM
,
79 .start
= 0xFEE01800, /* TSU */
81 .flags
= IORESOURCE_MEM
,
83 .start
= evt2irq(0x920), /* irq number */
84 .flags
= IORESOURCE_IRQ
,
88 static struct sh_eth_plat_data sh7763_eth_pdata
= {
90 .edmac_endian
= EDMAC_LITTLE_ENDIAN
,
91 .register_type
= SH_ETH_REG_GIGABIT
,
92 .phy_interface
= PHY_INTERFACE_MODE_MII
,
95 static struct platform_device sh7763rdp_eth_device
= {
97 .resource
= sh_eth_resources
,
98 .num_resources
= ARRAY_SIZE(sh_eth_resources
),
100 .platform_data
= &sh7763_eth_pdata
,
105 static struct resource sh7763rdp_fb_resources
[] = {
108 .end
= 0xFFE80442 - 1,
109 .flags
= IORESOURCE_MEM
,
113 static struct fb_videomode sh7763fb_videomode
= {
115 .name
= "VGA Monitor",
126 .vmode
= FB_VMODE_NONINTERLACED
,
127 .flag
= FBINFO_FLAG_DEFAULT
,
130 static struct sh7760fb_platdata sh7763fb_def_pdata
= {
131 .def_mode
= &sh7763fb_videomode
,
132 .ldmtr
= (LDMTR_TFT_COLOR_16
|LDMTR_MCNT
),
133 .lddfr
= LDDFR_16BPP_RGB565
,
143 static struct platform_device sh7763rdp_fb_device
= {
144 .name
= "sh7760-lcdc",
145 .resource
= sh7763rdp_fb_resources
,
146 .num_resources
= ARRAY_SIZE(sh7763rdp_fb_resources
),
148 .platform_data
= &sh7763fb_def_pdata
,
152 static struct platform_device
*sh7763rdp_devices
[] __initdata
= {
153 &sh7763rdp_nor_flash_device
,
154 &sh7763rdp_eth_device
,
155 &sh7763rdp_fb_device
,
158 static int __init
sh7763rdp_devices_setup(void)
160 return platform_add_devices(sh7763rdp_devices
,
161 ARRAY_SIZE(sh7763rdp_devices
));
163 device_initcall(sh7763rdp_devices_setup
);
165 static void __init
sh7763rdp_setup(char **cmdline_p
)
167 /* Board version check */
168 if (__raw_readw(CPLD_BOARD_ID_ERV_REG
) == 0xECB1)
169 printk(KERN_INFO
"RTE Standard Configuration\n");
171 printk(KERN_INFO
"RTA Standard Configuration\n");
173 /* USB pin select bits (clear bit 5-2 to 0) */
174 __raw_writew((__raw_readw(PORT_PSEL2
) & 0xFFC3), PORT_PSEL2
);
175 /* USBH setup port I controls to other (clear bits 4-9 to 0) */
176 __raw_writew(__raw_readw(PORT_PICR
) & 0xFC0F, PORT_PICR
);
178 /* Select USB Host controller */
179 __raw_writew(0x00, USB_USBHSC
);
182 /* set PTJ7-1, bits 15-2 of PJCR to 0 */
183 __raw_writew(__raw_readw(PORT_PJCR
) & 0x0003, PORT_PJCR
);
184 /* set PTI5, bits 11-10 of PICR to 0 */
185 __raw_writew(__raw_readw(PORT_PICR
) & 0xF3FF, PORT_PICR
);
186 __raw_writew(0, PORT_PKCR
);
187 __raw_writew(0, PORT_PLCR
);
188 /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */
189 __raw_writew((__raw_readw(PORT_PSEL2
) & 0x00C0), PORT_PSEL2
);
190 /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */
191 __raw_writew((__raw_readw(PORT_PSEL3
) & 0x0700), PORT_PSEL3
);
194 /* bit3-0 0100:HAC & SSI1 enable */
195 __raw_writew((__raw_readw(PORT_PSEL1
) & 0xFFF0) | 0x0004, PORT_PSEL1
);
196 /* bit14 1:SSI_HAC_CLK enable */
197 __raw_writew(__raw_readw(PORT_PSEL4
) | 0x4000, PORT_PSEL4
);
200 __raw_writew((__raw_readw(PORT_PSEL1
) & ~0xff00) | 0x2400, PORT_PSEL1
);
201 __raw_writew(0x0, PORT_PFCR
);
202 __raw_writew(0x0, PORT_PFCR
);
203 __raw_writew(0x0, PORT_PFCR
);
206 /*selects SCIF and MMC other functions */
207 __raw_writew(0x0001, PORT_PSEL0
);
208 /* MMC clock operates */
209 __raw_writel(__raw_readl(MSTPCR1
) & ~0x8, MSTPCR1
);
210 __raw_writew(__raw_readw(PORT_PACR
) & ~0x3000, PORT_PACR
);
211 __raw_writew(__raw_readw(PORT_PCCR
) & ~0xCFC3, PORT_PCCR
);
214 static struct sh_machine_vector mv_sh7763rdp __initmv
= {
215 .mv_name
= "sh7763drp",
216 .mv_setup
= sh7763rdp_setup
,
217 .mv_init_irq
= init_sh7763rdp_IRQ
,